MT6397 PMIC Register Map (Bitfield View)

Summary: Total registers: 555, Total fields with access: 2256
Note: Reset values are not available from source, shown as '?'. Reserved bits are indicated.

CHR_CON0

Address: 0x0000

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RGS_VCDT_HV_DET	PMIC_RGS_VCDT_LV_DET	PMIC_RGS_CHRDET	PMIC_RG_CHR_EN	PMIC_RG_CSDAC_EN	PMIC_RG_PCHR_AUTOMODE	PMIC_RGS_CHR_LDO_DET	PMIC_RG_VCDT_HV_EN
Type	-	R	R	R	W	W	W	R	W
Reset	-	?	?	?	?	?	?	?	?

CHR_CON1

Address: 0x0002

Bit	15	7	3
Name	Reserved	PMIC_RG_VCDT_HV_VTH	PMIC_RG_VCDT_LV_VTH
Type	-	W	W
Reset	-	?	?

CHR_CON2

Address: 0x0004

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RGS_VBAT_CC_DET	PMIC_RGS_VBAT_CV_DET	PMIC_RGS_CS_DET	Reserved	PMIC_RG_CS_EN	PMIC_RG_VBAT_CC_EN	PMIC_RG_VBAT_CV_EN	Reserved
Type	-	R	R	R	-	W	W	W	-
Reset	-	?	?	?	-	?	?	?	-

CHR_CON3

Address: 0x0006

Bit	15	7	5	4
Name	Reserved	PMIC_RG_VBAT_CC_VTH	Reserved	PMIC_RG_VBAT_CV_VTH
Type	-	W	-	W
Reset	-	?	-	?

CHR_CON4

Address: 0x0008

Bit	15	3
Name	Reserved	PMIC_RG_CS_VTH
Type	-	W
Reset	-	?

CHR_CON5

Address: 0x000A

Bit	15	6	3	2
Name	Reserved	PMIC_RG_PCHR_TOLTC	Reserved	PMIC_RG_PCHR_TOHTC
Type	-	W	-	W
Reset	-	?	-	?

CHR_CON6

Address: 0x000C

Bit	15	6	5	4	3	0
Name	Reserved	PMIC_RGS_VBAT_OV_DET	PMIC_RG_VBAT_OV_DEG	Reserved	PMIC_RG_VBAT_OV_VTH	PMIC_RG_VBAT_OV_EN
Type	-	R	W	-	W	W
Reset	-	?	?	-	?	?

CHR_CON7

Address: 0x000E

Bit	15	12	11	7	6	3	2	1	0
Name	Reserved	PMIC_RGS_BATON_UNDET	Reserved	PMIC_RG_BATON_HT_TRIM_SET	PMIC_RG_BATON_HT_TRIM	Reserved	PMIC_BATON_TDET_EN	PMIC_RG_BATON_HT_EN	PMIC_RG_BATON_EN
Type	-	R	-	W	W	-	W	W	W
Reset	-	?	-	?	?	-	?	?	?

CHR_CON8

Address: 0x0010

Bit	15	9
Name	Reserved	PMIC_RG_CSDAC_DATA
Type	-	W
Reset	-	?

CHR_CON9

Address: 0x0012

Bit	15	0
Name	Reserved	PMIC_RG_FRC_CSVTH_USBDL
Type	-	W
Reset	-	?

CHR_CON10

Address: 0x0014

Bit	15	6	5	4	3
Name	Reserved	PMIC_RGS_OTG_BVALID_DET	PMIC_RG_OTG_BVALID_EN	PMIC_RG_PCHR_FLAG_EN	PMIC_RGS_PCHR_FLAG_OUT
Type	-	R	W	W	R
Reset	-	?	?	?	?

CHR_CON11

Address: 0x0016

Bit	15	5
Name	Reserved	PMIC_RG_PCHR_FLAG_SEL
Type	-	W
Reset	-	?

CHR_CON12

Address: 0x0018

Bit	15	6	3	2	1	0
Name	Reserved	PMIC_RG_PCHR_FT_CTRL	Reserved	PMIC_RG_PCHR_RST	PMIC_RG_CSDAC_TESTMODE	PMIC_RG_PCHR_TESTMODE
Type	-	W	-	W	W	W
Reset	-	?	-	?	?	?

CHR_CON13

Address: 0x001A

Bit	15	8	7	4	3
Name	Reserved	PMIC_RG_CHRWDT_WR	Reserved	PMIC_RG_CHRWDT_EN	PMIC_RG_CHRWDT_TD
Type	-	W	-	W	W
Reset	-	?	-	?	?

CHR_CON14

Address: 0x001C

Bit	15	7
Name	Reserved	PMIC_RG_PCHR_RV
Type	-	W
Reset	-	?

CHR_CON15

Address: 0x001E

Bit	15	2	1	0
Name	Reserved	PMIC_RGS_CHRWDT_OUT	PMIC_RG_CHRWDT_FLAG_WR	PMIC_RG_CHRWDT_INT_EN
Type	-	R	W	W
Reset	-	?	?	?

CHR_CON16

Address: 0x0020

Bit	15	12	11	10	9	8	7	3	2	1
Name	Reserved	PMIC_ADCIN_VCHR_EN	PMIC_ADCIN_VSEN_EN	PMIC_ADCIN_VBAT_EN	PMIC_RG_ADCIN_VSEN_EXT_BATON_EN	PMIC_ADCIN_VSEN_MUX_EN	Reserved	PMIC_RG_USBDL_SET	PMIC_RG_USBDL_RST	PMIC_RG_UVLO_VTHL
Type	-	W	W	W	W	W	-	W	W	W
Reset	-	?	?	?	?	?	-	?	?	?

CHR_CON17

Address: 0x0022

Bit	15	5	4	3	2
Name	Reserved	PMIC_RG_BGR_UNCHOP	PMIC_RG_BGR_UNCHOP_PH	Reserved	PMIC_RG_BGR_RSEL
Type	-	W	W	-	W
Reset	-	?	?	-	?

CHR_CON18

Address: 0x0024

Bit	15	7	6	3	1	0
Name	Reserved	PMIC_RGS_BC11_CMP_OUT	Reserved	PMIC_RG_BC11_VSRC_EN	PMIC_RG_BC11_RST	PMIC_RG_BC11_BB_CTRL
Type	-	R	-	W	W	W
Reset	-	?	-	?	?	?

CHR_CON19

Address: 0x0026

Bit	15	8	7	5	3	1
Name	Reserved	PMIC_RG_BC11_BIAS_EN	PMIC_RG_BC11_IPU_EN	PMIC_RG_BC11_IPD_EN	PMIC_RG_BC11_CMP_EN	PMIC_RG_BC11_VREF_VTH
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

CHR_CON20

Address: 0x0028

Bit	15	6	3	2
Name	Reserved	PMIC_RG_CSDAC_STP_DEC	Reserved	PMIC_RG_CSDAC_STP_INC
Type	-	W	-	W
Reset	-	?	-	?

CHR_CON21

Address: 0x002A

Bit	15	6	3	2
Name	Reserved	PMIC_RG_CSDAC_STP	Reserved	PMIC_RG_CSDAC_DLY
Type	-	W	-	W
Reset	-	?	-	?

CHR_CON22

Address: 0x002C

Bit	15	7	6	5
Name	Reserved	PMIC_RG_CHRIND_DIMMING	PMIC_RG_CHRIND_ON	PMIC_RG_LOW_ICH_DB
Type	-	W	W	W
Reset	-	?	?	?

CHR_CON23

Address: 0x002E

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_ULC_DET_EN	PMIC_RG_HWCV_EN	Reserved	PMIC_RG_TRACKING_EN	Reserved	PMIC_RG_CSDAC_MODE	PMIC_RG_VCDT_MODE	PMIC_RG_CV_MODE
Type	-	W	W	-	W	-	W	W	W
Reset	-	?	?	-	?	-	?	?	?

CHR_CON24

Address: 0x0030

Bit	15	7	3	0
Name	Reserved	PMIC_RG_ICHRG_TRIM	Reserved	PMIC_RG_BGR_TRIM_EN
Type	-	W	-	W
Reset	-	?	-	?

CHR_CON25

Address: 0x0032

Bit	15	4
Name	Reserved	PMIC_RG_BGR_TRIM
Type	-	W
Reset	-	?

CHR_CON26

Address: 0x0034

Bit	15	3
Name	Reserved	PMIC_RG_OVP_TRIM
Type	-	W
Reset	-	?

CHR_CON27

Address: 0x0036

Bit	15	7	6	5	4
Name	Reserved	PMIC_RG_BGR_TEST_RSTB	PMIC_RG_BGR_TEST_EN	PMIC_QI_BGR_EXT_BUF_EN	PMIC_CHR_OSC_TRIM
Type	-	W	W	W	W
Reset	-	?	?	?	?

CHR_CON28

Address: 0x0038

Bit	15	9
Name	Reserved	PMIC_RG_DAC_USBDL_MAX
Type	-	W
Reset	-	?

CHR_CON29

Address: 0x003A

Bit	15	7
Name	Reserved	PMIC_RG_PCHR_RSV
Type	-	W
Reset	-	?

CID

Address: 0x0100

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_CID
Type	R
Reset	?

TOP_CKPDN

Address: 0x0102

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_STRUP_6M_PDN	PMIC_RG_ACCDET_CK_PDN	PMIC_RG_AUXADC_CK_PDN	PMIC_RG_SMPS_CK_DIV_PDN	PMIC_RG_SMPS_CK_DIV2_PDN	PMIC_RG_SPK_DIV_PDN	PMIC_RG_SPK_PWM_DIV_PDN	PMIC_RG_RTC_MCLK_PDN	PMIC_RG_BST_DRV_1M_CK_PDN	PMIC_RG_FGADC_ANA_CK_PDN	PMIC_RG_FGADC_CK_PDN	PMIC_RG_EFUSE_CK_PDN	PMIC_RG_PWMOC_CK_PDN	PMIC_RG_SPK_CK_PDN	PMIC_RG_AUD_13M_PDN	PMIC_RG_AUD_26M_PDN
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

TOP_CKPDN_SET

Address: 0x0104

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved
Type	-
Reset	-

TOP_CKPDN_CLR

Address: 0x0106

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved
Type	-
Reset	-

TOP_CKPDN2

Address: 0x0108

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_TOP_CKPDN2_RSV_15	PMIC_RG_RTC_75K_CK_PDN	PMIC_RG_STRUP_32K_CK_PDN	PMIC_RG_BUCK_1M_CK_PDN	PMIC_RG_BUCK32K_PDN	PMIC_RG_BUCK_ANA_CK_PDN	PMIC_RG_BUCK_CK_PDN	PMIC_RG_CHR1M_CK_PDN	PMIC_RG_DRV_32K_CK_PDN	PMIC_RG_INTRP_CK_PDN	PMIC_RG_LDOSTB_1M_CK_PDN	PMIC_RG_PCHR_32K_CK_PDN	PMIC_RG_RTC_32K_CK_PDN	PMIC_RG_STRUP_75K_CK_PDN	PMIC_RG_FQMTR_PDN	PMIC_RG_RTC32K_1V8_PDN
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

TOP_CKPDN2_SET

Address: 0x010A

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved
Type	-
Reset	-

TOP_CKPDN2_CLR

Address: 0x010C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved
Type	-
Reset	-

TOP_GPIO_CKPDN

Address: 0x010E

Bit	15	13	6
Name	PMIC_RG_TOP_GPIO_CKPDN_RSV_15_14	PMIC_RG_GPIO32K_PDN	PMIC_RG_GPIO26M_PDN
Type	W	W	W
Reset	?	?	?

TOP_RST_CON

Address: 0x0114

Bit	15	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_TOP_RST_CON_RSV_15_9	PMIC_RG_FQMTR_RST	PMIC_RG_RTC_RST	PMIC_RG_DRIVER_RST	PMIC_RG_SPK_RST	PMIC_RG_ACCDET_RST	PMIC_RG_FGADC_RST	PMIC_RG_AUDIO_RST	PMIC_RG_AUXADC_RST	PMIC_RG_EFUSE_MAN_RST
Type	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?

WRP_CKPDN

Address: 0x011A

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_WRP_PDN	PMIC_RG_WRP_32K_PDN	PMIC_RG_WRP_EINT_PDN	PMIC_RG_WRP_KP_PDN	PMIC_RG_WRP_PWM_PDN	PMIC_RG_WRP_I2C2_PDN	PMIC_RG_WRP_I2C1_PDN	PMIC_RG_WRP_I2C0_PDN
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

WRP_RST_CON

Address: 0x0120

Bit	15	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_WRP_RST	PMIC_RG_EINT_RST	PMIC_RG_KP_RST	PMIC_RG_PWM_RST	PMIC_RG_I2C2_RST	PMIC_RG_I2C1_RST	PMIC_RG_I2C0_RST
Type	-	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?

TOP_RST_MISC

Address: 0x0126

Bit	15	9	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_PWRKEY_RST_TD	PMIC_RG_PWRRST_TMR_DIS	PMIC_RG_PWRKEY_RST_EN	PMIC_RG_HOMEKEY_RST_EN	PMIC_RG_RST_PART_SEL	PMIC_RG_TOP_RST_MISC_RSV_3	PMIC_RG_STRUP_MAN_RST_EN	PMIC_RG_SYSRSTB_EN	PMIC_RG_AP_RST_DIS
Type	-	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?

TOP_CKCON1

Address: 0x0128

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_OSC_SEL_ALIGN_DIS	Reserved	PMIC_RG_OSC_HW_SEL	PMIC_RG_CLKSQ_HW_AUTO_EN	PMIC_RG_SRCLKPERI_HW_AUTO_EN	PMIC_RG_SRCLKMD2_HW_AUTO_EN	PMIC_RG_SRCVOLT_HW_AUTO_EN	PMIC_RG_OSC_SEL_AUTO	PMIC_RG_TOP_CKCON1_RSV_07	PMIC_RG_SMPS_DIV2_SRC_AUTOFF_DIS	PMIC_RG_SMPS_AUTOFF_DIS	PMIC_RG_CLKSQ_EN	PMIC_RG_SRCLKPERI_EN	PMIC_RG_SRCLKMD2_EN	PMIC_RG_SRCVOLT_EN	PMIC_RG_OSC_SEL
Type	W	-	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	-	?	?	?	?	?	?	?	?	?	?	?	?	?	?

TOP_CKCON2

Address: 0x012A

Bit	15	14	12	11	9	8	7	6	4	2
Name	PMIC_RG_FQMTR_CKSEL	PMIC_RG_ACCDET_CKSEL	PMIC_RG_FG_ANA_CKSEL	PMIC_RG_REGCK_SEL	PMIC_RG_BUCK_2M_SEL_EN	PMIC_VCA15_6M_SEL	PMIC_VCORE_6M_SEL	PMIC_RG_SPK_DIV_SEL	PMIC_RG_SPK_PWM_DIV_SEL	PMIC_RG_AUXADC_DIV_SEL
Type	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?

TOP_CKTST1

Address: 0x012C

Bit	15	14	13	12	11	10	9	8	7	5	4	3	2	1	0
Name	PMIC_AUXADC_TSTSEL	PMIC_PMU75K_TST_DIS	PMIC_SMPS_TST_DIS	PMIC_CHR1M_TST_DIS	PMIC_AUD26M_TST_DIS	PMIC_RTC32K_TST_DIS	PMIC_FG_TST_DIS	PMIC_SPK_TST_DIS	PMIC_CHR1M_TSTSEL	PMIC_SMPS_TSTSEL	PMIC_PMU75K_TSTSEL	PMIC_AUD26M_TSTSEL	PMIC_RTC32K_TSTSEL	PMIC_FG_TSTSEL	PMIC_SPK_TSTSEL
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

TOP_CKTST2

Address: 0x012E

Bit	15	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_TOP_CKTST2_RSV_15_10	PMIC_DCXO_TSTSEL	PMIC_DCXO_TST_DIS	PMIC_OSC32_CKSEL	PMIC_XOSC32_TSTSEL	PMIC_XOSC32_TST_DIS	PMIC_RG_PCHR_TEST_CK_SEL	PMIC_RG_STRUP_75K_26M_SEL	PMIC_ACCDET_TSTSEL	PMIC_CK1M2M_TSTSEL	PMIC_BGR_TEST_CK_EN
Type	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?

OC_DEG_EN

Address: 0x0130

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_VDRM_DEG_EN	PMIC_VSRMCA7_DEG_EN	PMIC_VPCA7_DEG_EN	PMIC_VIO18_DEG_EN	PMIC_VGPU_DEG_EN	PMIC_VCORE_DEG_EN	PMIC_VSRMCA15_DEG_EN	PMIC_VCA15_DEG_EN
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

OC_CTL0

Address: 0x0132

Bit	15	7	5	3	1
Name	Reserved	PMIC_OC_GEAR_BVALID_DET	PMIC_OC_GEAR_VBATON_UNDET	Reserved	PMIC_OC_GEAR_LDO
Type	-	W	W	-	W
Reset	-	?	?	-	?

OC_CTL1

Address: 0x0134

Bit	15	13	11	9	7	5	3	1
Name	PMIC_VGPU_OC_WND	PMIC_VGPU_OC_THD	PMIC_VCORE_OC_WND	PMIC_VCORE_OC_THD	PMIC_VSRMCA15_OC_WND	PMIC_VSRMCA15_OC_THD	PMIC_VCA15_OC_WND	PMIC_VCA15_OC_THD
Type	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?

OC_CTL2

Address: 0x0136

Bit	15	13	11	9	7	5	3	1
Name	PMIC_VDRM_OC_WND	PMIC_VDRM_OC_THD	PMIC_VSRMCA7_OC_WND	PMIC_VSRMCA7_OC_THD	PMIC_VPCA7_OC_WND	PMIC_VPCA7_OC_THD	PMIC_VIO18_OC_WND	PMIC_VIO18_OC_THD
Type	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?

INT_RSV

Address: 0x0138

Bit	15	7	6	5	4	3	2	1	0
Name	PMIC_INT_RSV_15_8	PMIC_IVGEN_EXT_EN	Reserved	PMIC_RG_PWRKEY_RSTB_INT_SEL	PMIC_RG_PWRKEY_INT_SEL	PMIC_RG_HOMEKEY_INT_SEL	PMIC_POLARITY_BVALID_DET	PMIC_POLARITY_VBATON_UNDET	PMIC_POLARITY
Type	W	W	-	W	W	W	W	W	W
Reset	?	?	-	?	?	?	?	?	?

TEST_CON0

Address: 0x013A

Bit	15	11	7
Name	Reserved	PMIC_RG_MON_GRP_SEL	PMIC_RG_MON_FLAG_SEL
Type	-	W	W
Reset	-	?	?

TEST_CON1

Address: 0x013C

Bit	15	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_TEST_SPK_PWM	PMIC_RG_TEST_SPK	PMIC_RG_TEST_STRUP	PMIC_RG_EFUSE_MODE	PMIC_RG_NANDTREE_MODE	PMIC_RG_TEST_AUXADC	PMIC_RG_TEST_FGPLL	PMIC_RG_TEST_FG	PMIC_RG_TEST_AUD	PMIC_RG_TEST_WRAP	PMIC_RG_TEST_IO_FG_SEL	PMIC_RG_TEST_CLASSD	PMIC_RG_TEST_DRIVER	PMIC_RG_TEST_BOOST
Type	-	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?	?	?

STATUS0

Address: 0x013E

Bit	15	14	9	8	7	6	5	4	3	2	1	0
Name	PMIC_VRTC_STATUS	Reserved	PMIC_STATUS_VTCXO_EN	PMIC_STATUS_VUSB_EN	PMIC_STATUS_VDRM_EN	PMIC_STATUS_VSRMCA7_EN	PMIC_STATUS_VPCA7_EN	PMIC_STATUS_VIO18_EN	PMIC_STATUS_VGPU_EN	PMIC_STATUS_VCORE_EN	PMIC_STATUS_VSRMCA15_EN	PMIC_STATUS_VCA15_EN
Type	R	-	R	R	R	R	R	R	R	R	R	R
Reset	?	-	?	?	?	?	?	?	?	?	?	?

STATUS1

Address: 0x0140

Bit	15	14	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_STATUS_VA28_EN	Reserved	PMIC_STATUS_VCAMA_EN	Reserved	PMIC_STATUS_VEMC_3V3_EN	PMIC_STATUS_VCAMD_EN	PMIC_STATUS_VCAMIO_EN	PMIC_STATUS_VCAMAF_EN	PMIC_STATUS_VGP4_EN	PMIC_STATUS_VGP5_EN	PMIC_STATUS_VGP6_EN	PMIC_STATUS_VIBR_EN	PMIC_STATUS_VIO28_EN	PMIC_STATUS_VMC_EN	PMIC_STATUS_VMCH_EN
Type	R	-	R	-	R	R	R	R	R	R	R	R	R	R	R
Reset	?	-	?	-	?	?	?	?	?	?	?	?	?	?	?

PGSTATUS

Address: 0x0142

Bit	15	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_VSRMCA15_PG_DEB	PMIC_VPCA15_PG_DEB	PMIC_VMCH_PG_DEB	PMIC_VMC_PG_DEB	PMIC_VEMC_PG_DEB	PMIC_VTCXO_PG_DEB	PMIC_VIO28_PG_DEB	PMIC_VA28_PG_DEB	PMIC_VIO18_PG_DEB	PMIC_VDRM_PG_DEB	PMIC_VCORE_PG_DEB	PMIC_VSRMCA7_PG_DEB	PMIC_VPCA7_PG_DEB
Type	-	R	R	R	R	R	R	R	R	R	R	R	R	R
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?	?

CHRSTATUS

Address: 0x0144

Bit	15	11	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RTC_XTAL_DET_RSV	PMIC_RTC_XTAL_DET_DONE	PMIC_RO_BATON_UNDET	PMIC_PCHR_CHRDET	PMIC_VBAT_OV	PMIC_PWRKEY_DEB	PMIC_USBDL	PMIC_PWRKEY_RST_B_INT	PMIC_PMU_TEST_MODE_SCAN
Type	-	W	R	R	R	R	R	R	R	R
Reset	-	?	?	?	?	?	?	?	?	?

OCSTATUS0

Address: 0x0146

Bit	15	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_OC_STATUS_VTCXO	PMIC_OC_STATUS_VUSB	PMIC_OC_STATUS_VDRM	PMIC_OC_STATUS_VSRMCA7	PMIC_OC_STATUS_VPCA7	PMIC_OC_STATUS_VIO18	PMIC_OC_STATUS_VGPU	PMIC_OC_STATUS_VCORE	PMIC_OC_STATUS_VSRMCA15	PMIC_OC_STATUS_VCA15
Type	-	R	R	R	R	R	R	R	R	R	R
Reset	-	?	?	?	?	?	?	?	?	?	?

OCSTATUS1

Address: 0x0148

Bit	15	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_OC_STATUS_VA28	PMIC_OC_STATUS_VCAMA	Reserved	PMIC_OC_STATUS_VEMC_3V3	PMIC_OC_STATUS_VCAMD	PMIC_OC_STATUS_VCAMIO	PMIC_OC_STATUS_VCAMAF	PMIC_OC_STATUS_VGP4	PMIC_OC_STATUS_VGP5	PMIC_OC_STATUS_VGP6	PMIC_OC_STATUS_VIBR	PMIC_OC_STATUS_VIO28	PMIC_OC_STATUS_VMC	PMIC_OC_STATUS_VMCH
Type	-	R	R	-	R	R	R	R	R	R	R	R	R	R	R
Reset	-	?	?	-	?	?	?	?	?	?	?	?	?	?	?

OCSTATUS2

Address: 0x014A

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_HOMEKEY_DEB	PMIC_SPK_OC_DET_D_R	PMIC_SPK_OC_DET_D_L	PMIC_SPK_OC_DET_AB_R	PMIC_SPK_OC_DET_AB_L
Type	-	R	R	R	R	R
Reset	-	?	?	?	?	?

HDMI_PAD_IE

Address: 0x014C

Bit	15	3	0
Name	PMIC_RG_TOP_RSV	Reserved	PMIC_RG_HDMI_PAD_IE
Type	W	-	W
Reset	?	-	?

TEST_OUT_L

Address: 0x014E

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_TEST_OUT_L
Type	R
Reset	?

TEST_OUT_H

Address: 0x0150

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_TEST_OUT_H
Type	R
Reset	?

TDSEL_CON

Address: 0x0152

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_HDMI_TDSEL	PMIC_RG_PMU_TDSEL	PMIC_RG_SPI_TDSEL	PMIC_RG_I2S_TDSEL	PMIC_RG_KP_TDSEL	PMIC_RG_PWM_TDSEL	PMIC_RG_I2C_TDSEL	PMIC_RG_SIMAP_TDSEL
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

RDSEL_CON

Address: 0x0154

Bit	15	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_HDMI_RDSEL	PMIC_RG_PMU_RDSEL	PMIC_RG_SPI_RDSEL	PMIC_RG_I2S_RDSEL	PMIC_RG_KP_RDSEL	PMIC_RG_PWM_RDSEL	PMIC_RG_I2C_RDSEL	PMIC_RG_SIMAP_RDSEL
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

GPIO_SMT_CON0

Address: 0x0156

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_SMT15	PMIC_RG_SMT14	PMIC_RG_SMT13	PMIC_RG_SMT12	PMIC_RG_SMT11	PMIC_RG_SMT10	PMIC_RG_SMT9	PMIC_RG_SMT8	PMIC_RG_SMT7	PMIC_RG_SMT6	PMIC_RG_SMT5	PMIC_RG_SMT4	PMIC_RG_SMT3	PMIC_RG_SMT2	PMIC_RG_SMT1	PMIC_RG_SMT0
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

GPIO_SMT_CON1

Address: 0x0158

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_SMT31	PMIC_RG_SMT30	PMIC_RG_SMT29	PMIC_RG_SMT28	PMIC_RG_SMT27	PMIC_RG_SMT26	PMIC_RG_SMT25	PMIC_RG_SMT24	PMIC_RG_SMT23	PMIC_RG_SMT22	PMIC_RG_SMT21	PMIC_RG_SMT20	PMIC_RG_SMT19	PMIC_RG_SMT18	PMIC_RG_SMT17	PMIC_RG_SMT16
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

GPIO_SMT_CON2

Address: 0x015A

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_SMT47	PMIC_RG_SMT46	PMIC_RG_SMT45	PMIC_RG_SMT44	PMIC_RG_SMT43	PMIC_RG_SMT42	PMIC_RG_SMT41	PMIC_RG_SMT40	PMIC_RG_SMT39	PMIC_RG_SMT38	PMIC_RG_SMT37	PMIC_RG_SMT36	PMIC_RG_SMT35	PMIC_RG_SMT34	PMIC_RG_SMT33	PMIC_RG_SMT32
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

GPIO_SMT_CON3

Address: 0x015C

Bit	15	9	8	7	2	1	0
Name	Reserved	PMIC_RG_HOMEKEY_PDEN	PMIC_RG_HOMEKEY_PUEN	Reserved	PMIC_RG_SMT50	PMIC_RG_SMT49	PMIC_RG_SMT48
Type	-	W	W	-	W	W	W
Reset	-	?	?	-	?	?	?

DRV_CON0

Address: 0x015E

Bit	15	11	7	3
Name	PMIC_RG_OCTL_SRCLKEN_PERI	PMIC_RG_OCTL_SRCVOLTEN	PMIC_RG_OCTL_INT	PMIC_RG_OCTL_HOMEKEY
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON1

Address: 0x0160

Bit	15	11	7	3
Name	PMIC_RG_OCTL_SPI_CLK	PMIC_RG_OCTL_WRAP_EVENT	PMIC_RG_OCTL_RTC_32K1V8	Reserved
Type	W	W	W	-
Reset	?	?	?	-

DRV_CON2

Address: 0x0162

Bit	15	11	7	3
Name	Reserved	PMIC_RG_OCTL_SPI_MISO	PMIC_RG_OCTL_SPI_MOSI	PMIC_RG_OCTL_SPI_CSN
Type	-	W	W	W
Reset	-	?	?	?

DRV_CON3

Address: 0x0164

Bit	15	11	7	3
Name	Reserved	PMIC_RG_OCTL_AUD_MOSI	PMIC_RG_OCTL_AUD_MISO	Reserved
Type	-	W	W	-
Reset	-	?	?	-

DRV_CON4

Address: 0x0166

Bit	15	11	7	3
Name	PMIC_RG_OCTL_COL2	PMIC_RG_OCTL_COL1	PMIC_RG_OCTL_COL0	Reserved
Type	W	W	W	-
Reset	?	?	?	-

DRV_CON5

Address: 0x0168

Bit	15	11	7	3
Name	PMIC_RG_OCTL_COL6	PMIC_RG_OCTL_COL5	PMIC_RG_OCTL_COL4	PMIC_RG_OCTL_COL3
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON6

Address: 0x016A

Bit	15	11	7	3
Name	PMIC_RG_OCTL_ROW2	PMIC_RG_OCTL_ROW1	PMIC_RG_OCTL_ROW0	PMIC_RG_OCTL_COL7
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON7

Address: 0x016C

Bit	15	11	7	3
Name	PMIC_RG_OCTL_ROW6	PMIC_RG_OCTL_ROW5	PMIC_RG_OCTL_ROW4	PMIC_RG_OCTL_ROW3
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON8

Address: 0x016E

Bit	15	11	7	3
Name	PMIC_RG_OCTL_PWM	PMIC_RG_OCTL_VMSEL2	PMIC_RG_OCTL_VMSEL1	PMIC_RG_OCTL_ROW7
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON9

Address: 0x0170

Bit	15	11	7	3
Name	PMIC_RG_OCTL_SDA1	PMIC_RG_OCTL_SCL1	PMIC_RG_OCTL_SDA0	PMIC_RG_OCTL_SCL0
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON10

Address: 0x0172

Bit	15	7	3
Name	Reserved	PMIC_RG_OCTL_SDA2	PMIC_RG_OCTL_SCL2
Type	-	W	W
Reset	-	?	?

DRV_CON11

Address: 0x0174

Bit	15	11	7	3
Name	PMIC_RG_OCTL_CEC	PMIC_RG_OCTL_HTPLG	PMIC_RG_OCTL_HDMISD	PMIC_RG_OCTL_HDMISCK
Type	W	W	W	W
Reset	?	?	?	?

DRV_CON12

Address: 0x0176

Bit	15	7	3
Name	Reserved	PMIC_RG_OCTL_SIMLS2_SRST	PMIC_RG_OCTL_SIMLS2_SCLK
Type	-	W	W
Reset	-	?	?

INT_CON0

Address: 0x0178

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_INT_EN_OV	PMIC_RG_INT_EN_CHRDET	PMIC_RG_INT_EN_BVALID_DET	PMIC_RG_INT_EN_VBATON_UNDET	PMIC_RG_INT_EN_THR_H	PMIC_RG_INT_EN_THR_L	PMIC_RG_INT_EN_PWRKEY	PMIC_RG_INT_EN_WATCHDOG	PMIC_RG_INT_EN_FG_BAT_H	PMIC_RG_INT_EN_FG_BAT_L	PMIC_RG_INT_EN_BAT_H	PMIC_RG_INT_EN_BAT_L	PMIC_RG_INT_EN_SPKR	PMIC_RG_INT_EN_SPKL	PMIC_RG_INT_EN_SPKR_AB	PMIC_RG_INT_EN_SPKL_AB
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

INT_CON1

Address: 0x017E

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_INT_EN_VDRM	PMIC_RG_INT_EN_VSRMCA7	PMIC_RG_INT_EN_VPCA7	PMIC_RG_INT_EN_VIO18	PMIC_RG_INT_EN_VGPU	PMIC_RG_INT_EN_VCORE	PMIC_RG_INT_EN_VSRMCA15	PMIC_RG_INT_EN_VCA15	PMIC_RG_INT_EN_HDMI_CEC	PMIC_RG_INT_EN_HDMI_SIFM	PMIC_RG_INT_EN_PWRKEY_RSTB	PMIC_RG_INT_EN_RTC	PMIC_RG_INT_EN_AUDIO	PMIC_RG_INT_EN_ACCDET	PMIC_RG_INT_EN_HOMEKEY	PMIC_RG_INT_EN_LDO
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

INT_STATUS0

Address: 0x0184

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_INT_STATUS_OV	PMIC_RG_INT_STATUS_CHRDET	PMIC_RG_INT_STATUS_BVALID_DET	PMIC_RG_INT_STATUS_VBATON_UNDET	PMIC_RG_INT_STATUS_THR_H	PMIC_RG_INT_STATUS_THR_L	PMIC_RG_INT_STATUS_PWRKEY	PMIC_RG_INT_STATUS_WATCHDOG	PMIC_RG_INT_STATUS_FG_BAT_H	PMIC_RG_INT_STATUS_FG_BAT_L	PMIC_RG_INT_STATUS_BAT_H	PMIC_RG_INT_STATUS_BAT_L	PMIC_RG_INT_STATUS_SPKR	PMIC_RG_INT_STATUS_SPKL	PMIC_RG_INT_STATUS_SPKR_AB	PMIC_RG_INT_STATUS_SPKL_AB
Type	R	R	R	R	R	R	R	R	R	R	R	R	R	R	R	R
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

INT_STATUS1

Address: 0x0186

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_INT_STATUS_VDRM	PMIC_RG_INT_STATUS_VSRMCA7	PMIC_RG_INT_STATUS_VPCA7	PMIC_RG_INT_STATUS_VIO18	PMIC_RG_INT_STATUS_VGPU	PMIC_RG_INT_STATUS_VCORE	PMIC_RG_INT_STATUS_VSRMCA15	PMIC_RG_INT_STATUS_VCA15	PMIC_RG_INT_STATUS_HDMI_CEC	PMIC_RG_INT_STATUS_HDMI_SIFM	PMIC_RG_INT_STATUS_PWRKEY_RSTB	PMIC_RG_INT_STATUS_RTC	PMIC_RG_INT_STATUS_AUDIO	PMIC_RG_INT_STATUS_ACCDET	PMIC_RG_INT_STATUS_HOMEKEY	PMIC_RG_INT_STATUS_LDO
Type	R	R	R	R	R	R	R	R	R	R	R	R	R	R	R	R
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

FQMTR_CON0

Address: 0x0188

Bit	15	14	13	3	2
Name	PMIC_FQMTR_EN	PMIC_FQMTR_RST	Reserved	PMIC_FQMTR_BUSY	PMIC_FQMTR_TCKSEL
Type	W	W	-	R	W
Reset	?	?	-	?	?

FQMTR_CON1

Address: 0x018A

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FQMTR_WINSET
Type	W
Reset	?

FQMTR_CON2

Address: 0x018C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FQMTR_DATA
Type	R
Reset	?

EFUSE_CON0

Address: 0x018E

Bit	15	5
Name	Reserved	PMIC_RG_EFUSE_ADDR
Type	-	W
Reset	-	?

EFUSE_CON1

Address: 0x0190

Bit	15	4
Name	Reserved	PMIC_RG_EFUSE_PROG
Type	-	W
Reset	-	?

EFUSE_CON2

Address: 0x0192

Bit	15	0
Name	Reserved	PMIC_RG_EFUSE_EN
Type	-	W
Reset	-	?

EFUSE_CON3

Address: 0x0194

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_PKEY
Type	W
Reset	?

EFUSE_CON4

Address: 0x0196

Bit	15	0
Name	Reserved	PMIC_RG_EFUSE_RD_TRIG
Type	-	W
Reset	-	?

EFUSE_CON5

Address: 0x0198

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_RG_RD_RDY_BYPASS	Reserved	PMIC_RG_SKIP_EFUSE_OUT	Reserved	PMIC_RG_EFUSE_PROG_SRC
Type	-	W	-	W	-	W
Reset	-	?	-	?	-	?

EFUSE_CON6

Address: 0x019A

Bit	15	2	1	0
Name	Reserved	PMIC_RG_EFUSE_BUSY	Reserved	PMIC_RG_EFUSE_RD_ACK
Type	-	R	-	R
Reset	-	?	-	?

EFUSE_VAL_0_15

Address: 0x019C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_0_15
Type	W
Reset	?

EFUSE_VAL_16_31

Address: 0x019E

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_16_31
Type	W
Reset	?

EFUSE_VAL_32_47

Address: 0x01A0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_32_47
Type	W
Reset	?

EFUSE_VAL_48_63

Address: 0x01A2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_48_63
Type	W
Reset	?

EFUSE_VAL_64_79

Address: 0x01A4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_64_79
Type	W
Reset	?

EFUSE_VAL_80_95

Address: 0x01A6

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_80_95
Type	W
Reset	?

EFUSE_VAL_96_111

Address: 0x01A8

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_96_111
Type	W
Reset	?

EFUSE_VAL_112_127

Address: 0x01AA

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_112_127
Type	W
Reset	?

EFUSE_VAL_128_143

Address: 0x01AC

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_128_143
Type	W
Reset	?

EFUSE_VAL_144_159

Address: 0x01AE

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_144_159
Type	W
Reset	?

EFUSE_VAL_160_175

Address: 0x01B0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_160_175
Type	W
Reset	?

EFUSE_VAL_176_191

Address: 0x01B2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_176_191
Type	W
Reset	?

EFUSE_VAL_192_207

Address: 0x01B4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_192_207
Type	W
Reset	?

EFUSE_VAL_208_223

Address: 0x01B6

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_208_223
Type	W
Reset	?

EFUSE_VAL_224_239

Address: 0x01B8

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_224_239
Type	W
Reset	?

EFUSE_VAL_240_255

Address: 0x01BA

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_240_255
Type	W
Reset	?

EFUSE_VAL_256_271

Address: 0x01BC

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_256_271
Type	W
Reset	?

EFUSE_VAL_272_287

Address: 0x01BE

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_272_287
Type	W
Reset	?

EFUSE_VAL_288_303

Address: 0x01C0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_288_303
Type	W
Reset	?

EFUSE_VAL_304_319

Address: 0x01C2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_VAL_304_319
Type	W
Reset	?

EFUSE_DOUT_0_15

Address: 0x01C4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_DOUT_0_15
Type	R
Reset	?

EFUSE_DOUT_16_31

Address: 0x01C6

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_DOUT_16_31
Type	R
Reset	?

EFUSE_DOUT_32_47

Address: 0x01C8

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_DOUT_32_47
Type	R
Reset	?

EFUSE_DOUT_48_63

Address: 0x01CA

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_EFUSE_DOUT_48_63
Type	R
Reset	?

SPI_CON

Address: 0x01CC

Bit	15	0
Name	Reserved	PMIC_SPI_CON
Type	-	W
Reset	-	?

TOP_CKPDN3

Address: 0x01CE

Bit	15	1	0
Name	Reserved	PMIC_RG_AUXADC_DIV_CK_PDN	PMIC_RG_RTC_75K_DIV4_CK_PDN
Type	-	W	W
Reset	-	?	?

TOP_CKCON3

Address: 0x01D4

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_RG_WRAP_EVENT_EN	PMIC_RG_WRAP_EN_SEL	PMIC_RG_DCXO_SEL	PMIC_RG_EINT_CK_SEL	PMIC_RG_AUD_CK_SEL
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

EFUSE_DOUT_64_79

Address: 0x01D6

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_64_79
Type	R
Reset	?

EFUSE_DOUT_80_95

Address: 0x01D8

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_80_95
Type	R
Reset	?

EFUSE_DOUT_96_111

Address: 0x01DA

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_96_111
Type	R
Reset	?

EFUSE_DOUT_112_127

Address: 0x01DC

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_112_127
Type	R
Reset	?

EFUSE_DOUT_128_143

Address: 0x01DE

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_128_143
Type	R
Reset	?

EFUSE_DOUT_144_159

Address: 0x01E0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_144_159
Type	R
Reset	?

EFUSE_DOUT_160_175

Address: 0x01E2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_160_175
Type	R
Reset	?

EFUSE_DOUT_176_191

Address: 0x01E4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_176_191
Type	R
Reset	?

EFUSE_DOUT_192_207

Address: 0x01E6

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_192_207
Type	R
Reset	?

EFUSE_DOUT_208_223

Address: 0x01E8

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_208_223
Type	R
Reset	?

EFUSE_DOUT_224_239

Address: 0x01EA

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_224_239
Type	R
Reset	?

EFUSE_DOUT_240_255

Address: 0x01EC

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_240_255
Type	R
Reset	?

EFUSE_DOUT_256_271

Address: 0x01EE

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_256_271
Type	R
Reset	?

EFUSE_DOUT_272_287

Address: 0x01F0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_272_287
Type	R
Reset	?

EFUSE_DOUT_288_303

Address: 0x01F2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_288_303
Type	R
Reset	?

EFUSE_DOUT_304_319

Address: 0x01F4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_EFUSE_DOUT_304_319
Type	R
Reset	?

BUCK_CON0

Address: 0x0200

Bit	15	8
Name	Reserved	PMIC_RG_SMPS_TESTMODE_B
Type	-	W
Reset	-	?

BUCK_CON1

Address: 0x0202

Bit	15	11	7	3
Name	PMIC_QI_VSRMCA7_DIG_MON	PMIC_QI_VPCA7_DIG_MON	PMIC_QI_VSRMCA15_DIG_MON	PMIC_QI_VCA15_DIG_MON
Type	R	R	R	R
Reset	?	?	?	?

BUCK_CON2

Address: 0x0204

Bit	15	11	7	3
Name	Reserved	PMIC_QI_VCORE_DIG_MON	PMIC_QI_VDRM_DIG_MON	PMIC_QI_VGPU_DIG_MON
Type	-	R	R	R
Reset	-	?	?	?

BUCK_CON3

Address: 0x0206

Bit	15	12
Name	Reserved	PMIC_BUCK_RSV
Type	-	W
Reset	-	?

BUCK_CON4

Address: 0x0208

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_RG_VPCA7_TRIMH	Reserved	PMIC_RG_VPCA7_TRIML	Reserved	PMIC_RG_VCA15_TRIMH	Reserved	PMIC_RG_VCA15_TRIML
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

BUCK_CON5

Address: 0x020A

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_RG_VSRMCA7_TRIMH	Reserved	PMIC_RG_VSRMCA7_TRIML	Reserved	PMIC_RG_VSRMCA15_TRIMH	Reserved	PMIC_RG_VSRMCA15_TRIML
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

BUCK_CON6

Address: 0x020C

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_RG_VCORE_TRIMH	Reserved	PMIC_RG_VCORE_TRIML	Reserved	PMIC_RG_VGPU_TRIMH	Reserved	PMIC_RG_VGPU_TRIML
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

BUCK_CON7

Address: 0x020E

Bit	15	6	3	2
Name	Reserved	PMIC_RG_VDRM_TRIMH	Reserved	PMIC_RG_VDRM_TRIML
Type	-	W	-	W
Reset	-	?	-	?

BUCK_CON8

Address: 0x0210

Bit	15	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCORE_VSLEEP	PMIC_QI_VGPU_VSLEEP	PMIC_QI_VSRMCA7_VSLEEP	PMIC_QI_VSRMCA15_VSLEEP	PMIC_QI_VPCA7_VSLEEP	PMIC_QI_VCA15_VSLEEP
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

BUCK_CON9

Address: 0x0212

Bit	15	1
Name	Reserved	PMIC_QI_VDRM_VSLEEP
Type	-	W
Reset	-	?

VCA15_CON0

Address: 0x0214

Bit	15	13	7	5
Name	Reserved	PMIC_RG_VCA15_ZXOS_TRIM2	Reserved	PMIC_RG_VCA15_ZXOS_TRIM1
Type	-	W	-	W
Reset	-	?	-	?

VCA15_CON1

Address: 0x0216

Bit	15	13	11	9	7	5	2
Name	Reserved	PMIC_RG_VCA15_CSL2	PMIC_RG_VCA15_CSL1	PMIC_RG_VCA15_CSR2	PMIC_RG_VCA15_CSR1	PMIC_RG_VCA15_CC	PMIC_RG_VCA15_RZSEL
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

VCA15_CON2

Address: 0x0218

Bit	15	12	11	10	9	7	5	3	1
Name	Reserved	PMIC_RG_VCA15_NDIS_EN	PMIC_RG_VCA15_MODESET	PMIC_RG_VCA15_ACGB_EN	Reserved	PMIC_RG_VCA15_SLP2	PMIC_RG_VCA15_SLP1	PMIC_RG_VCA15_ZX_OS2	PMIC_RG_VCA15_ZX_OS1
Type	-	W	W	W	-	W	W	W	W
Reset	-	?	?	?	-	?	?	?	?

VCA15_CON3

Address: 0x021A

Bit	15	6	3	2
Name	Reserved	PMIC_RG_VCA15_CSM2	Reserved	PMIC_RG_VCA15_CSM1
Type	-	W	-	W
Reset	-	?	-	?

VCA15_CON4

Address: 0x021C

Bit	15	7
Name	Reserved	PMIC_RG_VCA15_RSV1
Type	-	W
Reset	-	?

VCA15_CON5

Address: 0x021E

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_VCA15_TRACK_ON_CTRL	PMIC_VCA15_BURST_CTRL	PMIC_VCA15_DLC_CTRL	PMIC_VCA15_VOSEL_CTRL	PMIC_VCA15_EN_CTRL
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

VCA15_CON6

Address: 0x0220

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VCA15_BURST_SEL	Reserved	PMIC_VCA15_DLC_SEL	Reserved	PMIC_VCA15_VOSEL_SEL	Reserved	PMIC_VCA15_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCA15_CON7

Address: 0x0222

Bit	15	14	13	12	11	5	3	0
Name	PMIC_QI_VCA15_OC_STATUS	PMIC_QI_VCA15_MODE	PMIC_QI_VCA15_EN	PMIC_QI_VCA15_STB	Reserved	PMIC_VCA15_STBTD	Reserved	PMIC_VCA15_EN
Type	R	R	R	R	-	W	-	W
Reset	?	?	?	?	-	?	-	?

VCA15_CON8

Address: 0x0224

Bit	15	14	7	6
Name	PMIC_VCA15_SFCHG_REN	PMIC_VCA15_SFCHG_RRATE	PMIC_VCA15_SFCHG_FEN	PMIC_VCA15_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VCA15_CON9

Address: 0x0226

Bit	15	6
Name	Reserved	PMIC_VCA15_VOSEL
Type	-	W
Reset	-	?

VCA15_CON10

Address: 0x0228

Bit	15	6
Name	Reserved	PMIC_VCA15_VOSEL_ON
Type	-	W
Reset	-	?

VCA15_CON11

Address: 0x022A

Bit	15	6
Name	Reserved	PMIC_VCA15_VOSEL_SLEEP
Type	-	W
Reset	-	?

VCA15_CON12

Address: 0x022C

Bit	15	6
Name	Reserved	PMIC_NI_VCA15_VOSEL
Type	-	R
Reset	-	?

VCA15_CON13

Address: 0x022E

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCA15_BURST	Reserved	PMIC_VCA15_BURST_SLEEP	Reserved	PMIC_VCA15_BURST_ON	Reserved	PMIC_VCA15_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCA15_CON14

Address: 0x0230

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCA15_DLC	Reserved	PMIC_VCA15_DLC_SLEEP	Reserved	PMIC_VCA15_DLC_ON	Reserved	PMIC_VCA15_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCA15_CON15

Address: 0x0232

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCA15_DLC_N	Reserved	PMIC_VCA15_DLC_N_SLEEP	Reserved	PMIC_VCA15_DLC_N_ON	Reserved	PMIC_VCA15_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCA15_CON16

Address: 0x0234

Bit	15	13	11
Name	Reserved	PMIC_QI_VCA15_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VCA15_CON17

Address: 0x0236

Bit	15	13	11
Name	Reserved	PMIC_QI_VCA15_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VCA15_CON18

Address: 0x0238

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VCA15_VSLEEP_SEL	PMIC_NI_VCA15_R2R_PDN	Reserved	PMIC_VCA15_VSLEEP_SEL	PMIC_VCA15_R2R_PDN	Reserved	PMIC_VCA15_VSLEEP_EN	PMIC_NI_VCA15_VOSEL_TRANS	PMIC_VCA15_VOSEL_TRANS_ONCE	PMIC_VCA15_VOSEL_TRANS_EN	Reserved	PMIC_VCA15_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VSRMCA15_CON0

Address: 0x023A

Bit	15	5
Name	Reserved	PMIC_RG_VSRMCA15_ZXOS_TRIM
Type	-	W
Reset	-	?

VSRMCA15_CON1

Address: 0x023C

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VSRMCA15_ZX_OS	Reserved	PMIC_RG_VSRMCA15_CSL	PMIC_RG_VSRMCA15_CSR	PMIC_RG_VSRMCA15_CC	Reserved	PMIC_RG_VSRMCA15_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VSRMCA15_CON2

Address: 0x023E

Bit	15	9	8	7	6	3	0
Name	Reserved	PMIC_RG_VSRMCA15_NDIS_EN	PMIC_RG_VSRMCA15_MODESET	Reserved	PMIC_RG_VSRMCA15_CSM	Reserved	PMIC_RG_VSRMCA15_SMRIP_EN
Type	-	W	W	-	W	-	W
Reset	-	?	?	-	?	-	?

VSRMCA15_CON3

Address: 0x0240

Bit	15	11	7	5	3
Name	PMIC_QI_VSRMCA15_SLPO_OUT	PMIC_QI_VSRMCA15_SLP	Reserved	PMIC_VSRMCA15_SAWCAL_TD	PMIC_VSRMCA15_SLP
Type	R	R	-	W	W
Reset	?	?	-	?	?

VSRMCA15_CON4

Address: 0x0242

Bit	15	7
Name	Reserved	PMIC_RG_VSRMCA15_RSV
Type	-	W
Reset	-	?

VSRMCA15_CON5

Address: 0x0244

Bit	15	5	4	3	2	1	0
Name	Reserved	PMIC_VSRMCA15_TRACK_SLEEP_CTRL	PMIC_VSRMCA15_TRACK_ON_CTRL	PMIC_VSRMCA15_BURST_CTRL	PMIC_VSRMCA15_DLC_CTRL	PMIC_VSRMCA15_VOSEL_CTRL	PMIC_VSRMCA15_EN_CTRL
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

VSRMCA15_CON6

Address: 0x0246

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VSRMCA15_BURST_SEL	Reserved	PMIC_VSRMCA15_DLC_SEL	Reserved	PMIC_VSRMCA15_VOSEL_SEL	Reserved	PMIC_VSRMCA15_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA15_CON7

Address: 0x0248

Bit	15	14	13	12	11	5	3	0
Name	PMIC_QI_VSRMCA15_OC_STATUS	PMIC_QI_VSRMCA15_MODE	PMIC_QI_VSRMCA15_EN	PMIC_QI_VSRMCA15_STB	Reserved	PMIC_VSRMCA15_STBTD	Reserved	PMIC_VSRMCA15_EN
Type	R	R	R	R	-	W	-	W
Reset	?	?	?	?	-	?	-	?

VSRMCA15_CON8

Address: 0x024A

Bit	15	14	7	6
Name	PMIC_VSRMCA15_SFCHG_REN	PMIC_VSRMCA15_SFCHG_RRATE	PMIC_VSRMCA15_SFCHG_FEN	PMIC_VSRMCA15_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VSRMCA15_CON9

Address: 0x024C

Bit	15	6
Name	Reserved	PMIC_VSRMCA15_VOSEL
Type	-	W
Reset	-	?

VSRMCA15_CON10

Address: 0x024E

Bit	15	6
Name	Reserved	PMIC_VSRMCA15_VOSEL_ON
Type	-	W
Reset	-	?

VSRMCA15_CON11

Address: 0x0250

Bit	15	6
Name	Reserved	PMIC_VSRMCA15_VOSEL_SLEEP
Type	-	W
Reset	-	?

VSRMCA15_CON12

Address: 0x0252

Bit	15	6
Name	Reserved	PMIC_NI_VSRMCA15_VOSEL
Type	-	R
Reset	-	?

VSRMCA15_CON13

Address: 0x0254

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_QI_VSRMCA15_BURST	Reserved	PMIC_VSRMCA15_BURST_SLEEP	Reserved	PMIC_VSRMCA15_BURST_ON	Reserved	PMIC_VSRMCA15_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA15_CON14

Address: 0x0256

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VSRMCA15_DLC	Reserved	PMIC_VSRMCA15_DLC_SLEEP	Reserved	PMIC_VSRMCA15_DLC_ON	Reserved	PMIC_VSRMCA15_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA15_CON15

Address: 0x0258

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VSRMCA15_DLC_N	Reserved	PMIC_VSRMCA15_DLC_N_SLEEP	Reserved	PMIC_VSRMCA15_DLC_N_ON	Reserved	PMIC_VSRMCA15_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA15_CON16

Address: 0x025A

Bit	15	13	11
Name	Reserved	PMIC_QI_VSRMCA15_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VSRMCA15_CON17

Address: 0x025C

Bit	15	13	11
Name	Reserved	PMIC_QI_VSRMCA15_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VSRMCA15_CON18

Address: 0x025E

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VSRMCA15_VSLEEP_SEL	PMIC_NI_VSRMCA15_R2R_PDN	Reserved	PMIC_VSRMCA15_VSLEEP_SEL	PMIC_VSRMCA15_R2R_PDN	Reserved	PMIC_VSRMCA15_VSLEEP_EN	PMIC_NI_VSRMCA15_VOSEL_TRANS	PMIC_VSRMCA15_VOSEL_TRANS_ONCE	PMIC_VSRMCA15_VOSEL_TRANS_EN	Reserved	PMIC_VSRMCA15_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VSRMCA15_CON19

Address: 0x0260

Bit	15	14	7	6
Name	Reserved	PMIC_VSRMCA15_VOSEL_OFFSET	Reserved	PMIC_VSRMCA15_VOSEL_DELTA
Type	-	W	-	W
Reset	-	?	-	?

VSRMCA15_CON20

Address: 0x0262

Bit	15	14	7	6
Name	Reserved	PMIC_VSRMCA15_VOSEL_ON_HB	Reserved	PMIC_VSRMCA15_VOSEL_ON_LB
Type	-	W	-	W
Reset	-	?	-	?

VSRMCA15_CON21

Address: 0x0264

Bit	15	6
Name	Reserved	PMIC_VSRMCA15_VOSEL_SLEEP_LB
Type	-	W
Reset	-	?

VCORE_CON0

Address: 0x0266

Bit	15	5
Name	Reserved	PMIC_RG_VCORE_ZXOS_TRIM
Type	-	W
Reset	-	?

VCORE_CON1

Address: 0x0268

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VCORE_ZX_OS	Reserved	PMIC_RG_VCORE_CSL	PMIC_RG_VCORE_CSR	PMIC_RG_VCORE_CC	Reserved	PMIC_RG_VCORE_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VCORE_CON2

Address: 0x026A

Bit	15	9	8	7	6	3	2
Name	Reserved	PMIC_RG_VCORE_NDIS_EN	PMIC_RG_VCORE_MODESET	Reserved	PMIC_RG_VCORE_CSM	PMIC_RG_VCORE_AVP_EN	PMIC_RG_VCORE_AVP_OS
Type	-	W	W	-	W	W	W
Reset	-	?	?	-	?	?	?

VCORE_CON3

Address: 0x026C

Bit	15	1
Name	Reserved	PMIC_RG_VCORE_SLP
Type	-	W
Reset	-	?

VCORE_CON4

Address: 0x026E

Bit	15	7
Name	Reserved	PMIC_RG_VCORE_RSV
Type	-	W
Reset	-	?

VCORE_CON5

Address: 0x0270

Bit	15	3	2	1	0
Name	Reserved	PMIC_VCORE_BURST_CTRL	PMIC_VCORE_DLC_CTRL	PMIC_VCORE_VOSEL_CTRL	PMIC_VCORE_EN_CTRL
Type	-	W	W	W	W
Reset	-	?	?	?	?

VCORE_CON6

Address: 0x0272

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VCORE_BURST_SEL	Reserved	PMIC_VCORE_DLC_SEL	Reserved	PMIC_VCORE_VOSEL_SEL	Reserved	PMIC_VCORE_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCORE_CON7

Address: 0x0274

Bit	15	14	13	12	11	0
Name	PMIC_QI_VCORE_OC_STATUS	PMIC_QI_VCORE_MODE	PMIC_QI_VCORE_EN	PMIC_QI_VCORE_STB	Reserved	PMIC_VCORE_EN
Type	R	R	R	R	-	W
Reset	?	?	?	?	-	?

VCORE_CON8

Address: 0x0276

Bit	15	14	7	6
Name	PMIC_VCORE_SFCHG_REN	PMIC_VCORE_SFCHG_RRATE	PMIC_VCORE_SFCHG_FEN	PMIC_VCORE_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VCORE_CON9

Address: 0x0278

Bit	15	6
Name	Reserved	PMIC_VCORE_VOSEL
Type	-	W
Reset	-	?

VCORE_CON10

Address: 0x027A

Bit	15	6
Name	Reserved	PMIC_VCORE_VOSEL_ON
Type	-	W
Reset	-	?

VCORE_CON11

Address: 0x027C

Bit	15	6
Name	Reserved	PMIC_VCORE_VOSEL_SLEEP
Type	-	W
Reset	-	?

VCORE_CON12

Address: 0x027E

Bit	15	6
Name	Reserved	PMIC_NI_VCORE_VOSEL
Type	-	R
Reset	-	?

VCORE_CON13

Address: 0x0280

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCORE_BURST	Reserved	PMIC_VCORE_BURST_SLEEP	Reserved	PMIC_VCORE_BURST_ON	Reserved	PMIC_VCORE_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCORE_CON14

Address: 0x0282

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCORE_DLC	Reserved	PMIC_VCORE_DLC_SLEEP	Reserved	PMIC_VCORE_DLC_ON	Reserved	PMIC_VCORE_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCORE_CON15

Address: 0x0284

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VCORE_DLC_N	Reserved	PMIC_VCORE_DLC_N_SLEEP	Reserved	PMIC_VCORE_DLC_N_ON	Reserved	PMIC_VCORE_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VCORE_CON16

Address: 0x0286

Bit	15	13	11
Name	Reserved	PMIC_QI_VCORE_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VCORE_CON17

Address: 0x0288

Bit	15	13	11
Name	Reserved	PMIC_QI_VCORE_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VCORE_CON18

Address: 0x028A

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VCORE_VSLEEP_SEL	PMIC_NI_VCORE_R2R_PDN	Reserved	PMIC_VCORE_VSLEEP_SEL	PMIC_VCORE_R2R_PDN	Reserved	PMIC_VCORE_VSLEEP_EN	PMIC_NI_VCORE_VOSEL_TRANS	PMIC_VCORE_VOSEL_TRANS_ONCE	PMIC_VCORE_VOSEL_TRANS_EN	Reserved	PMIC_VCORE_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VGPU_CON0

Address: 0x028C

Bit	15	5
Name	Reserved	PMIC_RG_VGPU_ZXOS_TRIM
Type	-	W
Reset	-	?

VGPU_CON1

Address: 0x028E

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VGPU_ZX_OS	Reserved	PMIC_RG_VGPU_CSL	PMIC_RG_VGPU_CSR	PMIC_RG_VGPU_CC	Reserved	PMIC_RG_VGPU_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VGPU_CON2

Address: 0x0290

Bit	15	9	8	7	6	3	2
Name	Reserved	PMIC_RG_VGPU_NDIS_EN	PMIC_RG_VGPU_MODESET	Reserved	PMIC_RG_VGPU_CSM	PMIC_RG_VGPU_AVP_EN	PMIC_RG_VGPU_AVP_OS
Type	-	W	W	-	W	W	W
Reset	-	?	?	-	?	?	?

VGPU_CON3

Address: 0x0292

Bit	15	1
Name	Reserved	PMIC_RG_VGPU_SLP
Type	-	W
Reset	-	?

VGPU_CON4

Address: 0x0294

Bit	15	7
Name	Reserved	PMIC_RG_VGPU_RSV
Type	-	W
Reset	-	?

VGPU_CON5

Address: 0x0296

Bit	15	3	2	1	0
Name	Reserved	PMIC_VGPU_BURST_CTRL	PMIC_VGPU_DLC_CTRL	PMIC_VGPU_VOSEL_CTRL	PMIC_VGPU_EN_CTRL
Type	-	W	W	W	W
Reset	-	?	?	?	?

VGPU_CON6

Address: 0x0298

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VGPU_BURST_SEL	Reserved	PMIC_VGPU_DLC_SEL	Reserved	PMIC_VGPU_VOSEL_SEL	Reserved	PMIC_VGPU_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VGPU_CON7

Address: 0x029A

Bit	15	14	13	12	11	5	3	0
Name	PMIC_QI_VGPU_OC_STATUS	PMIC_QI_VGPU_MODE	PMIC_QI_VGPU_EN	PMIC_QI_VGPU_STB	Reserved	PMIC_VGPU_STBTD	Reserved	PMIC_VGPU_EN
Type	R	R	R	R	-	W	-	W
Reset	?	?	?	?	-	?	-	?

VGPU_CON8

Address: 0x029C

Bit	15	14	7	6
Name	PMIC_VGPU_SFCHG_REN	PMIC_VGPU_SFCHG_RRATE	PMIC_VGPU_SFCHG_FEN	PMIC_VGPU_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VGPU_CON9

Address: 0x029E

Bit	15	6
Name	Reserved	PMIC_VGPU_VOSEL
Type	-	W
Reset	-	?

VGPU_CON10

Address: 0x02A0

Bit	15	6
Name	Reserved	PMIC_VGPU_VOSEL_ON
Type	-	W
Reset	-	?

VGPU_CON11

Address: 0x02A2

Bit	15	6
Name	Reserved	PMIC_VGPU_VOSEL_SLEEP
Type	-	W
Reset	-	?

VGPU_CON12

Address: 0x02A4

Bit	15	6
Name	Reserved	PMIC_NI_VGPU_VOSEL
Type	-	R
Reset	-	?

VGPU_CON13

Address: 0x02A6

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VGPU_BURST	Reserved	PMIC_VGPU_BURST_SLEEP	Reserved	PMIC_VGPU_BURST_ON	Reserved	PMIC_VGPU_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VGPU_CON14

Address: 0x02A8

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VGPU_DLC	Reserved	PMIC_VGPU_DLC_SLEEP	Reserved	PMIC_VGPU_DLC_ON	Reserved	PMIC_VGPU_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VGPU_CON15

Address: 0x02AA

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VGPU_DLC_N	Reserved	PMIC_VGPU_DLC_N_SLEEP	Reserved	PMIC_VGPU_DLC_N_ON	Reserved	PMIC_VGPU_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VGPU_CON16

Address: 0x02AC

Bit	15	13	11
Name	Reserved	PMIC_QI_VGPU_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VGPU_CON17

Address: 0x02AE

Bit	15	13	11
Name	Reserved	PMIC_QI_VGPU_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VGPU_CON18

Address: 0x02B0

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VGPU_VSLEEP_SEL	PMIC_NI_VGPU_R2R_PDN	Reserved	PMIC_VGPU_VSLEEP_SEL	PMIC_VGPU_R2R_PDN	Reserved	PMIC_VGPU_VSLEEP_EN	PMIC_NI_VGPU_VOSEL_TRANS	PMIC_VGPU_VOSEL_TRANS_ONCE	PMIC_VGPU_VOSEL_TRANS_EN	Reserved	PMIC_VGPU_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VIO18_CON0

Address: 0x0300

Bit	15	2
Name	Reserved	PMIC_RG_VIO18_TRIM
Type	-	W
Reset	-	?

VIO18_CON1

Address: 0x0302

Bit	15	13	11	9	7	5	3	1
Name	PMIC_RG_VIO18_ZX_OS	PMIC_RG_VIO18_SLEW	PMIC_RG_VIO18_SLEW_NMOS	PMIC_RG_VIO18_CSL	PMIC_RG_VIO18_CSR	PMIC_RG_VIO18_CC	Reserved	PMIC_RG_VIO18_RZSEL
Type	W	W	W	W	W	W	-	W
Reset	?	?	?	?	?	?	-	?

VIO18_CON2

Address: 0x0304

Bit	15	13	11	9	8	7
Name	Reserved	PMIC_RG_VIO18_CSMIR	Reserved	PMIC_RG_VIO18_NDIS_EN	PMIC_RG_VIO18_MODESET	Reserved
Type	-	W	-	W	W	-
Reset	-	?	-	?	?	-

VIO18_CON3

Address: 0x0306

Bit	15	1
Name	Reserved	PMIC_RG_VIO18_SLP
Type	-	W
Reset	-	?

VIO18_CON4

Address: 0x0308

Bit	15	7
Name	Reserved	PMIC_RG_VIO18_RSV
Type	-	W
Reset	-	?

VIO18_CON5

Address: 0x030A

Bit	15	3	2	1	0
Name	Reserved	PMIC_VIO18_BURST_CTRL	PMIC_VIO18_DLC_CTRL	PMIC_VIO18_VOSEL_CTRL	PMIC_VIO18_EN_CTRL
Type	-	W	W	W	W
Reset	-	?	?	?	?

VIO18_CON6

Address: 0x030C

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VIO18_BURST_SEL	Reserved	PMIC_VIO18_DLC_SEL	Reserved	PMIC_VIO18_VOSEL_SEL	Reserved	PMIC_VIO18_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VIO18_CON7

Address: 0x030E

Bit	15	14	13	12	11	0
Name	PMIC_QI_VIO18_OC_STATUS	PMIC_QI_VIO18_MODE	PMIC_QI_VIO18_EN	PMIC_QI_VIO18_STB	Reserved	PMIC_VIO18_EN
Type	R	R	R	R	-	W
Reset	?	?	?	?	-	?

VIO18_CON8

Address: 0x0310

Bit	15	14	7	6
Name	PMIC_VIO18_SFCHG_REN	PMIC_VIO18_SFCHG_RRATE	PMIC_VIO18_SFCHG_FEN	PMIC_VIO18_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VIO18_CON9

Address: 0x0312

Bit	15	4
Name	Reserved	PMIC_VIO18_VOSEL
Type	-	W
Reset	-	?

VIO18_CON10

Address: 0x0314

Bit	15	4
Name	Reserved	PMIC_VIO18_VOSEL_ON
Type	-	W
Reset	-	?

VIO18_CON11

Address: 0x0316

Bit	15	4
Name	Reserved	PMIC_VIO18_VOSEL_SLEEP
Type	-	W
Reset	-	?

VIO18_CON12

Address: 0x0318

Bit	15	4
Name	Reserved	PMIC_NI_VIO18_VOSEL
Type	-	R
Reset	-	?

VIO18_CON13

Address: 0x031A

Bit	15	13	11
Name	Reserved	PMIC_QI_VIO18_BURST	Reserved
Type	-	R	-
Reset	-	?	-

VIO18_CON14

Address: 0x031C

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VIO18_DLC	Reserved	PMIC_VIO18_DLC_SLEEP	Reserved	PMIC_VIO18_DLC_ON	Reserved	PMIC_VIO18_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VIO18_CON15

Address: 0x031E

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VIO18_DLC_N	Reserved	PMIC_VIO18_DLC_N_SLEEP	Reserved	PMIC_VIO18_DLC_N_ON	Reserved	PMIC_VIO18_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VIO18_CON16

Address: 0x0320

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VIO18_BURSTH	Reserved	PMIC_VIO18_BURSTH_SLEEP	Reserved	PMIC_VIO18_BURSTH_ON	Reserved	PMIC_VIO18_BURSTH
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VIO18_CON17

Address: 0x0322

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VIO18_BURSTL	Reserved	PMIC_VIO18_BURSTL_SLEEP	Reserved	PMIC_VIO18_BURSTL_ON	Reserved	PMIC_VIO18_BURSTL
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VIO18_CON18

Address: 0x0324

Bit	15	14	13	10	9	8	7
Name	Reserved	PMIC_QI_VIO18_SLEEP_PDN	Reserved	PMIC_VIO18_SLEEP_PDN	Reserved	PMIC_VIO18_VSLEEP_EN	Reserved
Type	-	R	-	W	-	W	-
Reset	-	?	-	?	-	?	-

VPCA7_CON0

Address: 0x0326

Bit	15	5
Name	Reserved	PMIC_RG_VPCA7_ZXOS_TRIM
Type	-	W
Reset	-	?

VPCA7_CON1

Address: 0x0328

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VPCA7_ZX_OS	Reserved	PMIC_RG_VPCA7_CSL	PMIC_RG_VPCA7_CSR	PMIC_RG_VPCA7_CC	Reserved	PMIC_RG_VPCA7_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VPCA7_CON2

Address: 0x032A

Bit	15	9	8	7	6	3	0
Name	Reserved	PMIC_RG_VPCA7_NDIS_EN	PMIC_RG_VPCA7_MODESET	Reserved	PMIC_RG_VPCA7_CSM	Reserved	PMIC_RG_VPCA7_SMRIP_EN
Type	-	W	W	-	W	-	W
Reset	-	?	?	-	?	-	?

VPCA7_CON3

Address: 0x032C

Bit	15	11	7	5	3
Name	PMIC_QI_VPCA7_SLPO_OUT	PMIC_QI_VPCA7_SLP	Reserved	PMIC_VPCA7_SAWCAL_TD	PMIC_VPCA7_SLP
Type	R	R	-	W	W
Reset	?	?	-	?	?

VPCA7_CON4

Address: 0x032E

Bit	15	7
Name	Reserved	PMIC_RG_VPCA7_RSV
Type	-	W
Reset	-	?

VPCA7_CON5

Address: 0x0330

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_VPCA7_TRACK_ON_CTRL	PMIC_VPCA7_BURST_CTRL	PMIC_VPCA7_DLC_CTRL	PMIC_VPCA7_VOSEL_CTRL	PMIC_VPCA7_EN_CTRL
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

VPCA7_CON6

Address: 0x0332

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VPCA7_BURST_SEL	Reserved	PMIC_VPCA7_DLC_SEL	Reserved	PMIC_VPCA7_VOSEL_SEL	Reserved	PMIC_VPCA7_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VPCA7_CON7

Address: 0x0334

Bit	15	14	13	12	11	5	3	0
Name	PMIC_QI_VPCA7_OC_STATUS	PMIC_QI_VPCA7_MODE	PMIC_QI_VPCA7_EN	PMIC_QI_VPCA7_STB	Reserved	PMIC_VPCA7_STBTD	Reserved	PMIC_VPCA7_EN
Type	R	R	R	R	-	W	-	W
Reset	?	?	?	?	-	?	-	?

VPCA7_CON8

Address: 0x0336

Bit	15	14	7	6
Name	PMIC_VPCA7_SFCHG_REN	PMIC_VPCA7_SFCHG_RRATE	PMIC_VPCA7_SFCHG_FEN	PMIC_VPCA7_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VPCA7_CON9

Address: 0x0338

Bit	15	6
Name	Reserved	PMIC_VPCA7_VOSEL
Type	-	W
Reset	-	?

VPCA7_CON10

Address: 0x033A

Bit	15	6
Name	Reserved	PMIC_VPCA7_VOSEL_ON
Type	-	W
Reset	-	?

VPCA7_CON11

Address: 0x033C

Bit	15	6
Name	Reserved	PMIC_VPCA7_VOSEL_SLEEP
Type	-	W
Reset	-	?

VPCA7_CON12

Address: 0x033E

Bit	15	6
Name	Reserved	PMIC_NI_VPCA7_VOSEL
Type	-	R
Reset	-	?

VPCA7_CON13

Address: 0x0340

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_QI_VPCA7_BURST	Reserved	PMIC_VPCA7_BURST_SLEEP	Reserved	PMIC_VPCA7_BURST_ON	Reserved	PMIC_VPCA7_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VPCA7_CON14

Address: 0x0342

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VPCA7_DLC	Reserved	PMIC_VPCA7_DLC_SLEEP	Reserved	PMIC_VPCA7_DLC_ON	Reserved	PMIC_VPCA7_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VPCA7_CON15

Address: 0x0344

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VPCA7_DLC_N	Reserved	PMIC_VPCA7_DLC_N_SLEEP	Reserved	PMIC_VPCA7_DLC_N_ON	Reserved	PMIC_VPCA7_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VPCA7_CON16

Address: 0x0346

Bit	15	13	11
Name	Reserved	PMIC_QI_VPCA7_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VPCA7_CON17

Address: 0x0348

Bit	15	13	11
Name	Reserved	PMIC_QI_VPCA7_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VPCA7_CON18

Address: 0x034A

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VPCA7_VSLEEP_SEL	PMIC_NI_VPCA7_R2R_PDN	Reserved	PMIC_VPCA7_VSLEEP_SEL	PMIC_VPCA7_R2R_PDN	Reserved	PMIC_VPCA7_VSLEEP_EN	PMIC_NI_VPCA7_VOSEL_TRANS	PMIC_VPCA7_VOSEL_TRANS_ONCE	PMIC_VPCA7_VOSEL_TRANS_EN	Reserved	PMIC_VPCA7_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VSRMCA7_CON0

Address: 0x034C

Bit	15	5
Name	Reserved	PMIC_RG_VSRMCA7_ZXOS_TRIM
Type	-	W
Reset	-	?

VSRMCA7_CON1

Address: 0x034E

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VSRMCA7_ZX_OS	Reserved	PMIC_RG_VSRMCA7_CSL	PMIC_RG_VSRMCA7_CSR	PMIC_RG_VSRMCA7_CC	Reserved	PMIC_RG_VSRMCA7_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VSRMCA7_CON2

Address: 0x0350

Bit	15	9	8	7	6	3	0
Name	Reserved	PMIC_RG_VSRMCA7_NDIS_EN	PMIC_RG_VSRMCA7_MODESET	Reserved	PMIC_RG_VSRMCA7_CSM	Reserved	PMIC_RG_VSRMCA7_SMRIP_EN
Type	-	W	W	-	W	-	W
Reset	-	?	?	-	?	-	?

VSRMCA7_CON3

Address: 0x0352

Bit	15	11	7	5	3
Name	PMIC_QI_VSRMCA7_SLPO_OUT	PMIC_QI_VSRMCA7_SLP	Reserved	PMIC_VSRMCA7_SAWCAL_TD	PMIC_VSRMCA7_SLP
Type	R	R	-	W	W
Reset	?	?	-	?	?

VSRMCA7_CON4

Address: 0x0354

Bit	15	7
Name	Reserved	PMIC_RG_VSRMCA7_RSV
Type	-	W
Reset	-	?

VSRMCA7_CON5

Address: 0x0356

Bit	15	5	4	3	2	1	0
Name	Reserved	PMIC_VSRMCA7_TRACK_SLEEP_CTRL	PMIC_VSRMCA7_TRACK_ON_CTRL	PMIC_VSRMCA7_BURST_CTRL	PMIC_VSRMCA7_DLC_CTRL	PMIC_VSRMCA7_VOSEL_CTRL	PMIC_VSRMCA7_EN_CTRL
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

VSRMCA7_CON6

Address: 0x0358

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VSRMCA7_BURST_SEL	Reserved	PMIC_VSRMCA7_DLC_SEL	Reserved	PMIC_VSRMCA7_VOSEL_SEL	Reserved	PMIC_VSRMCA7_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA7_CON7

Address: 0x035A

Bit	15	14	13	12	11	5	3	0
Name	PMIC_QI_VSRMCA7_OC_STATUS	PMIC_QI_VSRMCA7_MODE	PMIC_QI_VSRMCA7_EN	PMIC_QI_VSRMCA7_STB	Reserved	PMIC_VSRMCA7_STBTD	Reserved	PMIC_VSRMCA7_EN
Type	R	R	R	R	-	W	-	W
Reset	?	?	?	?	-	?	-	?

VSRMCA7_CON8

Address: 0x035C

Bit	15	14	7	6
Name	PMIC_VSRMCA7_SFCHG_REN	PMIC_VSRMCA7_SFCHG_RRATE	PMIC_VSRMCA7_SFCHG_FEN	PMIC_VSRMCA7_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VSRMCA7_CON9

Address: 0x035E

Bit	15	6
Name	Reserved	PMIC_VSRMCA7_VOSEL
Type	-	W
Reset	-	?

VSRMCA7_CON10

Address: 0x0360

Bit	15	6
Name	Reserved	PMIC_VSRMCA7_VOSEL_ON
Type	-	W
Reset	-	?

VSRMCA7_CON11

Address: 0x0362

Bit	15	6
Name	Reserved	PMIC_VSRMCA7_VOSEL_SLEEP
Type	-	W
Reset	-	?

VSRMCA7_CON12

Address: 0x0364

Bit	15	6
Name	Reserved	PMIC_NI_VSRMCA7_VOSEL
Type	-	R
Reset	-	?

VSRMCA7_CON13

Address: 0x0366

Bit	15	14	11	10	7	6	3	2
Name	Reserved	PMIC_QI_VSRMCA7_BURST	Reserved	PMIC_VSRMCA7_BURST_SLEEP	Reserved	PMIC_VSRMCA7_BURST_ON	Reserved	PMIC_VSRMCA7_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA7_CON14

Address: 0x0368

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VSRMCA7_DLC	Reserved	PMIC_VSRMCA7_DLC_SLEEP	Reserved	PMIC_VSRMCA7_DLC_ON	Reserved	PMIC_VSRMCA7_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA7_CON15

Address: 0x036A

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VSRMCA7_DLC_N	Reserved	PMIC_VSRMCA7_DLC_N_SLEEP	Reserved	PMIC_VSRMCA7_DLC_N_ON	Reserved	PMIC_VSRMCA7_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VSRMCA7_CON16

Address: 0x036C

Bit	15	13	11
Name	Reserved	PMIC_QI_VSRMCA7_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VSRMCA7_CON17

Address: 0x036E

Bit	15	13	11
Name	Reserved	PMIC_QI_VSRMCA7_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VSRMCA7_CON18

Address: 0x0370

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VSRMCA7_VSLEEP_SEL	PMIC_NI_VSRMCA7_R2R_PDN	Reserved	PMIC_VSRMCA7_VSLEEP_SEL	PMIC_VSRMCA7_R2R_PDN	Reserved	PMIC_VSRMCA7_VSLEEP_EN	PMIC_NI_VSRMCA7_VOSEL_TRANS	PMIC_VSRMCA7_VOSEL_TRANS_ONCE	PMIC_VSRMCA7_VOSEL_TRANS_EN	Reserved	PMIC_VSRMCA7_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

VSRMCA7_CON19

Address: 0x0372

Bit	15	14	7	6
Name	Reserved	PMIC_VSRMCA7_VOSEL_OFFSET	Reserved	PMIC_VSRMCA7_VOSEL_DELTA
Type	-	W	-	W
Reset	-	?	-	?

VSRMCA7_CON20

Address: 0x0374

Bit	15	14	7	6
Name	Reserved	PMIC_VSRMCA7_VOSEL_ON_HB	Reserved	PMIC_VSRMCA7_VOSEL_ON_LB
Type	-	W	-	W
Reset	-	?	-	?

VSRMCA7_CON21

Address: 0x0376

Bit	15	6
Name	Reserved	PMIC_VSRMCA7_VOSEL_SLEEP_LB
Type	-	W
Reset	-	?

VDRM_CON0

Address: 0x0378

Bit	15	5
Name	Reserved	PMIC_RG_VDRM_ZXOS_TRIM
Type	-	W
Reset	-	?

VDRM_CON1

Address: 0x037A

Bit	15	13	9	7	5	3	1
Name	PMIC_RG_VDRM_ZX_OS	Reserved	PMIC_RG_VDRM_CSL	PMIC_RG_VDRM_CSR	PMIC_RG_VDRM_CC	Reserved	PMIC_RG_VDRM_RZSEL
Type	W	-	W	W	W	-	W
Reset	?	-	?	?	?	-	?

VDRM_CON2

Address: 0x037C

Bit	15	9	8	7	6	3	2
Name	Reserved	PMIC_RG_VDRM_NDIS_EN	PMIC_RG_VDRM_MODESET	Reserved	PMIC_RG_VDRM_CSM	PMIC_RG_VDRM_AVP_EN	PMIC_RG_VDRM_AVP_OS
Type	-	W	W	-	W	W	W
Reset	-	?	?	-	?	?	?

VDRM_CON3

Address: 0x037E

Bit	15	1
Name	Reserved	PMIC_RG_VDRM_SLP
Type	-	W
Reset	-	?

VDRM_CON4

Address: 0x0380

Bit	15	7
Name	Reserved	PMIC_RG_VDRM_RSV
Type	-	W
Reset	-	?

VDRM_CON5

Address: 0x0382

Bit	15	3	2	1	0
Name	Reserved	PMIC_VDRM_BURST_CTRL	PMIC_VDRM_DLC_CTRL	PMIC_VDRM_VOSEL_CTRL	PMIC_VDRM_EN_CTRL
Type	-	W	W	W	W
Reset	-	?	?	?	?

VDRM_CON6

Address: 0x0384

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_VDRM_BURST_SEL	Reserved	PMIC_VDRM_DLC_SEL	Reserved	PMIC_VDRM_VOSEL_SEL	Reserved	PMIC_VDRM_EN_SEL
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VDRM_CON7

Address: 0x0386

Bit	15	14	13	12	11	0
Name	PMIC_QI_VDRM_OC_STATUS	PMIC_QI_VDRM_MODE	PMIC_QI_VDRM_EN	PMIC_QI_VDRM_STB	Reserved	PMIC_VDRM_EN
Type	R	R	R	R	-	W
Reset	?	?	?	?	-	?

VDRM_CON8

Address: 0x0388

Bit	15	14	7	6
Name	PMIC_VDRM_SFCHG_REN	PMIC_VDRM_SFCHG_RRATE	PMIC_VDRM_SFCHG_FEN	PMIC_VDRM_SFCHG_FRATE
Type	W	W	W	W
Reset	?	?	?	?

VDRM_CON9

Address: 0x038A

Bit	15	6
Name	Reserved	PMIC_VDRM_VOSEL
Type	-	W
Reset	-	?

VDRM_CON10

Address: 0x038C

Bit	15	6
Name	Reserved	PMIC_VDRM_VOSEL_ON
Type	-	W
Reset	-	?

VDRM_CON11

Address: 0x038E

Bit	15	6
Name	Reserved	PMIC_VDRM_VOSEL_SLEEP
Type	-	W
Reset	-	?

VDRM_CON12

Address: 0x0390

Bit	15	6
Name	Reserved	PMIC_NI_VDRM_VOSEL
Type	-	R
Reset	-	?

VDRM_CON13

Address: 0x0392

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VDRM_BURST	Reserved	PMIC_VDRM_BURST_SLEEP	Reserved	PMIC_VDRM_BURST_ON	Reserved	PMIC_VDRM_BURST
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VDRM_CON14

Address: 0x0394

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VDRM_DLC	Reserved	PMIC_VDRM_DLC_SLEEP	Reserved	PMIC_VDRM_DLC_ON	Reserved	PMIC_VDRM_DLC
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VDRM_CON15

Address: 0x0396

Bit	15	13	11	9	7	5	3	1
Name	Reserved	PMIC_QI_VDRM_DLC_N	Reserved	PMIC_VDRM_DLC_N_SLEEP	Reserved	PMIC_VDRM_DLC_N_ON	Reserved	PMIC_VDRM_DLC_N
Type	-	R	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

VDRM_CON16

Address: 0x0398

Bit	15	13	11
Name	Reserved	PMIC_QI_VDRM_BURSTH	Reserved
Type	-	R	-
Reset	-	?	-

VDRM_CON17

Address: 0x039A

Bit	15	13	11
Name	Reserved	PMIC_QI_VDRM_BURSTL	Reserved
Type	-	R	-
Reset	-	?	-

VDRM_CON18

Address: 0x039C

Bit	15	14	13	11	10	9	8	7	6	5	3	1
Name	PMIC_NI_VDRM_VSLEEP_SEL	PMIC_NI_VDRM_R2R_PDN	Reserved	PMIC_VDRM_VSLEEP_SEL	PMIC_VDRM_R2R_PDN	Reserved	PMIC_VDRM_VSLEEP_EN	PMIC_NI_VDRM_VOSEL_TRANS	PMIC_VDRM_VOSEL_TRANS_ONCE	PMIC_VDRM_VOSEL_TRANS_EN	Reserved	PMIC_VDRM_TRANSTD
Type	R	R	-	W	W	-	W	R	W	W	-	W
Reset	?	?	-	?	?	-	?	?	?	?	-	?

BUCK_K_CON0

Address: 0x039E

Bit	15	12	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_K_CONTROL_SMPS	Reserved	PMIC_K_AUTO_EN	PMIC_K_SRC_SEL	PMIC_K_START_MANUAL	PMIC_K_ONCE	PMIC_K_ONCE_EN	PMIC_K_MAP_SEL	PMIC_K_RST_DONE
Type	-	W	-	W	W	W	W	W	W	W
Reset	-	?	-	?	?	?	?	?	?	?

BUCK_K_CON1

Address: 0x03A0

Bit	15	12	7	2	1	0
Name	Reserved	PMIC_QI_SMPS_OSC_CAL	PMIC_K_CONTROL	Reserved	PMIC_K_DONE	PMIC_K_RESULT
Type	-	R	R	-	R	R
Reset	-	?	?	-	?	?

ANALDO_CON0

Address: 0x0400

Bit	15	14	12	11	10	9	7	6	4	2	1	0
Name	PMIC_QI_VTCXO_EN	PMIC_VTCXO_SRCLK_EN_SEL	Reserved	PMIC_VTCXO_ON_CTRL	PMIC_RG_VTCXO_EN	PMIC_RG_VTCXO_STBTD	PMIC_QI_VTCXO_MODE	PMIC_VTCXO_SRCLK_MODE_SEL	PMIC_VTCXOTD_SEL	PMIC_RG_VTCXO_OCFB_EN	PMIC_VTCXO_LP_SET	PMIC_VTCXO_LP_SEL
Type	R	W	-	W	W	W	R	W	W	W	W	W
Reset	?	?	-	?	?	?	?	?	?	?	?	?

ANALDO_CON1

Address: 0x0402

Bit	15	14	13	11	7	6	5	3	1	0
Name	PMIC_QI_VA28_EN	PMIC_RG_VA28_EN	PMIC_RG_VA28_STBTD	Reserved	PMIC_QI_VA28_MODE	Reserved	PMIC_VA28_SRCLK_MODE_SEL	Reserved	PMIC_VA28_LP_SET	PMIC_VA28_LP_SEL
Type	R	W	W	-	R	-	W	-	W	W
Reset	?	?	?	-	?	-	?	-	?	?

ANALDO_CON2

Address: 0x0404

Bit	15	14	13	11	2	1
Name	PMIC_RG_VCAMA_EN	Reserved	PMIC_RG_VCAMA_STBTD	Reserved	PMIC_RG_VCAMA_OCFB_EN	Reserved
Type	W	-	W	-	W	-
Reset	?	-	?	-	?	-

ANALDO_CON3

Address: 0x0406

Bit	15	3	2	1	0
Name	Reserved	PMIC_QI_VTCXO_OC_STATUS	PMIC_QI_VA28_OC_STATUS	PMIC_QI_VCAMA_OC_STATUS	PMIC_RG_VA28_BIST_EN
Type	-	R	R	R	W
Reset	-	?	?	?	?

ANALDO_CON4

Address: 0x0408

Bit	15	11	7	4	3
Name	Reserved	PMIC_RG_VTCXO_CAL	Reserved	PMIC_RG_VTCXO_NDIS_EN	Reserved
Type	-	W	-	W	-
Reset	-	?	-	?	-

ANALDO_CON5

Address: 0x040A

Bit	15	11	7	6	5	4	3
Name	Reserved	PMIC_RG_VA28_CAL	Reserved	PMIC_RG_VA28_OCFB_EN	Reserved	PMIC_RG_VA28_NDIS_EN	Reserved
Type	-	W	-	W	-	W	-
Reset	-	?	-	?	-	?	-

ANALDO_CON6

Address: 0x040C

Bit	15	11	7	5	4	3	1
Name	Reserved	PMIC_RG_VCAMA_CAL	PMIC_RG_VCAMA_VOSEL	Reserved	PMIC_RG_VCAMA_NDIS_EN	Reserved	PMIC_RG_VCAMA_FBSEL
Type	-	W	W	-	W	-	W
Reset	-	?	?	-	?	-	?

ANALDO_CON7

Address: 0x040E

Bit	15	14	13	12	11	7
Name	PMIC_RG_ALDO_RESERVE_1	Reserved	PMIC_RG_ALDO_RESERVE_2	Reserved	PMIC_ANALDO_RSV0	PMIC_ANALDO_RSV1
Type	W	-	W	-	W	W
Reset	?	-	?	-	?	?

DIGLDO_CON0

Address: 0x0410

Bit	15	14	13	11	7	6	5	3	2	1	0
Name	PMIC_QI_VIO28_EN	PMIC_VIO28_EN	PMIC_RG_VIO28_STBTD	Reserved	PMIC_QI_VIO28_MODE	Reserved	PMIC_VIO28_SRCLK_MODE_SEL	Reserved	PMIC_RG_VIO28_OCFB_EN	PMIC_VIO28_LP_MODE_SET	PMIC_VIO28_LP_SEL
Type	R	W	W	-	R	-	W	-	W	W	W
Reset	?	?	?	-	?	-	?	-	?	?	?

DIGLDO_CON1

Address: 0x0412

Bit	15	14	13	11	7	6	5	3	2	1	0
Name	PMIC_QI_VUSB_EN	PMIC_RG_VUSB_EN	PMIC_RG_VUSB_STBTD	Reserved	PMIC_QI_VUSB_MODE	Reserved	PMIC_VUSB_SRCLK_MODE_SEL	Reserved	PMIC_RG_VUSB_OCFB_EN	PMIC_VUSB_LP_MODE_SET	PMIC_VUSB_LP_SEL
Type	R	W	W	-	R	-	W	-	W	W	W
Reset	?	?	?	-	?	-	?	-	?	?	?

DIGLDO_CON2

Address: 0x0414

Bit	15	14	12	11	9	7	6	5	3	2	1	0
Name	PMIC_QI_VMC_EN	PMIC_RG_VMC_INT_DIS_SEL	PMIC_RG_VMC_EN	Reserved	PMIC_RG_VMC_STBTD	PMIC_QI_VMC_MODE	Reserved	PMIC_VMC_SRCLK_MODE_SEL	Reserved	PMIC_RG_VMC_OCFB_EN	PMIC_VMC_LP_MODE_SET	PMIC_VMC_LP_SEL
Type	R	W	W	-	W	R	-	W	-	W	W	W
Reset	?	?	?	-	?	?	-	?	-	?	?	?

DIGLDO_CON3

Address: 0x0416

Bit	15	14	13	11	7	6	5	3	1	0
Name	PMIC_QI_VMCH_EN	PMIC_RG_VMCH_EN	PMIC_RG_VMCH_STBTD	Reserved	PMIC_QI_VMCH_MODE	Reserved	PMIC_VMCH_SRCLK_MODE_SEL	Reserved	PMIC_VMCH_LP_MODE_SET	PMIC_VMCH_LP_SEL
Type	R	W	W	-	R	-	W	-	W	W
Reset	?	?	?	-	?	-	?	-	?	?

DIGLDO_CON4

Address: 0x0418

Bit	15	14	13	11	7	6	5	3	2	1	0
Name	PMIC_QI_VEMC_3V3_EN	PMIC_RG_VEMC_3V3_EN	PMIC_RG_VEMC_3V3_STBTD	Reserved	PMIC_QI_VEMC_3V3_MODE	Reserved	PMIC_VEMC_3V3_SRCLK_MODE_SEL	Reserved	PMIC_RG_VEMC_3V3_OCFB_EN	PMIC_VEMC_3V3_LP_MODE_SET	PMIC_VEMC_3V3_LP_SEL
Type	R	W	W	-	R	-	W	-	W	W	W
Reset	?	?	?	-	?	-	?	-	?	?	?

DIGLDO_CON5

Address: 0x041A

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VCAMD_SW_EN	Reserved	PMIC_RG_VCAMD_STBTD	Reserved	PMIC_QI_VCAMD_MODE	PMIC_VCAMD_SRCLK_MODE_SEL	Reserved	PMIC_RG_VCAMD_OCFB_EN	PMIC_VCAMD_LP_MODE_SET	PMIC_VCAMD_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON6

Address: 0x041C

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VCAMIO_SW_EN	Reserved	PMIC_RG_VCAMIO_STBTD	Reserved	PMIC_QI_VCAMIO_MODE	PMIC_VCAMIO_SRCLK_MODE_SEL	Reserved	PMIC_RG_VCAMIO_OCFB_EN	PMIC_VCAMIO_LP_MODE_SET	PMIC_VCAMIO_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON7

Address: 0x041E

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VCAMAF_SW_EN	Reserved	PMIC_RG_VCAMAF_STBTD	Reserved	PMIC_QI_VCAMAF_MODE	PMIC_VCAMAF_SRCLK_MODE_SEL	Reserved	PMIC_RG_VCAMAF_OCFB_EN	PMIC_VCAMAF_LP_MODE_SET	PMIC_VCAMAF_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON8

Address: 0x0420

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VGP4_SW_EN	Reserved	PMIC_RG_VGP4_STBTD	Reserved	PMIC_QI_VGP4_MODE	PMIC_VGP4_SRCLK_MODE_SEL	Reserved	PMIC_RG_VGP4_OCFB_EN	PMIC_VGP4_LP_MODE_SET	PMIC_VGP4_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON9

Address: 0x0422

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VGP5_SW_EN	Reserved	PMIC_RG_VGP5_STBTD	Reserved	PMIC_QI_VGP5_MODE	PMIC_VGP5_SRCLK_MODE_SEL	Reserved	PMIC_RG_VGP5_OCFB_EN	PMIC_VGP5_LP_MODE_SET	PMIC_VGP5_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON10

Address: 0x0424

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VGP6_SW_EN	Reserved	PMIC_RG_VGP6_STBTD	Reserved	PMIC_QI_VGP6_MODE	PMIC_VGP6_SRCLK_MODE_SEL	Reserved	PMIC_RG_VGP6_OCFB_EN	PMIC_VGP6_LP_MODE_SET	PMIC_VGP6_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON11

Address: 0x0426

Bit	15	13	7	5	4	2
Name	PMIC_RG_VIBR_MID_STATE	Reserved	PMIC_RG_VIBR_MST_TIME	PMIC_RG_VIBR_SW_MODE	PMIC_RG_VIBR_FR_ORI	Reserved
Type	W	-	W	W	W	-
Reset	?	-	?	?	?	-

DIGLDO_CON12

Address: 0x0428

Bit	15	14	8	7
Name	PMIC_QI_VRTC_EN	Reserved	PMIC_VRTC_EN	Reserved
Type	R	-	W	-
Reset	?	-	?	-

DIGLDO_CON13

Address: 0x042A

Bit	15	14	13	12
Name	PMIC_RG_VIO28_BIST_EN	PMIC_RG_VMCH_BIST_EN	PMIC_RG_VRTC_BIST_EN	Reserved
Type	W	W	W	-
Reset	?	?	?	-

DIGLDO_CON14

Address: 0x042C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3
Name	PMIC_QI_VIO28_OC_STATUS	PMIC_QI_VUSB_OC_STATUS	PMIC_QI_VMC_OC_STATUS	PMIC_QI_VMCH_OC_STATUS	PMIC_QI_VEMC_3V3_OC_STATUS	PMIC_QI_VCAMD_OC_STATUS	PMIC_QI_VCAMIO_OC_STATUS	PMIC_QI_VCAMAF_OC_STATUS	PMIC_QI_VGP4_OC_STATUS	PMIC_QI_VGP5_OC_STATUS	PMIC_QI_VGP6_OC_STATUS	PMIC_QI_VIBR_OC_STATUS	Reserved
Type	R	R	R	R	R	R	R	R	R	R	R	R	-
Reset	?	?	?	?	?	?	?	?	?	?	?	?	-

DIGLDO_CON15

Address: 0x042E

Bit	15	11	7	4	3
Name	Reserved	PMIC_RG_VIO28_CAL	Reserved	PMIC_RG_VIO28_NDIS_EN	Reserved
Type	-	W	-	W	-
Reset	-	?	-	?	-

DIGLDO_CON16

Address: 0x0430

Bit	15	11	7	5	4	3
Name	Reserved	PMIC_RG_VUSB_CAL	Reserved	PMIC_RG_VUSB_STB_SEL	PMIC_RG_VUSB_NDIS_EN	Reserved
Type	-	W	-	W	W	-
Reset	-	?	-	?	?	-

DIGLDO_CON17

Address: 0x0432

Bit	15	11	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_VMCH_CAL	PMIC_RG_VMCH_VOSEL	PMIC_RG_VMCH_STB_SEL	Reserved	PMIC_RG_VMCH_DB_EN	Reserved	PMIC_RG_VMCH_OCFB	Reserved	PMIC_RG_VMCH_NDIS_EN
Type	-	W	W	W	-	W	-	W	-	W
Reset	-	?	?	?	-	?	-	?	-	?

DIGLDO_CON18

Address: 0x0434

Bit	15	8	4	3	1	0
Name	Reserved	PMIC_RG_VEMC_3V3_CAL	PMIC_RG_VEMC_3V3_VOSEL	PMIC_RG_VEMC_3V3_STB_CAL	PMIC_RG_VEMC_3V3_DL_EN	PMIC_RG_VEMC_3V3_NDIS_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

DIGLDO_CON19

Address: 0x0436

Bit	15	11	7	4	3	0
Name	Reserved	PMIC_RG_VCAMD_CAL	PMIC_RG_VCAMD_VOSEL	PMIC_RG_VCAMD_STB_SEL	Reserved	PMIC_RG_VCAMD_NDIS_EN
Type	-	W	W	W	-	W
Reset	-	?	?	?	-	?

DIGLDO_CON20

Address: 0x0438

Bit	15	11	7	4	3	0
Name	Reserved	PMIC_RG_VCAMIO_CAL	PMIC_RG_VCAMIO_VOSEL	PMIC_RG_VCAMIO_STB_SEL	Reserved	PMIC_RG_VCAMIO_NDIS_EN
Type	-	W	W	W	-	W
Reset	-	?	?	?	-	?

DIGLDO_CON21

Address: 0x043A

Bit	15	11	7	4	3	0
Name	Reserved	PMIC_RG_VCAMAF_CAL	PMIC_RG_VCAMAF_VOSEL	PMIC_RG_VCAMAF_STB_SEL	Reserved	PMIC_RG_VCAMAF_NDIS_EN
Type	-	W	W	W	-	W
Reset	-	?	?	?	-	?

DIGLDO_CON22

Address: 0x043C

Bit	15	11	7	4	3	0
Name	Reserved	PMIC_RG_VGP4_CAL	PMIC_RG_VGP4_VOSEL	PMIC_RG_VGP4_STB_SEL	Reserved	PMIC_RG_VGP4_NDIS_EN
Type	-	W	W	W	-	W
Reset	-	?	?	?	-	?

DIGLDO_CON23

Address: 0x043E

Bit	15	11	7	4	3	2	0
Name	Reserved	PMIC_RG_VGP5_CAL	PMIC_RG_VGP5_VOSEL	PMIC_RG_VGP5_STB_SEL	PMIC_RG_VGP5_NDIS_EN_INT	Reserved	PMIC_RG_VGP5_NDIS_EN
Type	-	W	W	W	W	-	W
Reset	-	?	?	?	?	-	?

DIGLDO_CON24

Address: 0x0440

Bit	15	14	13	11	7	6	4	2	1	0
Name	PMIC_RG_VIBR_EN	Reserved	PMIC_RG_VIBR_STBTD	Reserved	PMIC_QI_VIBR_MODE	PMIC_VIBR_SRCLK_MODE_SEL	Reserved	PMIC_VIBR_THER_SHEN_EN	PMIC_VIBR_LP_MODE_SET	PMIC_VIBR_LP_SEL
Type	W	-	W	-	R	W	-	W	W	W
Reset	?	-	?	-	?	?	-	?	?	?

DIGLDO_CON25

Address: 0x0442

Bit	15	11	8	6	5	4	3	0
Name	PMIC_RG_VIBR_VOCAL	PMIC_RG_VIBR_VOSEL	Reserved	PMIC_RG_VIBR_PWDB	PMIC_RG_VIBR_DRV_SEL	PMIC_RG_VIBR_STB_SEL	Reserved	PMIC_RG_VIBR_NDIS_EN
Type	W	W	-	W	W	W	-	W
Reset	?	?	-	?	?	?	-	?

DIGLDO_CON26

Address: 0x0444

Bit	15	11	0
Name	PMIC_RG_VRTC_CAL	Reserved	PMIC_RG_VRTC_NDIS_EN
Type	W	-	W
Reset	?	-	?

DIGLDO_CON27

Address: 0x0446

Bit	15	14	11	7
Name	PMIC_RG_LDO_FT	Reserved	PMIC_DIGLDO_RSV0	PMIC_DIGLDO_RSV1
Type	W	-	W	W
Reset	?	-	?	?

DIGLDO_CON28

Address: 0x0448

Bit	15	11	9	7	5	3	1
Name	Reserved	PMIC_VCAMD_SRCLK_EN_SEL	PMIC_VCAMIO_SRCLK_EN_SEL	PMIC_VCAMAF_SRCLK_EN_SEL	PMIC_VGP4_SRCLK_EN_SEL	PMIC_VGP6_SRCLK_EN_SEL	PMIC_VGP5_SRCLK_EN_SEL
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

DIGLDO_CON29

Address: 0x044A

Bit	15	11	7	6	5	4	3	0
Name	Reserved	PMIC_RG_VMC_CAL	Reserved	PMIC_RG_VMC_STB_CAL	Reserved	PMIC_RG_VMC_VOSEL	Reserved	PMIC_RG_VMC_NDIS_EN
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

DIGLDO_CON30

Address: 0x044C

Bit	15	14	13	12	11	10	9	7	6	1
Name	PMIC_VCAMD_ON_CTRL	PMIC_VCAMIO_ON_CTRL	PMIC_VCAMAF_ON_CTRL	PMIC_VGP4_ON_CTRL	PMIC_VGP5_ON_CTRL	PMIC_VGP6_ON_CTRL	Reserved	PMIC_VIBR_ON_CTRL	Reserved	PMIC_VIBR_SRCLK_EN_SEL
Type	W	W	W	W	W	W	-	W	-	W
Reset	?	?	?	?	?	?	-	?	-	?

DIGLDO_CON31

Address: 0x044E

Bit	15	14	3	1
Name	PMIC_RG_STB_SEL	Reserved	PMIC_RG_OCFB_TDSEL	PMIC_RG_36US_STBTD
Type	W	-	W	W
Reset	?	-	?	?

DIGLDO_CON32

Address: 0x0450

Bit	15	3	1
Name	PMIC_RG_RSV_STB_SEL	PMIC_RG_RSV_LDO1	PMIC_RG_RSV_LDO2
Type	W	W	W
Reset	?	?	?

DIGLDO_CON33

Address: 0x045A

Bit	15	11	7	4	3	0
Name	Reserved	PMIC_RG_VGP6_CAL	PMIC_RG_VGP6_VOSEL	PMIC_RG_VGP6_STB_SEL	Reserved	PMIC_RG_VGP6_NDIS_EN
Type	-	W	W	W	-	W
Reset	-	?	?	?	-	?

STRUP_CON0

Address: 0x0500

Bit	15	6	5	4	2	1	0
Name	Reserved	PMIC_RG_THRDET_SEL	PMIC_THR_HWPDN_EN	PMIC_RG_STRUP_THR_SEL	Reserved	PMIC_RG_THR_TMODE	PMIC_THR_DET_DIS
Type	-	W	W	W	-	W	W
Reset	-	?	?	?	-	?	?

STRUP_CON2

Address: 0x0502

Bit	15	14	11	8	3	2	1	0
Name	Reserved	PMIC_RG_VREF_BG	Reserved	PMIC_RG_STRUP_IREF_TRIM	PMIC_RG_RST_DRVSEL	PMIC_RG_EN_DRVSEL	PMIC_RG_USBDL_KEYDET_EN	PMIC_RG_USBDL_EN
Type	-	W	-	W	W	W	W	W
Reset	-	?	-	?	?	?	?	?

STRUP_CON3

Address: 0x0504

Bit	15	4	3
Name	Reserved	PMIC_RG_PMU_LEV_UNGATE	PMIC_RG_PMU_RSV
Type	-	W	W
Reset	-	?	?

STRUP_CON4

Address: 0x0506

Bit	15	10	7	6	3	1
Name	Reserved	PMIC_PMU_THR_STATUS	Reserved	PMIC_PMU_THR_DEB	Reserved	PMIC_THR_TEST
Type	-	R	-	R	-	W
Reset	-	?	-	?	-	?

STRUP_CON5

Address: 0x0508

Bit	15	14	13	12	11	10	9	8	7	6	5	3	1	0
Name	PMIC_STRUP_DIG_IO28_PG_FORCE	PMIC_STRUP_DIG_IO_PG_FORCE	PMIC_RTC_XOSC32_ENB_SEL	PMIC_RTC_XOSC32_ENB_SW	PMIC_BIAS_GEN_EN_SEL	PMIC_BIAS_GEN_EN	PMIC_STRUP_PWRON_SEL	PMIC_STRUP_PWRON	PMIC_BIAS_GEN_EN_FORCE	PMIC_STRUP_PWRON_FORCE	PMIC_STRUP_FT_CTRL	Reserved	PMIC_PWRBB_DEB_EN	PMIC_DDUVLO_DEB_EN
Type	W	W	W	W	W	W	W	W	W	W	W	-	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	-	?	?

STRUP_CON6

Address: 0x050A

Bit	15	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_VSRMCA15_PG_ENB	PMIC_VPCA15_PG_ENB	PMIC_VMCH_PG_ENB	PMIC_VMC_PG_ENB	PMIC_VEMC_PG_ENB	PMIC_VTCXO_PG_ENB	PMIC_VIO28_PG_ENB	PMIC_VA28_PG_ENB	PMIC_VIO18_PG_ENB	PMIC_VDRM_PG_ENB	PMIC_VCORE_PG_ENB	PMIC_VSRMCA7_PG_ENB	PMIC_VPCA7_PG_ENB
Type	-	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?	?

STRUP_CON7

Address: 0x050C

Bit	15	14	13	12	11	10	9	8	7	5	4	3
Name	PMIC_QI_OSC_EN	PMIC_JUST_PWRKEY_RST	Reserved	PMIC_VSRMCA15_PG_H2L_EN	PMIC_VPCA15_PG_H2L_EN	PMIC_VCORE_PG_H2L_EN	PMIC_VSRMCA7_PG_H2L_EN	PMIC_VPCA7_PG_H2L_EN	Reserved	PMIC_UVLO_L2H_DEB_EN	PMIC_CLR_JUST_RST	Reserved
Type	R	R	-	W	W	W	W	W	-	W	W	-
Reset	?	?	-	?	?	?	?	?	-	?	?	-

STRUP_CON8

Address: 0x050E

Bit	15	7	5	4	3
Name	PMIC_STRUP_CON8_RSV0	Reserved	PMIC_STRUP_EXT_PMIC_SEL	PMIC_STRUP_EXT_PMIC_EN	Reserved
Type	W	-	W	W	-
Reset	?	-	?	?	-

STRUP_CON9

Address: 0x0510

Bit	15	6	5	4	3	2
Name	Reserved	PMIC_STRUP_AUXADC_RSTB_SEL	PMIC_STRUP_AUXADC_START_SEL	PMIC_STRUP_AUXADC_RSTB_SW	PMIC_STRUP_AUXADC_START_SW	PMIC_STRUP_AUXADC_EN_SEL
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

STRUP_CON10

Address: 0x0512

Bit	15	1	0
Name	Reserved	PMIC_STRUP_PWROFF_PREOFF_EN	PMIC_STRUP_PWROFF_SEQ_EN
Type	-	W	W
Reset	-	?	?

AUXADC_ADC0

Address: 0x0514

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C0	Reserved	PMIC_RG_ADC_OUT_C0
Type	R	-	R
Reset	?	-	?

AUXADC_ADC1

Address: 0x0516

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C1	Reserved	PMIC_RG_ADC_OUT_C1
Type	R	-	R
Reset	?	-	?

AUXADC_ADC2

Address: 0x0518

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C2	Reserved	PMIC_RG_ADC_OUT_C2
Type	R	-	R
Reset	?	-	?

AUXADC_ADC3

Address: 0x051A

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C3	Reserved	PMIC_RG_ADC_OUT_C3
Type	R	-	R
Reset	?	-	?

AUXADC_ADC4

Address: 0x051C

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C4	Reserved	PMIC_RG_ADC_OUT_C4
Type	R	-	R
Reset	?	-	?

AUXADC_ADC5

Address: 0x051E

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C5	Reserved	PMIC_RG_ADC_OUT_C5
Type	R	-	R
Reset	?	-	?

AUXADC_ADC6

Address: 0x0520

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C6	Reserved	PMIC_RG_ADC_OUT_C6
Type	R	-	R
Reset	?	-	?

AUXADC_ADC7

Address: 0x0522

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_C7	Reserved	PMIC_RG_ADC_OUT_C7
Type	R	-	R
Reset	?	-	?

AUXADC_ADC8

Address: 0x0524

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_WAKEUP_PCHR	Reserved	PMIC_RG_ADC_OUT_WAKEUP_PCHR
Type	R	-	R
Reset	?	-	?

AUXADC_ADC9

Address: 0x0526

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_WAKEUP_SWCHR	Reserved	PMIC_RG_ADC_OUT_WAKEUP_SWCHR
Type	R	-	R
Reset	?	-	?

AUXADC_ADC10

Address: 0x0528

Bit	15	14	9
Name	PMIC_RG_ADC_RDY_LBAT	Reserved	PMIC_RG_ADC_OUT_LBAT
Type	R	-	R
Reset	?	-	?

AUXADC_ADC11

Address: 0x052A

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C0_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC12

Address: 0x052C

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C1_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC13

Address: 0x052E

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C2_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC14

Address: 0x0530

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C3_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC15

Address: 0x0532

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C4_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC16

Address: 0x0534

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C5_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC17

Address: 0x0536

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C6_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC18

Address: 0x0538

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_C7_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC19

Address: 0x053A

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_WAKEUP_PCHR_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC20

Address: 0x053C

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_WAKEUP_SWCHR_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC21

Address: 0x053E

Bit	15	9
Name	Reserved	PMIC_RG_ADC_OUT_LBAT_TRIM
Type	-	R
Reset	-	?

AUXADC_ADC22

Address: 0x0540

Bit	15	12
Name	Reserved	PMIC_RG_ADC_OUT_AVG_DECI
Type	-	R
Reset	-	?

AUXADC_CON0

Address: 0x0542

Bit	15	11	6	3	2	1	0
Name	Reserved	PMIC_RG_SPL_NUM	PMIC_RG_AVG_NUM	PMIC_RG_BUF_PWD_ON	PMIC_RG_ADC_PWD_ON	PMIC_RG_BUF_PWD_B	PMIC_RG_ADC_PWD_B
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

AUXADC_CON1

Address: 0x0544

Bit	15	10	6	5	4	2	1	0
Name	Reserved	PMIC_RG_AUXADC_CHSEL	PMIC_RG_AUXADC_AUTO_STR_EN	PMIC_RG_AUXADC_AUTO_STR	Reserved	PMIC_RG_ADC_TRIM_COMP	PMIC_RG_AUXADC_BIST_ENB	PMIC_RG_AUXADC_START
Type	-	W	W	W	-	W	W	W
Reset	-	?	?	?	-	?	?	?

AUXADC_CON2

Address: 0x0546

Bit	15	7
Name	PMIC_RG_LBAT_DEBT_MIN	PMIC_RG_LBAT_DEBT_MAX
Type	W	W
Reset	?	?

AUXADC_CON3

Address: 0x0548

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_LBAT_DET_PRD_15_0
Type	W
Reset	?

AUXADC_CON4

Address: 0x054A

Bit	15	3
Name	Reserved	PMIC_RG_LBAT_DET_PRD_19_16
Type	-	W
Reset	-	?

AUXADC_CON5

Address: 0x054C

Bit	15	14	13	12	11	9
Name	PMIC_RG_LBAT_MAX_IRQ_B	Reserved	PMIC_RG_LBAT_EN_MAX	PMIC_RG_LBAT_IRQ_EN_MAX	Reserved	PMIC_RG_LBAT_VOLT_MAX
Type	R	-	W	W	-	W
Reset	?	-	?	?	-	?

AUXADC_CON6

Address: 0x054E

Bit	15	14	13	12	11	9
Name	PMIC_RG_LBAT_MIN_IRQ_B	Reserved	PMIC_RG_LBAT_EN_MIN	PMIC_RG_LBAT_IRQ_EN_MIN	Reserved	PMIC_RG_LBAT_VOLT_MIN
Type	R	-	W	W	-	W
Reset	?	-	?	?	-	?

AUXADC_CON7

Address: 0x0550

Bit	15	8
Name	Reserved	PMIC_RG_LBAT_DEBOUNCE_COUNT_MAX
Type	-	R
Reset	-	?

AUXADC_CON8

Address: 0x0552

Bit	15	8
Name	Reserved	PMIC_RG_LBAT_DEBOUNCE_COUNT_MIN
Type	-	R
Reset	-	?

AUXADC_CON9

Address: 0x0554

Bit	15	14	9
Name	PMIC_RG_NI_COMP	Reserved	PMIC_RG_DA_DAC
Type	R	-	W
Reset	?	-	?

AUXADC_CON10

Address: 0x0556

Bit	15	11	9	7	4	3	2	1	0
Name	Reserved	PMIC_RG_AUXADC_CALI	PMIC_RG_BUF_CALI	PMIC_RG_AUXADC_RSV	PMIC_RG_DA_DAC_SEL	PMIC_RG_AUX_OUT_SEL	PMIC_RG_ARB_PRIO_2	PMIC_RG_ARB_PRIO_1	PMIC_RG_ARB_PRIO_0
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

AUXADC_CON11

Address: 0x0558

Bit	15	13	7	6
Name	Reserved	PMIC_EFUSE_OFFSET_CH0_TRIM	Reserved	PMIC_EFUSE_GAIN_CH0_TRIM
Type	-	W	-	W
Reset	-	?	-	?

AUXADC_CON12

Address: 0x055A

Bit	15	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_VBUF_EN	Reserved	PMIC_RG_VBUF_BYP	Reserved	PMIC_RG_VBUF_EXTEN	Reserved	PMIC_RG_VBUF_CALEN
Type	-	W	-	W	-	W	-	W
Reset	-	?	-	?	-	?	-	?

AUXADC_CON13

Address: 0x055C

Bit	15	13	7	6
Name	Reserved	PMIC_RG_THERMAL_ADC_OE	Reserved	PMIC_RG_THERMAL_ADC_GE
Type	-	W	-	W
Reset	-	?	-	?

AUXADC_CON14

Address: 0x055E

Bit	15	7	2	1	0
Name	PMIC_RG_ADC_TRIM_CH_SEL	Reserved	PMIC_RG_SOURCE_CH0_NORM_SEL	Reserved	PMIC_RG_SOURCE_CH0_LBAT_SEL
Type	W	-	W	-	W
Reset	?	-	?	-	?

FLASH_CON0

Address: 0x0560

Bit	15	14	12	7	1	0
Name	Reserved	PMIC_FLASH_RSV0	PMIC_FLASH_DIM_DUTY	Reserved	PMIC_FLASH_THER_SHDN_EN	PMIC_FLASH_EN
Type	-	W	W	-	W	W
Reset	-	?	?	-	?	?

FLASH_CON1

Address: 0x0562

Bit	15	7	3
Name	PMIC_FLASH_DIM_DIV	PMIC_FLASH_RSV1	PMIC_FLASH_SEL
Type	W	W	W
Reset	?	?	?

FLASH_CON2

Address: 0x0564

Bit	15	7	6	5	3	0
Name	Reserved	PMIC_FLASH_SFSTREN	Reserved	PMIC_FLASH_SFSTR	Reserved	PMIC_FLASH_MODE
Type	-	W	-	W	-	W
Reset	-	?	-	?	-	?

KPLED_CON0

Address: 0x0566

Bit	15	12	7	1	0
Name	PMIC_KPLED_RSV0	PMIC_KPLED_DIM_DUTY	Reserved	PMIC_KPLED_THER_SHDN_EN	PMIC_KPLED_EN
Type	W	W	-	W	W
Reset	?	?	-	?	?

KPLED_CON1

Address: 0x0568

Bit	15	7	2
Name	PMIC_KPLED_DIM_DIV	PMIC_KPLED_RSV1	PMIC_KPLED_SEL
Type	W	W	W
Reset	?	?	?

KPLED_CON2

Address: 0x056A

Bit	15	14	13	11	8	7
Name	PMIC_KPLED_SFSTREN	Reserved	PMIC_KPLED_SFSTR	Reserved	PMIC_KPLED_MODE	Reserved
Type	W	-	W	-	W	-
Reset	?	-	?	-	?	-

ISINKS_CON0

Address: 0x056C

Bit	15	12	7	4
Name	PMIC_ISINK_RSV0	PMIC_ISINK_DIM0_DUTY	Reserved	PMIC_ISINK_DIM0_FSEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON1

Address: 0x056E

Bit	15	12	7	4
Name	PMIC_ISINK_RSV1	PMIC_ISINK_DIM1_DUTY	Reserved	PMIC_ISINK_DIM1_FSEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON2

Address: 0x0570

Bit	15	12	7	4
Name	PMIC_ISINK_RSV2	PMIC_ISINK_DIM2_DUTY	Reserved	PMIC_ISINK_DIM2_FSEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON3

Address: 0x0572

Bit	15	13	10	9	8	7	5	2	1	0
Name	PMIC_ISINK_RSV3	Reserved	PMIC_ISINKS_CH2_EN	PMIC_ISINKS_CH1_EN	PMIC_ISINKS_CH0_EN	PMIC_ISINK_RSV4	Reserved	PMIC_ISINKS2_CHOP_EN	PMIC_ISINKS1_CHOP_EN	PMIC_ISINKS0_CHOP_EN
Type	W	-	W	W	W	W	-	W	W	W
Reset	?	-	?	?	?	?	-	?	?	?

ISINKS_CON4

Address: 0x0574

Bit	15	14	11	10	9	7
Name	Reserved	PMIC_ISINKS_CH0_STEP	PMIC_ISINK0_CHOP_MODE	PMIC_ISINK0_TEST_REG	PMIC_ISINKS_CH0_MODE	Reserved
Type	-	W	W	W	W	-
Reset	-	?	?	?	?	-

ISINKS_CON5

Address: 0x0576

Bit	15	14	11	10	9	7
Name	Reserved	PMIC_ISINKS_CH1_STEP	PMIC_ISINK1_CHOP_MODE	PMIC_ISINK1_TEST_REG	PMIC_ISINKS_CH1_MODE	Reserved
Type	-	W	W	W	W	-
Reset	-	?	?	?	?	-

ISINKS_CON6

Address: 0x0578

Bit	15	14	11	10	9	7
Name	Reserved	PMIC_ISINKS_CH2_STEP	PMIC_ISINK2_CHOP_MODE	PMIC_ISINK2_TEST_REG	PMIC_ISINKS_CH2_MODE	Reserved
Type	-	W	W	W	W	-
Reset	-	?	?	?	?	-

ISINKS_CON7

Address: 0x057A

Bit	15	14	13	11	8	7
Name	Reserved	PMIC_RG_TRIM_EN	Reserved	PMIC_RG_TRIM_SEL	PMIC_RG_LDO_BIST	PMIC_RG_ISINKS_RSV
Type	-	W	-	W	W	W
Reset	-	?	-	?	?	?

ISINKS_CON8

Address: 0x057C

Bit	15	11	7	3
Name	PMIC_ISINKS_BREATH0_TRF_SEL	PMIC_ISINKS_BREATH0_TON_SEL	Reserved	PMIC_ISINKS_BREATH0_TOFF_SEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON9

Address: 0x057E

Bit	15	11	7	3
Name	PMIC_ISINKS_BREATH1_TRF_SEL	PMIC_ISINKS_BREATH1_TON_SEL	Reserved	PMIC_ISINKS_BREATH1_TOFF_SEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON10

Address: 0x0580

Bit	15	11	7	3
Name	PMIC_ISINKS_BREATH2_TRF_SEL	PMIC_ISINKS_BREATH2_TON_SEL	Reserved	PMIC_ISINKS_BREATH2_TOFF_SEL
Type	W	W	-	W
Reset	?	?	-	?

ISINKS_CON11

Address: 0x0582

Bit	15	14	13	12	11	10	9	7	5	3
Name	PMIC_ISINK0_SFSTR_EN	Reserved	PMIC_ISINK1_SFSTR_EN	Reserved	PMIC_ISINK2_SFSTR_EN	Reserved	PMIC_ISINK0_SFSTR_TC	PMIC_ISINK1_SFSTR_TC	PMIC_ISINK2_SFSTR_TC	Reserved
Type	W	-	W	-	W	-	W	W	W	-
Reset	?	-	?	-	?	-	?	?	?	-

ACCDET_CON0

Address: 0x0584

Bit	15	11	8	7	6	5	4	3	2	1
Name	PMIC_RG_AUDACCDETRSV	PMIC_ACCDET_CON0_RSV1	Reserved	PMIC_RG_AUDACCDETVIN1PULLLOW	PMIC_RG_AUDACCDETTVDET	PMIC_AUDACCDETANASWCTRL	PMIC_AUDACCDETANASWCTRL_SEL	PMIC_ACCDET_CON0_RSV0	Reserved	PMIC_RG_AUDACCDETVTHCAL
Type	W	W	-	W	W	W	W	W	-	W
Reset	?	?	-	?	?	?	?	?	-	?

ACCDET_CON1

Address: 0x0586

Bit	15	1	0
Name	Reserved	PMIC_ACCDET_SEQ_INIT	PMIC_ACCDET_EN
Type	-	W	W
Reset	-	?	?

ACCDET_CON2

Address: 0x0588

Bit	15	6	5	4	3	2	1	0
Name	Reserved	PMIC_ACCDET_MBIAS_PWM_IDLE	PMIC_ACCDET_VTH_PWM_IDLE	PMIC_ACCDET_CMP_PWM_IDLE	Reserved	PMIC_ACCDET_MBIAS_PWM_EN	PMIC_ACCDET_VTH_PWM_EN	PMIC_ACCDET_CMP_PWM_EN
Type	-	W	W	W	-	W	W	W
Reset	-	?	?	?	-	?	?	?

ACCDET_CON3

Address: 0x058A

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_PWM_WIDTH
Type	W
Reset	?

ACCDET_CON4

Address: 0x058C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_PWM_THRESH
Type	W
Reset	?

ACCDET_CON5

Address: 0x058E

Bit	15	14
Name	PMIC_ACCDET_FALL_DELAY	PMIC_ACCDET_RISE_DELAY
Type	W	W
Reset	?	?

ACCDET_CON6

Address: 0x0590

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_DEBOUNCE0
Type	W
Reset	?

ACCDET_CON7

Address: 0x0592

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_DEBOUNCE1
Type	W
Reset	?

ACCDET_CON8

Address: 0x0594

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_DEBOUNCE2
Type	W
Reset	?

ACCDET_CON9

Address: 0x0596

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_DEBOUNCE3
Type	W
Reset	?

ACCDET_CON10

Address: 0x0598

Bit	15	14	9	7	5	3	1
Name	PMIC_ACCDET_IVAL_SEL	Reserved	PMIC_ACCDET_IVAL_MEM_IN	Reserved	PMIC_ACCDET_IVAL_SAM_IN	Reserved	PMIC_ACCDET_IVAL_CUR_IN
Type	W	-	W	-	W	-	W
Reset	?	-	?	-	?	-	?

ACCDET_CON11

Address: 0x059A

Bit	15	8	7	0
Name	Reserved	PMIC_ACCDET_IRQ_CLR	Reserved	PMIC_ACCDET_IRQ
Type	-	W	-	R
Reset	-	?	-	?

ACCDET_CON12

Address: 0x059C

Bit	15	14	13	12	11	9	7	5	4	3	2	1	0
Name	PMIC_ACCDET_PWM_EN_SW	PMIC_ACCDET_MBIAS_EN_SW	PMIC_ACCDET_VTH_EN_SW	PMIC_ACCDET_CMP_EN_SW	Reserved	PMIC_ACCDET_IN_SW	PMIC_ACCDET_PWM_SEL	PMIC_ACCDET_TEST_MODE5	PMIC_ACCDET_TEST_MODE4	PMIC_ACCDET_TEST_MODE3	PMIC_ACCDET_TEST_MODE2	PMIC_ACCDET_TEST_MODE1	PMIC_ACCDET_TEST_MODE0
Type	W	W	W	W	-	W	W	W	W	W	W	W	W
Reset	?	?	?	?	-	?	?	?	?	?	?	?	?

ACCDET_CON13

Address: 0x059E

Bit	15	14	13	12	11	10	7	5	3	1
Name	Reserved	PMIC_ACCDET_CMP_CLK	PMIC_ACCDET_VTH_CLK	PMIC_ACCDET_MBIAS_CLK	Reserved	PMIC_ACCDET_STATE	PMIC_ACCDET_MEM_IN	PMIC_ACCDET_SAM_IN	PMIC_ACCDET_CUR_IN	PMIC_ACCDET_IN
Type	-	R	R	R	-	R	R	R	R	R
Reset	-	?	?	?	-	?	?	?	?	?

ACCDET_CON14

Address: 0x05A0

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_CUR_DEB
Type	R
Reset	?

ACCDET_CON15

Address: 0x05A2

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_RSV_CON0
Type	W
Reset	?

ACCDET_CON16

Address: 0x05A4

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_ACCDET_RSV_CON1
Type	W
Reset	?

SPK_CON0

Address: 0x0600

Bit	15	13	11	10	9	8	7	3	2	1	0
Name	Reserved	PMIC_RG_SPK_GAINL	Reserved	PMIC_SPK_OUT_STAGE_SEL	PMIC_SPK_THER_SHDN_L_EN	PMIC_SPK_OC_SHDN_DL	Reserved	PMIC_SPK_TRIM_EN_L	PMIC_SPKMODE_L	Reserved	PMIC_SPK_EN_L
Type	-	W	-	W	W	W	-	W	W	-	W
Reset	-	?	-	?	?	?	-	?	?	-	?

SPK_CON1

Address: 0x0602

Bit	15	14	13	12	7	6
Name	PMIC_SPK_TRIM_DONE_L	PMIC_SPK_OFFSET_L_MODE	PMIC_SPK_LEAD_L_SW	PMIC_SPK_OFFSET_L_SW	PMIC_SPK_OFFSET_L_OV	Reserved
Type	R	W	W	W	R	-
Reset	?	?	?	?	?	-

SPK_CON2

Address: 0x0604

Bit	15	10	9	8	7	6	5	3	1	0
Name	Reserved	PMIC_RG_SPK_OC_EN_L	PMIC_RG_SPKAB_OC_EN_L	PMIC_RG_SPK_TEST_EN_L	PMIC_RG_SPK_DRC_EN_L	PMIC_RG_SPKRCV_EN_L	PMIC_RG_SPKAB_OBIAS_L	PMIC_RG_SPK_SLEW_L	PMIC_RG_SPK_FORCE_EN_L	PMIC_RG_SPK_INTG_RST_L
Type	-	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?

SPK_CON3

Address: 0x0606

Bit	15	13	11	9	8	7	3	2	1	0
Name	Reserved	PMIC_RG_SPK_GAINR	Reserved	PMIC_SPK_THER_SHDN_R_EN	PMIC_SPK_OC_SHDN_DR	Reserved	PMIC_SPK_TRIM_EN_R	PMIC_SPKMODE_R	Reserved	PMIC_SPK_EN_R
Type	-	W	-	W	W	-	W	W	-	W
Reset	-	?	-	?	?	-	?	?	-	?

SPK_CON4

Address: 0x0608

Bit	15	14	13	12	7	6
Name	PMIC_SPK_TRIM_DONE_R	PMIC_SPK_OFFSET_R_MODE	PMIC_SPK_LEAD_R_SW	PMIC_SPK_OFFSET_R_SW	PMIC_SPK_OFFSET_R_OV	Reserved
Type	R	W	W	W	R	-
Reset	?	?	?	?	?	-

SPK_CON5

Address: 0x060A

Bit	15	14	10	9	8	7	6	5	3	1	0
Name	Reserved	PMIC_RG_SPKPGA_GAINR	PMIC_RG_SPK_OC_EN_R	PMIC_RG_SPKAB_OC_EN_R	PMIC_RG_SPK_TEST_EN_R	PMIC_RG_SPK_DRC_EN_R	PMIC_RG_SPKRCV_EN_R	PMIC_RG_SPKAB_OBIAS_R	PMIC_RG_SPK_SLEW_R	PMIC_RG_SPK_FORCE_EN_R	PMIC_RG_SPK_INTG_RST_R
Type	-	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?

SPK_CON6

Address: 0x060C

Bit	15	14	13	12	11	9	7	5	3	2
Name	PMIC_SPK_AB_OC_L_DEG	PMIC_SPK_D_OC_L_DEG	PMIC_SPK_AB_OC_R_DEG	PMIC_SPK_D_OC_R_DEG	PMIC_SPK_OC_THD	PMIC_SPK_OC_WND	Reserved	PMIC_SPK_TRIM_THD	Reserved	PMIC_SPK_TRIM_WND
Type	R	R	R	R	W	W	-	W	-	W
Reset	?	?	?	?	?	?	-	?	-	?

SPK_CON7

Address: 0x060E

Bit	15	14	11	7	3
Name	Reserved	PMIC_SPK_TRIM_DIV	PMIC_SPK_TD3	PMIC_SPK_TD2	PMIC_SPK_TD1
Type	-	W	W	W	W
Reset	-	?	?	?	?

SPK_CON8

Address: 0x0610

Bit	15	14	13	12	11	10	9	8	7	3	1
Name	Reserved	PMIC_RG_SPK_OCTH_D	PMIC_RG_SPKAB_OVDRV	PMIC_RG_SPK_FBRC_EN	PMIC_RG_SPK_VCM_IBSEL	PMIC_RG_SPK_VCM_SEL	PMIC_RG_SPK_EN_VIEW_CLK	PMIC_RG_SPK_EN_VIEW_VCM	PMIC_RG_SPK_CCODE	PMIC_RG_SPK_IBIAS_SEL	PMIC_RG_BTL_SET
Type	-	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?

SPK_CON9

Address: 0x0612

Bit	15	14	13	12	11	7
Name	PMIC_SPK_TEST_MODE1	PMIC_SPK_TEST_MODE0	PMIC_SPK_VCM_FAST_EN	PMIC_SPK_RSV0	PMIC_RG_SPKPGA_GAINL	PMIC_RG_SPK_RSV
Type	W	W	W	W	W	W
Reset	?	?	?	?	?	?

SPK_CON10

Address: 0x0614

Bit	15	6	3	2
Name	Reserved	PMIC_SPK_TD_DONE	Reserved	PMIC_SPK_TD_WAIT
Type	-	W	-	W
Reset	-	?	-	?

SPK_CON11

Address: 0x0616

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_SPK_TRIM_STOP_L_SW	PMIC_SPK_TRIM_STOP_R_SW	PMIC_SPK_TRIM_EN_L_SW	PMIC_SPK_TRIM_EN_R_SW	PMIC_SPK_OUTSTG_EN_L_SW	PMIC_SPK_OUTSTG_EN_R_SW	PMIC_SPK_EN_L_SW	PMIC_SPK_EN_R_SW	PMIC_SPK_DEPOP_EN_L_SW	PMIC_SPK_DEPOP_EN_R_SW	PMIC_SPKMODE_L_SW	PMIC_SPKMODE_R_SW	PMIC_SPK_RST_L_SW	PMIC_SPK_RST_R_SW	PMIC_SPK_VCM_FAST_SW	PMIC_SPK_EN_MODE
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

FGADC_CON0

Address: 0x0618

Bit	15	14	13	12	11	10	9	8	7	6	3	1	0
Name	PMIC_FG_SW_RSTCLR	PMIC_FG_CHARGE_RST	PMIC_FG_TIME_RST	PMIC_FG_OFFSET_RST	PMIC_FG_SW_CLEAR	PMIC_FG_LATCHDATA_ST	PMIC_FG_SW_READ_PRE	PMIC_FG_SW_CR	PMIC_RG_FGCLKSRC	PMIC_FG_AUTOCALRATE	PMIC_FG_CAL	PMIC_FG_VMODE	PMIC_FG_ON
Type	W	W	W	W	W	R	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?

FGADC_CON1

Address: 0x061A

Bit	15	3
Name	Reserved	PMIC_FG_CAR_35_32
Type	-	R
Reset	-	?

FGADC_CON2

Address: 0x061C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_CAR_31_16
Type	R
Reset	?

FGADC_CON3

Address: 0x061E

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_CAR_15_00
Type	R
Reset	?

FGADC_CON4

Address: 0x0620

Bit	15	13
Name	Reserved	PMIC_FG_NTER_29_16
Type	-	R
Reset	-	?

FGADC_CON5

Address: 0x0622

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_NTER_15_00
Type	R
Reset	?

FGADC_CON6

Address: 0x0624

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_BLTR
Type	W
Reset	?

FGADC_CON7

Address: 0x0626

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_BFTR
Type	W
Reset	?

FGADC_CON8

Address: 0x0628

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_CURRENT_OUT
Type	R
Reset	?

FGADC_CON9

Address: 0x062A

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_ADJUST_OFFSET_VALUE
Type	W
Reset	?

FGADC_CON10

Address: 0x062C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_OFFSET
Type	R
Reset	?

FGADC_CON11

Address: 0x062E

Bit	15	13	11	7
Name	Reserved	PMIC_RG_INPUTCLKSEL	PMIC_RG_FGANALOGTEST	PMIC_RG_SPARE
Type	-	W	W	W
Reset	-	?	?	?

FGADC_CON12

Address: 0x0630

Bit	15	9	8	7	6	3	2
Name	Reserved	PMIC_FG_ADC_AUTORST	PMIC_FG_ADJ_OFFSET_EN	PMIC_VOL_OSR_H	PMIC_VOL_OSR	PMIC_FG_OSR_H	PMIC_FG_OSR
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

FGADC_CON13

Address: 0x0632

Bit	15	14	13	12	11	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_FGVMODE	PMIC_FG_RST	PMIC_FGCAL_EN	PMIC_FGADC_EN	Reserved	PMIC_FG_SLP_EN	PMIC_FG_ADC_RSTDETECT	Reserved	PMIC_FG_H_INT_STS	PMIC_FG_L_INT_STS	Reserved	PMIC_VOL_FIR1BYPASS	PMIC_FG_FIR2BYPASS	PMIC_FG_FIR1BYPASS
Type	R	R	R	R	-	W	R	-	R	R	-	W	W	W
Reset	?	?	?	?	-	?	?	-	?	?	-	?	?	?

FGADC_CON14

Address: 0x0634

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_VOL_CURRENT_OUT
Type	R
Reset	?

FGADC_CON15

Address: 0x0636

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_CIC2
Type	R
Reset	?

FGADC_CON16

Address: 0x0638

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_FG_SLP_CUR_TH
Type	W
Reset	?

FGADC_CON17

Address: 0x063A

Bit	15	7
Name	Reserved	PMIC_FG_SLP_TIME
Type	-	W
Reset	-	?

FGADC_CON18

Address: 0x063C

Bit	15	7
Name	PMIC_FG_DET_TIME	PMIC_FG_SRCVOLTEN_FTIME
Type	W	W
Reset	?	?

FGADC_CON19

Address: 0x063E

Bit	15	14	13	7	4	3	2	1	0
Name	PMIC_FG_TEST_MODE1	PMIC_FG_TEST_MODE0	Reserved	PMIC_FG_RSV1	PMIC_FG_VMODE_SW	PMIC_FG_FGADC_EN_SW	PMIC_FG_FGCAL_EN_SW	PMIC_FG_RST_SW	PMIC_FG_MODE
Type	W	W	-	W	W	W	W	W	W
Reset	?	?	-	?	?	?	?	?	?

RTC_MIX_CON0

Address: 0x0640

Bit	15	12	11	6	5	4	3	2	1
Name	Reserved	PMIC_STMP_MODE	PMIC_MIX_XOSC32_STP_CALI	PMIC_MIX_XOSC32_STP_LPDRST	PMIC_MIX_XOSC32_STP_LPDEN	PMIC_MIX_XOSC32_STP_LPDTB	PMIC_MIX_XOSC32_STP_PWDB	PMIC_MIX_XOSC32_STP_CPDTB	PMIC_MIX_EOSC32_OPT
Type	-	W	W	W	W	R	W	R	W
Reset	-	?	?	?	?	?	?	?	?

RTC_MIX_CON1

Address: 0x0642

Bit	15	8	7	5	4	3	2	1	0
Name	Reserved	PMIC_MIX_EOSC32_VCT_EN	PMIC_MIX_EOSC32_STP_RSV	PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE	PMIC_MIX_RTC_STP_XOSC32_ENB	PMIC_MIX_PMU_STP_DDLO_VRTC_EN	PMIC_MIX_PMU_STP_DDLO_VRTC	PMIC_MIX_DCXO_STP_LVSH_EN	PMIC_MIX_EOSC32_STP_CHOP_EN
Type	-	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?

AUDDAC_CON0

Address: 0x0700

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_RG_DC2AC_EN_VAUDP12	PMIC_RG_AUD_DAC_PWL_UP_VA28	PMIC_RG_AUD_DAC_PWR_UP_VA28	PMIC_RG_AUDDACRPWRUP_VAUDP12	PMIC_RG_AUDDACLPWRUP_VAUDP12
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

AUDBUF_CFG0

Address: 0x0702

Bit	15	14	13	12	8	4	2	1	0
Name	PMIC_RG_AUDHPRSCDISABLE_VAUDP12	PMIC_RG_AUDHPLSCDISABLE_VAUDP12	PMIC_RG_AUDHSSCDISABLE_VAUDP12	PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP12	PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP12	PMIC_RG_AUDHSMUXINPUTSEL_VAUDP12	PMIC_RG_AUDHPRPWRUP_VAUDP12	PMIC_RG_AUDHPLPWRUP_VAUDP12	PMIC_RG_AUDHSPWRUP_VAUDP12
Type	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?

AUDBUF_CFG1

Address: 0x0704

Bit	15	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_LINENOISEENH_VAUDP12	PMIC_RG_HPOUT_SHORTVCM_VAUDP12	PMIC_RG_HPOUTPUTRESET0_VAUDP12	PMIC_RG_HPINPUTRESET0_VAUDP12	PMIC_RG_HPOUTPUTSTBENH_VAUDP12	PMIC_RG_HPINPUTSTBENH_VAUDP12	PMIC_RG_PRECHARGEBUF_EN_VAUDP12	PMIC_RG_AUDBGBON_VAUDP12	PMIC_RG_AUDHSSTARTUP_VAUDP12	PMIC_RG_AUDHPSTARTUP_VAUDP12	PMIC_RG_AUDHSBSCCURRENT_VAUDP12	PMIC_RG_AUDHPRBSCCURRENT_VAUDP12	PMIC_RG_AUDHPLBSCCURRENT_VAUDP12
Type	-	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?	?

AUDBUF_CFG2

Address: 0x0706

Bit	15	7	6	3	2	1	0
Name	Reserved	PMIC_RG_HSOUT_SHORTVCM_VAUDP12	PMIC_RG_HPOUTSTB_RSEL_VAUDP12	PMIC_RG_HSOUTPUTRESET0_VAUDP12	PMIC_RG_HSINPUTRESET0_VAUDP12	PMIC_RG_HSOUTPUTSTBENH_VAUDP12	PMIC_RG_HSINPUTSTBENH_VAUDP12
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

AUDBUF_CFG3

Address: 0x0708

Bit	15	14	12	10	8	7	3
Name	Reserved	PMIC_RG_LINE_PULL0V_VAUDP12	PMIC_RG_AUDHPRFINETRIM_VAUDP12	PMIC_RG_AUDHPLFINETRIM_VAUDP12	PMIC_RG_AUDHPTRIM_EN_VAUDP12	PMIC_RG_AUDHPRTRIM_VAUDP12	PMIC_RG_AUDHPLTRIM_VAUDP12
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

AUDBUF_CFG4

Address: 0x070A

Bit	15	7
Name	PMIC_RG_ABIDEC_RESERVED_VAUDP12	PMIC_RG_ABIDEC_RESERVED_VA28
Type	W	W
Reset	?	?

IBIASDIST_CFG0

Address: 0x070C

Bit	15	12	11	5
Name	Reserved	PMIC_RG_AUDIBIASPWRDN_VAUDP12	PMIC_RG_AUDBIASADJ_1_VAUDP12	PMIC_RG_AUDBIASADJ_0_VAUDP12
Type	-	W	W	W
Reset	-	?	?	?

AUDACCDEPOP_CFG0

Address: 0x070E

Bit	15	6	5	3	2	0
Name	Reserved	PMIC_RG_CHARGEOPTION_DEPOP_VA28	PMIC_RG_DEPOP_ISEL_VA28	PMIC_RG_DEPOP_VCMGEN_EN_VA28	PMIC_RG_DEPOP_RSEL_VA28	PMIC_RG_DEPOP_REN_VA28
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

AUD_IV_CFG0

Address: 0x0710

Bit	15	13	12	9	8	7	5	4	1	0
Name	Reserved	PMIC_RG_AUDIVRMUTE_VAUDP12	PMIC_RG_AUDIVRMUXSEL_VAUDP12	PMIC_RG_AUDIVRSTARTUP_VAUDP12	PMIC_RG_AUDIVRPWRUP_VAUDP12	Reserved	PMIC_RG_AUDIVLMUTE_VAUDP12	PMIC_RG_AUDIVLMUXSEL_VAUDP12	PMIC_RG_AUDIVLSTARTUP_VAUDP12	PMIC_RG_AUDIVLPWRUP_VAUDP12
Type	-	W	W	W	W	-	W	W	W	W
Reset	-	?	?	?	?	-	?	?	?	?

AUDCLKGEN_CFG0

Address: 0x0712

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_RG_SEL_DELAY_VCORE	PMIC_RG_SEL_ENCODER_96K_VA28	PMIC_RG_SEL_DECODER_96K_VA28	PMIC_RG_RSTB_ENCODER_VA28	PMIC_RG_RSTB_DECODER_VA28
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

AUDLDO_CFG0

Address: 0x0714

Bit	15	11	10	9	8	7	6	5	4	3	2	1	0
Name	Reserved	PMIC_RG_VA28REFGEN_EN_VA28	PMIC_RG_VA33REFGEN_EN_VA33	PMIC_RG_VBATREFGEN_EN_VBAT	PMIC_RG_VBATPREREG_PDDIS_EN_VBAT	PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28	PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28	PMIC_RG_LCLDO_VOSEL_VA33	PMIC_RG_LCLDO_REMOTE_SENSE_VA33	PMIC_RG_LCLDO_PDDIS_EN_VA33	PMIC_RG_HCLDO_VOSEL_VA33	PMIC_RG_HCLDO_REMOTE_SENSE_VA33	PMIC_RG_HCLDO_PDDIS_EN_VA33
Type	-	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?

AUDLDO_CFG1

Address: 0x0716

Bit	15	11	7	3
Name	PMIC_RG_AUDPMU_RESERVED_VAUDP12	PMIC_RG_AUDPMU_RESERVED_VA28	PMIC_RG_AUDPMU_RESERVED_VA33	PMIC_RG_AUDPMU_RESERVED_VBAT
Type	W	W	W	W
Reset	?	?	?	?

AUDNVREGGLB_CFG0

Address: 0x0718

Bit	15	3	2	1	0
Name	Reserved	PMIC_DA_NVREG_EN_VAUDP12	PMIC_RG_ACC_DCC_SEL_AUDGLB_VA28	PMIC_RG_AUDGLB_PWRDN_VA28	PMIC_RG_NVREG_PULL0V_VAUDP12
Type	-	W	W	W	W
Reset	-	?	?	?	?

AUD_NCP0

Address: 0x071A

Bit	15	14	13	12	11	10
Name	PMIC_RG_NCP_REMOTE_SENSE_VA18	PMIC_DA_HCLDO_EN_VA33	PMIC_DA_LCLDO_EN_VA33	PMIC_DA_LCLDO_ENC_EN_VA28	PMIC_DA_VBATPREREG_EN_VBAT	Reserved
Type	W	W	W	W	W	-
Reset	?	?	?	?	?	-

AUDPREAMP_CON0

Address: 0x071C

Bit	15	11	9	8	7	4	1	0
Name	Reserved	PMIC_RG_AUDPREAMPIDDTEST	PMIC_RG_AUDPREAMPRPGATEST	PMIC_RG_AUDPREAMPLPGATEST	PMIC_RG_AUDPREAMPRINPUTSEL	PMIC_RG_AUDPREAMPLINPUTSEL	PMIC_RG_AUDPREAMPRON	PMIC_RG_AUDPREAMPLON
Type	-	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?

AUDADC_CON0

Address: 0x071E

Bit	15	14	13	12	10	8	7	4	1	0
Name	Reserved	PMIC_RG_AUDADC3RDSTAGERESET	PMIC_RG_AUDADC2NDSTAGERESET	PMIC_RG_AUDADC2NDSTAGEIDDTEST	PMIC_RG_AUDADC1STSTAGEIDDTEST	PMIC_RG_AUDADCCLKSEL	PMIC_RG_AUDADCRINPUTSEL	PMIC_RG_AUDADCLINPUTSEL	PMIC_RG_AUDADCRPWRUP	PMIC_RG_AUDADCLPWRUP
Type	-	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?

AUDADC_CON1

Address: 0x0720

Bit	15	13	12	7	6	5	3	1
Name	Reserved	PMIC_RG_AUDRCTUNELSEL	PMIC_RG_AUDRCTUNEL	PMIC_RG_AUDADCFFBYPASS	PMIC_RG_AUDADCBYPASS	PMIC_RG_AUDADCFLASHIDDTEST	PMIC_RG_AUDADCREFBUFIDDTEST	PMIC_RG_AUDADCDACIDDTEST
Type	-	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?

AUDADC_CON2

Address: 0x0722

Bit	15	7	6	5	4
Name	Reserved	PMIC_RG_AUDADCDACFBCURRENT	PMIC_RG_AUDADCNODEM	PMIC_RG_AUDRCTUNERSEL	PMIC_RG_AUDRCTUNER
Type	-	W	W	W	W
Reset	-	?	?	?	?

AUDADC_CON3

Address: 0x0724

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_AUDADCTESTDATA
Type	W
Reset	?

AUDADC_CON4

Address: 0x0726

Bit	15	4	3	2	1	0
Name	Reserved	PMIC_RG_AUDADCDACNRZ	PMIC_RG_AUDADCFSRESET	PMIC_RG_AUDADCDACTEST	PMIC_RG_AUDADCNOPATEST	PMIC_RG_AUDADCWIDECM
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

AUDADC_CON5

Address: 0x0728

Bit	15	7
Name	PMIC_RG_AUDSPAREVA18	PMIC_RG_AUDSPAREVA28
Type	W	W
Reset	?	?

AUDADC_CON6

Address: 0x072A

Bit	15	7	3
Name	Reserved	PMIC_RG_AUDSPAREVAUDP	PMIC_RG_AUDSPAREVMIC
Type	-	W	W
Reset	-	?	?

AUDDIGMI_CON0

Address: 0x072C

Bit	15	10	8	7	5	3	1	0
Name	Reserved	PMIC_RG_AUDMICBIASVREF	PMIC_RG_AUDPWDBMICBIAS	PMIC_RG_AUDDIGMICBIAS	PMIC_RG_AUDDIGMICNDUTY	PMIC_RG_AUDDIGMICPDUTY	Reserved	PMIC_RG_AUDDIGMICEN
Type	-	W	W	W	W	W	-	W
Reset	-	?	?	?	?	?	-	?

AUDLSBUF_CON0

Address: 0x072E

Bit	15	14	11	8	7	4	1	0
Name	PMIC_RG_AUDLSBUFRMUTE	Reserved	PMIC_RG_AUDLSBUFRGAIN	PMIC_RG_AUDLSBUFLMUTE	Reserved	PMIC_RG_AUDLSBUFLGAIN	PMIC_RG_AUDLSBUFRPWRUP	PMIC_RG_AUDLSBUFLPWRUP
Type	W	-	W	W	-	W	W	W
Reset	?	-	?	?	-	?	?	?

AUDLSBUF_CON1

Address: 0x0730

Bit	15	9	7	5	2
Name	Reserved	PMIC_RG_AUDLSBUF2IDDTEST	PMIC_RG_AUDLSBUFIDDTEST	PMIC_RG_AUDLSBUFRINPUTSEL	PMIC_RG_AUDLSBUFLINPUTSEL
Type	-	W	W	W	W
Reset	-	?	?	?	?

AUDENCSPARE_CON0

Address: 0x0732

Bit	15	7
Name	PMIC_RG_AUDENCSPAREVA18	PMIC_RG_AUDENCSPAREVA28
Type	W	W
Reset	?	?

AUDENCCLKSQ_CON0

Address: 0x0734

Bit	15	0
Name	Reserved	PMIC_RG_CLKSQ_MONEN_VA28
Type	-	W
Reset	-	?

AUDPREAMPGAIN_CON0

Address: 0x0736

Bit	15	6	3	2
Name	Reserved	PMIC_RG_AUDPREAMPRGAIN	Reserved	PMIC_RG_AUDPREAMPLGAIN
Type	-	W	-	W
Reset	-	?	-	?

ZCD_CON0

Address: 0x0738

Bit	15	10	7	6	5	3	0
Name	Reserved	PMIC_RG_AUDZCDMUXSEL_VAUDP12	PMIC_RG_AUDZCDCLKSEL_VAUDP12	PMIC_RG_AUDZCDTIMEOUTMODESEL	PMIC_RG_AUDZCDGAINSTEPSIZE	PMIC_RG_AUDZCDGAINSTEPTIME	PMIC_RG_AUDZCDENABLE
Type	-	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?

ZCD_CON1

Address: 0x073A

Bit	15	3
Name	Reserved	PMIC_RG_AUDLINEGAIN
Type	-	W
Reset	-	?

ZCD_CON2

Address: 0x073C

Bit	15	11	7	3
Name	Reserved	PMIC_RG_AUDHPRGAIN	Reserved	PMIC_RG_AUDHPLGAIN
Type	-	W	-	W
Reset	-	?	-	?

ZCD_CON3

Address: 0x073E

Bit	15	3
Name	Reserved	PMIC_RG_AUDHSGAIN
Type	-	W
Reset	-	?

ZCD_CON4

Address: 0x0740

Bit	15	10	7	2
Name	Reserved	PMIC_RG_AUDIVRGAIN	Reserved	PMIC_RG_AUDIVLGAIN
Type	-	W	-	W
Reset	-	?	-	?

ZCD_CON5

Address: 0x0742

Bit	15	13	7	5
Name	Reserved	PMIC_RG_AUDINTGAIN2	Reserved	PMIC_RG_AUDINTGAIN1
Type	-	R	-	R
Reset	-	?	-	?

NCP_CLKDIV_CON0

Address: 0x0744

Bit	15	13	12	11	8
Name	Reserved	PMIC_RG_DIVCKS_CHG	PMIC_RG_DIVCKS_ON	Reserved	PMIC_RG_DIVCKS_PRG
Type	-	W	W	-	W
Reset	-	?	?	-	?

NCP_CLKDIV_CON1

Address: 0x0746

Bit	15	0
Name	Reserved	PMIC_RG_PWD_NCP
Type	-	W
Reset	-	?

RG_DCXO_S2A_CON0

Address: 0x0800

Bit	15	14	13	12	11	10	9	8	7	3	2	1	0
Name	Reserved	PMIC_RG_DCXO_S2A_LOADC2	PMIC_RG_DCXO_S2A_LDO_AFE_EN	PMIC_RG_DCXO_S2A_LDO_BB_EN	PMIC_RG_DCXO_S2A_RF2_RCTB	PMIC_RG_DCXO_S2A_LDO_RF2_EN	PMIC_RG_DCXO_S2A_RF1_RCTB	PMIC_RG_DCXO_S2A_LDO_RF1_EN	PMIC_RG_DCXO_S2A_ACL_TARGET	PMIC_RG_DCXO_S2A_ACL_EN	PMIC_RG_DCXO_S2A_LDO_TOP_BYP	PMIC_RG_DCXO_S2A_LDO_TOP_EN	PMIC_RG_DCXO_S2A_BANDGAP_EN
Type	-	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_S2A_TMP1_CON0

Address: 0x0802

Bit	15	13	5	2	1	0
Name	PMIC_RG_DCXO_S2A_RSV	PMIC_RG_DCXO_S2A_TMP1_C2	PMIC_RG_DCXO_S2A_TMP1_C1	PMIC_RG_DCXO_S2A_TMP1_TIELOW_EN	PMIC_RG_DCXO_S2A_TMP1_PREBUF_EN	PMIC_RG_DCXO_S2A_TMP1_LDO_FPM_EN
Type	W	W	W	W	W	W
Reset	?	?	?	?	?	?

RG_DCXO_S2A_TMP1_CON1

Address: 0x0804

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_S2A_TMP1_FPMBUF_BIAS_EN	PMIC_RG_DCXO_S2A_TMP1_CAP_LOW	PMIC_RG_DCXO_S2A_TMP1_CAP_HIGH	PMIC_RG_DCXO_S2A_TMP1_RSV	PMIC_RG_DCXO_S2A_TMP1_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_TMP2_CON0

Address: 0x0806

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_S2A_TMP2_C2	PMIC_RG_DCXO_S2A_TMP2_C1	PMIC_RG_DCXO_S2A_TMP2_TIELOW_EN	PMIC_RG_DCXO_S2A_TMP2_PREBUF_EN	PMIC_RG_DCXO_S2A_TMP2_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_TMP2_CON1

Address: 0x0808

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_S2A_TMP2_FPMBUF_BIAS_EN	PMIC_RG_DCXO_S2A_TMP2_CAP_LOW	PMIC_RG_DCXO_S2A_TMP2_CAP_HIGH	PMIC_RG_DCXO_S2A_TMP2_RSV	PMIC_RG_DCXO_S2A_TMP2_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_TMP3_CON0

Address: 0x080A

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_S2A_TMP3_C2	PMIC_RG_DCXO_S2A_TMP3_C1	PMIC_RG_DCXO_S2A_TMP3_TIELOW_EN	PMIC_RG_DCXO_S2A_TMP3_PREBUF_EN	PMIC_RG_DCXO_S2A_TMP3_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_TMP3_CON1

Address: 0x080C

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_S2A_TMP3_FPMBUF_BIAS_EN	PMIC_RG_DCXO_S2A_TMP3_CAP_LOW	PMIC_RG_DCXO_S2A_TMP3_CAP_HIGH	PMIC_RG_DCXO_S2A_TMP3_RSV	PMIC_RG_DCXO_S2A_TMP3_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_FINAL_CON0

Address: 0x080E

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_S2A_FINAL_C2	PMIC_RG_DCXO_S2A_FINAL_C1	PMIC_RG_DCXO_S2A_FINAL_TIELOW_EN	PMIC_RG_DCXO_S2A_FINAL_PREBUF_EN	PMIC_RG_DCXO_S2A_FINAL_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_S2A_FINAL_CON1

Address: 0x0810

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_S2A_FINAL_FPMBUF_BIAS_EN	PMIC_RG_DCXO_S2A_FINAL_CAP_LOW	PMIC_RG_DCXO_S2A_FINAL_CAP_HIGH	PMIC_RG_DCXO_S2A_FINAL_RSV	PMIC_RG_DCXO_S2A_FINAL_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_A2S_CON0

Address: 0x0812

Bit	15	14	13	12	11	10	9	8	7	3	2	1	0
Name	Reserved	PMIC_RG_DCXO_A2S_LOADC2	PMIC_RG_DCXO_A2S_LDO_AFE_EN	PMIC_RG_DCXO_A2S_LDO_BB_EN	PMIC_RG_DCXO_A2S_RF2_RCTB	PMIC_RG_DCXO_A2S_LDO_RF2_EN	PMIC_RG_DCXO_A2S_RF1_RCTB	PMIC_RG_DCXO_A2S_LDO_RF1_EN	PMIC_RG_DCXO_A2S_ACL_TARGET	PMIC_RG_DCXO_A2S_ACL_EN	PMIC_RG_DCXO_A2S_LDO_TOP_BYP	PMIC_RG_DCXO_A2S_LDO_TOP_EN	PMIC_RG_DCXO_A2S_BANDGAP_EN
Type	-	W	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_A2S_TMP1_CON0

Address: 0x0814

Bit	15	13	5	2	1	0
Name	PMIC_RG_DCXO_A2S_RSV	PMIC_RG_DCXO_A2S_TMP1_C2	PMIC_RG_DCXO_A2S_TMP1_C1	PMIC_RG_DCXO_A2S_TMP1_TIELOW_EN	PMIC_RG_DCXO_A2S_TMP1_PREBUF_EN	PMIC_RG_DCXO_A2S_TMP1_LDO_FPM_EN
Type	W	W	W	W	W	W
Reset	?	?	?	?	?	?

RG_DCXO_A2S_TMP1_CON1

Address: 0x0816

Bit	15	10	9	7
Name	Reserved	PMIC_RG_DCXO_A2S_TMP1_FPMBUF_BIAS_EN	PMIC_RG_DCXO_A2S_TMP1_RSV	PMIC_RG_DCXO_A2S_TMP1_ICONT
Type	-	W	W	W
Reset	-	?	?	?

RG_DCXO_A2S_TMP2_CON0

Address: 0x0818

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_A2S_TMP2_C2	PMIC_RG_DCXO_A2S_TMP2_C1	PMIC_RG_DCXO_A2S_TMP2_TIELOW_EN	PMIC_RG_DCXO_A2S_TMP2_PREBUF_EN	PMIC_RG_DCXO_A2S_TMP2_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_A2S_TMP2_CON1

Address: 0x081A

Bit	15	10	9	7
Name	Reserved	PMIC_RG_DCXO_A2S_TMP2_FPMBUF_BIAS_EN	PMIC_RG_DCXO_A2S_TMP2_RSV	PMIC_RG_DCXO_A2S_TMP2_ICONT
Type	-	W	W	W
Reset	-	?	?	?

RG_DCXO_A2S_TMP3_CON0

Address: 0x081C

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_A2S_TMP3_C2	PMIC_RG_DCXO_A2S_TMP3_C1	PMIC_RG_DCXO_A2S_TMP3_TIELOW_EN	PMIC_RG_DCXO_A2S_TMP3_PREBUF_EN	PMIC_RG_DCXO_A2S_TMP3_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_A2S_TMP3_CON1

Address: 0x081E

Bit	15	10	9	7
Name	Reserved	PMIC_RG_DCXO_A2S_TMP3_FPMBUF_BIAS_EN	PMIC_RG_DCXO_A2S_TMP3_RSV	PMIC_RG_DCXO_A2S_TMP3_ICONT
Type	-	W	W	W
Reset	-	?	?	?

RG_DCXO_A2S_FINAL_CON0

Address: 0x0820

Bit	15	13	5	2	1	0
Name	Reserved	PMIC_RG_DCXO_A2S_FINAL_C2	PMIC_RG_DCXO_A2S_FINAL_C1	PMIC_RG_DCXO_A2S_FINAL_TIELOW_EN	PMIC_RG_DCXO_A2S_FINAL_PREBUF_EN	PMIC_RG_DCXO_A2S_FINAL_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_A2S_FINAL_CON1

Address: 0x0822

Bit	15	10	9	7
Name	Reserved	PMIC_RG_DCXO_A2S_FINAL_FPMBUF_BIAS_EN	PMIC_RG_DCXO_A2S_FINAL_RSV	PMIC_RG_DCXO_A2S_FINAL_ICONT
Type	-	W	W	W
Reset	-	?	?	?

RG_DCXO_POR2_CON0

Address: 0x0824

Bit	15	14	13	12	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_DCXO_POR2_LDO_RF2_EN	PMIC_RG_DCXO_POR2_RF1_RCTB	PMIC_RG_DCXO_POR2_LDO_RF1_EN	PMIC_RG_DCXO_POR2_ACL_TARGET	PMIC_RG_DCXO_POR2_ACL_EN	PMIC_RG_DCXO_POR2_TIELOW_EN	PMIC_RG_DCXO_POR2_DIGBUF_EN	PMIC_RG_DCXO_POR2_STARTUP_EN	PMIC_RG_DCXO_POR2_CURRENT_EN	PMIC_RG_DCXO_POR2_LDO_TOP_BYP	PMIC_RG_DCXO_POR2_LDO_TOP_EN	PMIC_RG_DCXO_POR2_BANDGAP_EN	PMIC_RG_DCXO_POR2_RESET
Type	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_POR2_CON1

Address: 0x0826

Bit	15	7	5	4	3	2	1	0
Name	PMIC_RG_DCXO_POR2_C2	PMIC_RG_DCXO_POR2_RSV	PMIC_RG_DCXO_POR2_PREBUF_EN	PMIC_RG_DCXO_POR2_LDO_FPM_EN	PMIC_RG_DCXO_POR2_LOADC2	PMIC_RG_DCXO_POR2_LDO_AFE_EN	PMIC_RG_DCXO_POR2_LDO_BB_EN	PMIC_RG_DCXO_POR2_RF2_RCTB
Type	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?

RG_DCXO_POR2_CON2

Address: 0x0828

Bit	15	14	13	12	11	10	7
Name	PMIC_RG_DCXO_POR2_FPMBUF_BIAS_EN	PMIC_RG_DCXO_POR2_LDO_BUFTOP_EN	PMIC_RG_DCXO_POR2_LDO_FPM_RCTB	PMIC_RG_DCXO_POR2_BANDGAP_RCTB	PMIC_RG_DCXO_POR2_CURRENT_RCTB	PMIC_RG_DCXO_POR2_C1	PMIC_RG_DCXO_POR2_ICONT
Type	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?

RG_DCXO_POR2_TMP1_CON0

Address: 0x082A

Bit	15	13	12	4	1	0
Name	Reserved	PMIC_RG_DCXO_POR2_TMP1_TIELOW_EN	PMIC_RG_DCXO_POR2_TMP1_C2	PMIC_RG_DCXO_POR2_TMP1_C1	PMIC_RG_DCXO_POR2_TMP1_PREBUF_EN	PMIC_RG_DCXO_POR2_TMP1_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_TMP1_CON1

Address: 0x082C

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_POR2_TMP1_FPMBUF_BIAS_EN	PMIC_RG_DCXO_POR2_TMP1_CAP_LOW	PMIC_RG_DCXO_POR2_TMP1_CAP_HIGH	PMIC_RG_DCXO_POR2_TMP1_RSV	PMIC_RG_DCXO_POR2_TMP1_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_TMP2_CON0

Address: 0x082E

Bit	15	13	12	4	1	0
Name	Reserved	PMIC_RG_DCXO_POR2_TMP2_TIELOW_EN	PMIC_RG_DCXO_POR2_TMP2_C2	PMIC_RG_DCXO_POR2_TMP2_C1	PMIC_RG_DCXO_POR2_TMP2_PREBUF_EN	PMIC_RG_DCXO_POR2_TMP2_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_TMP2_CON1

Address: 0x0830

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_POR2_TMP2_FPMBUF_BIAS_EN	PMIC_RG_DCXO_POR2_TMP2_CAP_LOW	PMIC_RG_DCXO_POR2_TMP2_CAP_HIGH	PMIC_RG_DCXO_POR2_TMP2_RSV	PMIC_RG_DCXO_POR2_TMP2_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_TMP3_CON0

Address: 0x0832

Bit	15	13	12	4	1	0
Name	Reserved	PMIC_RG_DCXO_POR2_TMP3_TIELOW_EN	PMIC_RG_DCXO_POR2_TMP3_C2	PMIC_RG_DCXO_POR2_TMP3_C1	PMIC_RG_DCXO_POR2_TMP3_PREBUF_EN	PMIC_RG_DCXO_POR2_TMP3_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_TMP3_CON1

Address: 0x0834

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_POR2_TMP3_FPMBUF_BIAS_EN	PMIC_RG_DCXO_POR2_TMP3_CAP_LOW	PMIC_RG_DCXO_POR2_TMP3_CAP_HIGH	PMIC_RG_DCXO_POR2_TMP3_RSV	PMIC_RG_DCXO_POR2_TMP3_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_FINAL_CON0

Address: 0x0836

Bit	15	13	12	4	1	0
Name	Reserved	PMIC_RG_DCXO_POR2_FINAL_TIELOW_EN	PMIC_RG_DCXO_POR2_FINAL_C2	PMIC_RG_DCXO_POR2_FINAL_C1	PMIC_RG_DCXO_POR2_FINAL_PREBUF_EN	PMIC_RG_DCXO_POR2_FINAL_LDO_FPM_EN
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_POR2_FINAL_CON1

Address: 0x0838

Bit	15	12	11	10	9	7
Name	Reserved	PMIC_RG_DCXO_POR2_FINAL_FPMBUF_BIAS_EN	PMIC_RG_DCXO_POR2_FINAL_CAP_LOW	PMIC_RG_DCXO_POR2_FINAL_CAP_HIGH	PMIC_RG_DCXO_POR2_FINAL_RSV	PMIC_RG_DCXO_POR2_FINAL_ICONT
Type	-	W	W	W	W	W
Reset	-	?	?	?	?	?

RG_DCXO_CON0

Address: 0x083A

Bit	15	14	13	12	11	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_DCXO_LDO_BUFTOP_EN	PMIC_RG_DCXO_LDO_RF2_REG_EN	PMIC_RG_DCXO_LDO_RF1_REG_EN	PMIC_RG_DCXO_LDO_DBB_REG_EN	PMIC_RG_DCXO_C1	PMIC_RG_DCXO_PREBUF_EN	PMIC_RG_DCXO_LDO_FPM_EN	PMIC_RG_DCXO_DIGBUF_EN	PMIC_RG_DCXO_STARTUP_EN	PMIC_RG_DCXO_CURRENT_EN	PMIC_RG_DCXO_LDO_TOP_BYP	PMIC_RG_DCXO_LDO_TOP_EN	PMIC_RG_DCXO_BANDGAP_EN	PMIC_RG_DCXO_RESET
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_CON1

Address: 0x083C

Bit	15	7
Name	PMIC_RG_DCXO_ICONT	PMIC_RG_DCXO_C2
Type	W	W
Reset	?	?

RG_DCXO_CON2

Address: 0x083E

Bit	15	14	11	7	6	5	4	3	2	1	0
Name	PMIC_RG_DCXO_C2_UNTRIM	PMIC_RG_DCXO_RSV	PMIC_RG_DCXO_ACL_TARGET	PMIC_RG_DCXO_ACL_EN	PMIC_RG_DCXO_LDO_AFE_EN	PMIC_RG_DCXO_LDO_BB_EN	PMIC_RG_DCXO_LDO_RF2_RCTB	PMIC_RG_DCXO_LDO_RF2_EN	PMIC_RG_DCXO_LDO_RF1_RCTB	PMIC_RG_DCXO_LDO_RF1_EN	PMIC_RG_DCXO_TIELOW_EN
Type	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_CON3

Address: 0x0840

Bit	15	14	13	12	11	10	9	8	7
Name	PMIC_RG_DCXO_LDO_FPM_RCTB	PMIC_RG_DCXO_BANDGAP_RCTB	PMIC_RG_DCXO_CURRENT_RCTB	PMIC_RG_DCXO_FPMBUF_BIAS_EN_SYNC	PMIC_RG_DCXO_CAP_LOW_SYNC	PMIC_RG_DCXO_CAP_HIGH_SYNC	PMIC_RG_DCXO_C1C2_SYNC_EN	PMIC_RG_DCXO_SYNC_EN	PMIC_RG_DCXO_FSM_C2
Type	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?

RG_DCXO_MANUAL_CON3

Address: 0x0842

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_DCXO_MANUAL_LDO_RF2_EN	PMIC_RG_DCXO_MANUAL_LDO_RF1_RCTB	PMIC_RG_DCXO_MANUAL_LDO_RF1_EN	PMIC_RG_DCXO_MANUAL_TIELOW_EN	PMIC_RG_DCXO_MANUAL_ICONT	PMIC_RG_DCXO_MANUAL_C2	PMIC_RG_DCXO_MANUAL_C1	PMIC_RG_DCXO_MANUAL_PREBUF_EN	PMIC_RG_DCXO_MANUAL_LDO_FPM_EN	PMIC_RG_DCXO_MANUAL_DIGBUF_EN	PMIC_RG_DCXO_MANUAL_STARTUP_EN	PMIC_RG_DCXO_MANUAL_CURRENT_EN	PMIC_RG_DCXO_MANUAL_LDO_TOP_BYP	PMIC_RG_DCXO_MANUAL_LDO_TOP_EN	PMIC_RG_DCXO_MANUAL_BANDGAP_EN	PMIC_RG_DCXO_MANUAL_RESET
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_MANUAL_CON1

Address: 0x0844

Bit	15	14	13	12	11	10	9	8	7	4	3	2	1	0
Name	PMIC_RG_DCXO_MANUAL_LDO_FPM_RCTB	PMIC_RG_DCXO_MANUAL_BANDGAP_RCTB	PMIC_RG_DCXO_MANUAL_CURRENT_RCTB	PMIC_RG_DCXO_MANUAL_FPMBUF_BIAS_EN_SYNC	PMIC_RG_DCXO_MANUAL_CAP_LOW_SYNC	PMIC_RG_DCXO_MANUAL_CAP_HIGH_SYNC	PMIC_RG_DCXO_MANUAL_C1C2_SYNC_EN	PMIC_RG_DCXO_MANUAL_SYNC_EN	PMIC_RG_DCXO_MANUAL_RSV	PMIC_RG_DCXO_MANUAL_ACL_TARGET	PMIC_RG_DCXO_MANUAL_ACL_EN	PMIC_RG_DCXO_MANUAL_LDO_AFE_EN	PMIC_RG_DCXO_MANUAL_LDO_BB_EN	PMIC_RG_DCXO_MANUAL_LDO_RF2_RCTB
Type	W	W	W	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_MANUAL_CON2

Address: 0x0846

Bit	15	0
Name	Reserved	PMIC_RG_DCXO_MANUAL_LDO_BUFTOP_EN
Type	-	W
Reset	-	?

RG_DCXO_ANALOG_CON0

Address: 0x0848

Bit	15	13	11	9	7	5	4	3	2	1	0
Name	PMIC_RG_DCXO_LDO_RF1_V	PMIC_RG_DCXO_LDO_LPM_V	PMIC_RG_DCXO_LDO_FPM_V	PMIC_RG_DCXO_LDO_TOP_V	PMIC_RG_DCXO_VG_V	PMIC_RG_DCXO_LDO_AFE_BYP	PMIC_RG_DCXO_LDO_BB_BYP	PMIC_RG_DCXO_LDO_RF2_BYP	PMIC_RG_DCXO_LDO_RF1_BYP	PMIC_RG_DCXO_LDO_LPM_BYP	PMIC_RG_DCXO_LDO_LPM_EN
Type	W	W	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_ANALOG_CON1

Address: 0x084A

Bit	15	14	12	10	8	5	3	1
Name	PMIC_RG_DCXO_TEST_EN	PMIC_RG_DCXO_ATTEN_AFE	PMIC_RG_DCXO_ATTEN_BB	PMIC_RG_DCXO_ATTEN_RF2	PMIC_RG_DCXO_ATTEN_RF1	PMIC_RG_DCXO_LDO_AFE_V	PMIC_RG_DCXO_LDO_BB_V	PMIC_RG_DCXO_LDO_RF2_V
Type	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?

RG_DCXO_ANALOG_CON2

Address: 0x084C

Bit	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
Name	PMIC_RG_DCXO_TEST_SEL
Type	W
Reset	?

RG_DCXO_ANALOG_CON3

Address: 0x084E

Bit	15	14	13	12	11	9	8	7
Name	PMIC_RG_DCXO_FLOAT_CAP	PMIC_RG_DCXO_SYNC_CKINV	PMIC_RG_DCXO_SYNC_BYP	PMIC_RG_DCXO_LDO_FPM_BYP	PMIC_RG_DCXO_LDO_BUFTOP_V	PMIC_RG_DCXO_LDO_BUFTOP_BYP	PMIC_RG_DCXO_AUDIO_TEST_EN	PMIC_RG_DCXO_RESERVED
Type	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?

RG_DCXO_ANALOG_CON4

Address: 0x0850

Bit	15	11	7	5	4	3	2	1	0
Name	PMIC_RG_DCXO_RESERVED1	PMIC_RG_DCXO_RESERVED0	PMIC_RG_DCXO_FPMBUF_BIASR	PMIC_RG_DCXO_AFE_CKINV	PMIC_RG_DCXO_BB_CKINV	PMIC_RG_DCXO_RF2_CKINV	PMIC_RG_DCXO_BUFMODE	PMIC_RG_DCXO_C1C2_SYNC_CKINV	PMIC_RG_DCXO_C1C2_SYNC_BYP
Type	W	W	W	W	W	W	W	W	W
Reset	?	?	?	?	?	?	?	?	?

RG_DCXO_FORCE_MODE0

Address: 0x0852

Bit	15	14	11	10	9	6	3	2	1	0
Name	Reserved	PMIC_RG_DCXO_FT_TRIM_OPTION	PMIC_RG_DCXO_FT_FREQ_TRIM_START	PMIC_RG_DCXO_ACL_BIT_SWAP	PMIC_RG_DCXO_ACL_BIT_END	PMIC_RG_DCXO_ACL_BIT_START	PMIC_RG_DCXO_MANUAL_ACL_START	PMIC_RG_DCXO_OFF_32K_OUTPUT	PMIC_RG_DCXO_TEST_SLEEP_MODE	PMIC_RG_DCXO_TEST_MODE
Type	-	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?

RG_DCXO_FORCE_MODE1

Address: 0x0854

Bit	15	7	6	5	2
Name	PMIC_RG_DCXO_CK_CHG_DELAY	PMIC_RG_DCXO_FT_FREQ_TRIM_STEP_START	PMIC_RG_DCXO_FT_FREQ_TRIM_MANUAL	PMIC_RG_DCXO_FT_TRIM_BIT_END	PMIC_RG_DCXO_FT_TRIM_BIT_START
Type	W	W	W	W	W
Reset	?	?	?	?	?

RG_DCXO_FORCE_MODE2

Address: 0x0856

Bit	15	13
Name	Reserved	PMIC_RG_DCXO_32K_RESIDUAL
Type	-	W
Reset	-	?

RG_DCXO_S2A_CON1

Address: 0x0858

Bit	15	12	11	10	9	8	7	6	5	2
Name	Reserved	PMIC_RG_DCXO_S2A_LDO_BUFTOP_EN	PMIC_RG_DCXO_S2A_LDO_FPM_RCTB	PMIC_RG_DCXO_S2A_BANDGAP_RCTB	PMIC_RG_DCXO_S2A_CURRENT_RCTB	PMIC_RG_DCXO_S2A_C1C2_SYNC_EN	PMIC_RG_DCXO_S2A_SYNC_EN	PMIC_RG_DCXO_S2A_ACL_BIT_SWAP	PMIC_RG_DCXO_S2A_ACL_BIT_END	PMIC_RG_DCXO_S2A_ACL_BIT_START
Type	-	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?

RG_DCXO_A2S_CON1

Address: 0x085A

Bit	15	14	13	12	11	10	9	8	7	6	5	2
Name	Reserved	PMIC_RG_DCXO_A2S_LDO_BUFTOP_EN	PMIC_RG_DCXO_A2S_LDO_FPM_RCTB	PMIC_RG_DCXO_A2S_BANDGAP_RCTB	PMIC_RG_DCXO_A2S_CURRENT_RCTB	PMIC_RG_DCXO_A2S_CAP_LOW	PMIC_RG_DCXO_A2S_CAP_HIGH	PMIC_RG_DCXO_A2S_C1C2_SYNC_EN	PMIC_RG_DCXO_A2S_SYNC_EN	PMIC_RG_DCXO_A2S_ACL_BIT_SWAP	PMIC_RG_DCXO_A2S_ACL_BIT_END	PMIC_RG_DCXO_A2S_ACL_BIT_START
Type	-	W	W	W	W	W	W	W	W	W	W	W
Reset	-	?	?	?	?	?	?	?	?	?	?	?

RG_DCXO_POR2_CON3

Address: 0x085C

Bit	15	13	12	11	10	9	7	6	5	2
Name	Reserved	PMIC_RG_DCXO_POR2_CAP_LOW	PMIC_RG_DCXO_POR2_CAP_HIGH	PMIC_RG_DCXO_POR2_C1C2_SYNC_EN	PMIC_RG_DCXO_POR2_SYNC_EN	PMIC_RG_DCXO_POR2_POR_LENGTH_OPTION	Reserved	PMIC_RG_DCXO_POR2_ACL_BIT_SWAP	PMIC_RG_DCXO_POR2_ACL_BIT_END	PMIC_RG_DCXO_POR2_ACL_BIT_START
Type	-	W	W	W	W	W	-	W	W	W
Reset	-	?	?	?	?	?	-	?	?	?

RG_DCXO_FORCE_MODE3

Address: 0x085E

Bit	15	7
Name	Reserved	PMIC_RG_DCXO_FT_TRIM_LENGTH_OPTION
Type	-	W
Reset	-	?

RG_DCXO_ANALOG_RO0

Address: 0x0860

Bit	15	7
Name	PMIC_RGS_DCXO_C2	PMIC_RGS_DCXO_ICONT
Type	R	R
Reset	?	?

RG_DCXO_TRIM_RO0

Address: 0x0862

Bit	15	7
Name	PMIC_RGS_DCXO_TRIM2_C2	PMIC_RGS_DCXO_TRIM1_C2
Type	R	R
Reset	?	?

RG_DCXO_TRIM_RO1

Address: 0x0864

Bit	15	5	4	3	2	1	0
Name	Reserved	PMIC_RGS_DCXO_FT_FREQ_TRIM_STEP_VALUE	PMIC_RGS_DCXO_FT_FREQ_TRIM_STEP_END	PMIC_RGS_DCXO_FT_FREQ_TRIM_END	PMIC_RGS_DCXO_MANUAL_ACL_END	PMIC_RGS_DCXO_XTAL_MODE	PMIC_RGS_DCXO_TRIM_SEL
Type	-	R	R	R	R	R	R
Reset	-	?	?	?	?	?	?