| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_THRDET_SEL | MT6331_PMIC_THR_HWPDN_EN | MT6331_PMIC_RG_STRUP_THR_SEL | MT6331_PMIC_RG_THR_TEMP_SEL | MT6331_PMIC_RG_THR_TMODE | MT6331_PMIC_THR_DET_DIS | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_STRUP_IREF_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VREF_BG | Reserved | MT6331_PMIC_RG_RSTB_DRV_SEL | MT6331_PMIC_RG_EN_DRVSEL | Reserved | MT6331_PMIC_RG_FCHR_PU_EN | MT6331_PMIC_RG_FCHR_KEYDET_EN | MT6331_PMIC_RG_USBDL_EN | |||||||
| Type | - | W | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_PMU_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_PMU_THR_STATUS | Reserved | MT6331_PMIC_PMU_THR_DEB | Reserved | MT6331_PMIC_THR_TEST | ||||||||||
| Type | - | R | - | R | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_STRUP_DIG_IO_PG_FORCE | Reserved | MT6331_PMIC_RTC_XOSC32_ENB_SEL | MT6331_PMIC_RTC_XOSC32_ENB_SW | MT6331_PMIC_BIAS_GEN_EN_SEL | MT6331_PMIC_BIAS_GEN_EN | MT6331_PMIC_STRUP_PWRON_SEL | MT6331_PMIC_STRUP_PWRON | MT6331_PMIC_BIAS_GEN_EN_FORCE | MT6331_PMIC_STRUP_PWRON_FORCE | MT6331_PMIC_STRUP_FT_CTRL | MT6331_PMIC_STRUP_OSC_EN_SEL | MT6331_PMIC_STRUP_OSC_EN | MT6331_PMIC_PWRBB_DEB_EN | MT6331_PMIC_DDUVLO_DEB_EN | |
| Type | W | - | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO28_PG_H2L_EN | MT6331_PMIC_VSRAM_DVFS1_PG_H2L_EN | MT6331_PMIC_VUSB_PG_H2L_EN | MT6331_PMIC_VTCXO1_PG_H2L_EN | MT6331_PMIC_VAUD32_PG_H2L_EN | MT6331_PMIC_VIO18_PG_H2L_EN | MT6331_PMIC_VGPU_PG_H2L_EN | MT6331_PMIC_VCORE2_PG_H2L_EN | MT6331_PMIC_VCORE1_PG_H2L_EN | MT6331_PMIC_VDVFS14_PG_H2L_EN | MT6331_PMIC_VDVFS13_PG_H2L_EN | MT6331_PMIC_VDVFS12_PG_H2L_EN | MT6331_PMIC_VDVFS11_PG_H2L_EN | ||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_EXT_PMIC_EN_PG_ENB | MT6331_PMIC_RG_EXT_PMIC_STATUS_PG_ENB | MT6331_PMIC_VIO28_PG_ENB | MT6331_PMIC_VSRAM_DVFS1_PG_ENB | MT6331_PMIC_VUSB_PG_ENB | MT6331_PMIC_VTCXO1_PG_ENB | MT6331_PMIC_VAUD32_PG_ENB | MT6331_PMIC_VIO18_PG_ENB | MT6331_PMIC_VGPU_PG_ENB | MT6331_PMIC_VCORE2_PG_ENB | MT6331_PMIC_VCORE1_PG_ENB | MT6331_PMIC_VDVFS14_PG_ENB | MT6331_PMIC_VDVFS13_PG_ENB | MT6331_PMIC_VDVFS12_PG_ENB | MT6331_PMIC_VDVFS11_PG_ENB |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_OSC_EN | MT6331_PMIC_JUST_PWRKEY_RST | Reserved | MT6331_PMIC_UVLO_L2H_DEB_EN | MT6331_PMIC_CLR_JUST_RST | Reserved | ||||||||||
| Type | R | R | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_EXT_PMIC_EN | MT6331_PMIC_STRUP_CON8_RSV0 | Reserved | MT6331_PMIC_STRUP_EXT_PMIC_SEL | MT6331_PMIC_STRUP_EXT_PMIC_EN | |||||||||||
| Type | R | W | - | W | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_STRUP_AUXADC_RSTB_SEL | MT6331_PMIC_STRUP_AUXADC_START_SEL | MT6331_PMIC_STRUP_AUXADC_RSTB_SW | MT6331_PMIC_STRUP_AUXADC_START_SW | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_STRUP_PWROFF_PREOFF_EN | MT6331_PMIC_STRUP_PWROFF_SEQ_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_UVLO_VTHL | MT6331_PMIC_RG_UVLO_VTHL_VSYS | MT6331_PMIC_STRUP_DIG1_RSV0 | MT6331_PMIC_STRUP_DIG0_RSV0 | MT6331_PMIC_STRUP_PP_EN_SEL | MT6331_PMIC_STRUP_PP_EN | ||||||||||
| Type | W | W | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_BGR_UNCHOP | MT6331_PMIC_RG_BGR_UNCHOP_PH | MT6331_PMIC_RG_BGR_RSEL | MT6331_PMIC_RG_BGR_TRIM_EN | MT6331_PMIC_RG_BGR_TRIM | Reserved | MT6331_PMIC_RG_BGR_TEST_EN | MT6331_PMIC_RG_BGR_TEST_RSTB | ||||||||
| Type | W | W | W | W | W | - | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_STRUP_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_STRUP_DIG0_RSV1 | MT6331_PMIC_RG_TESTMODE_SWEN | Reserved | MT6331_PMIC_RG_EN_E4 | MT6331_PMIC_RG_EN_E8 | MT6331_PMIC_RG_EN_SR | MT6331_PMIC_RG_EN_SMT | |||||||||
| Type | W | W | - | W | W | W | W | |||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_RSV_SWREG | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_STRUP_PG_STATUS_CLR | Reserved | MT6331_PMIC_STRUP_PG_STATUS | |||||||||||||
| Type | W | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_HWCID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_SWCID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_EXCEP_CLR | Reserved | MT6331_PMIC_EXT_PMIC_MON | MT6331_PMIC_TOFF_EXCEP_STATUS | MT6331_PMIC_RTRY_EXCEP_STATUS | MT6331_PMIC_INIT_EXCEP_STATUS | ||||||||||
| Type | W | - | R | R | R | R | ||||||||||
| Reset | ? | - | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OSC_EN_AUTO_OFF | MT6331_PMIC_RG_SRCLKEN_IN_SYNC_EN | Reserved | MT6331_PMIC_RG_OSC_SEL_HW_MODE | MT6331_PMIC_RG_SRCLKEN_IN2_HW_MODE | MT6331_PMIC_RG_SRCLKEN_IN1_HW_MODE | Reserved | MT6331_PMIC_RG_OSC_SEL | MT6331_PMIC_RG_SRCLKEN_IN2_EN | MT6331_PMIC_RG_SRCLKEN_IN1_EN | |||||
| Type | - | W | W | - | W | W | W | - | W | W | W | |||||
| Reset | - | ? | ? | - | ? | ? | ? | - | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_TEST_OUT | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_MON_GRP_SEL | MT6331_PMIC_RG_MON_FLAG_SEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_TEST_STRUP | MT6331_PMIC_RG_EFUSE_MODE | MT6331_PMIC_RG_TEST_AUXADC | MT6331_PMIC_RG_NANDTREE_MODE | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_TESTMODE_SW | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_EN_STATUS_VIO28 | MT6331_PMIC_EN_STATUS_VCAMA | MT6331_PMIC_EN_STATUS_VAUXA32 | MT6331_PMIC_EN_STATUS_VAUD32 | MT6331_PMIC_EN_STATUS_VTCXO2 | MT6331_PMIC_EN_STATUS_VTCXO1 | MT6331_PMIC_EN_STATUS_VRTC | Reserved | MT6331_PMIC_EN_STATUS_VIO18 | MT6331_PMIC_EN_STATUS_VCORE2 | MT6331_PMIC_EN_STATUS_VCORE1 | MT6331_PMIC_EN_STATUS_VGPU | MT6331_PMIC_EN_STATUS_VDVFS14 | MT6331_PMIC_EN_STATUS_VDVFS13 | MT6331_PMIC_EN_STATUS_VDVFS12 | MT6331_PMIC_EN_STATUS_VDVFS11 |
| Type | R | R | R | R | R | R | R | - | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_EN_STATUS_VGP2 | MT6331_PMIC_EN_STATUS_VSRAM_DVFS1 | MT6331_PMIC_EN_STATUS_VCAM_IO | MT6331_PMIC_EN_STATUS_VUSB10 | MT6331_PMIC_EN_STATUS_VCAMD | MT6331_PMIC_EN_STATUS_VIBR | MT6331_PMIC_EN_STATUS_VMIPI | MT6331_PMIC_EN_STATUS_VFBB | MT6331_PMIC_EN_STATUS_VSIM2 | MT6331_PMIC_EN_STATUS_VSIM1 | MT6331_PMIC_EN_STATUS_VGP4 | MT6331_PMIC_EN_STATUS_VGP1 | MT6331_PMIC_EN_STATUS_VEMC33 | MT6331_PMIC_EN_STATUS_VMCH | MT6331_PMIC_EN_STATUS_VMC | MT6331_PMIC_EN_STATUS_VCAM_AF |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_EN_STATUS_VBIASN | MT6331_PMIC_EN_STATUS_VGP3 | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_OC_STATUS_VCAM_AF | MT6331_PMIC_OC_STATUS_VIO28 | MT6331_PMIC_OC_STATUS_VCAMA | MT6331_PMIC_OC_STATUS_VAUXA32 | MT6331_PMIC_OC_STATUS_VAUD32 | MT6331_PMIC_OC_STATUS_VTCXO2 | MT6331_PMIC_OC_STATUS_VTCXO1 | MT6331_PMIC_OC_STATUS_VIO18 | MT6331_PMIC_OC_STATUS_VCORE2 | MT6331_PMIC_OC_STATUS_VCORE1 | MT6331_PMIC_OC_STATUS_VGPU | MT6331_PMIC_OC_STATUS_VDVFS14 | Reserved | MT6331_PMIC_OC_STATUS_VDVFS13 | MT6331_PMIC_OC_STATUS_VDVFS12 | MT6331_PMIC_OC_STATUS_VDVFS11 |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | - | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_OC_STATUS_VBIASN | MT6331_PMIC_OC_STATUS_VSRAM_DVFS1 | MT6331_PMIC_OC_STATUS_VCAM_IO | MT6331_PMIC_OC_STATUS_VUSB10 | MT6331_PMIC_OC_STATUS_VCAMD | MT6331_PMIC_OC_STATUS_VIBR | Reserved | MT6331_PMIC_OC_STATUS_VMIPI | MT6331_PMIC_OC_STATUS_VFBB | MT6331_PMIC_OC_STATUS_VSIM2 | MT6331_PMIC_OC_STATUS_VSIM1 | MT6331_PMIC_OC_STATUS_VGP4 | MT6331_PMIC_OC_STATUS_VGP1 | MT6331_PMIC_OC_STATUS_VEMC33 | MT6331_PMIC_OC_STATUS_VMCH | MT6331_PMIC_OC_STATUS_VMC |
| Type | R | R | R | R | R | R | - | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_OC_STATUS_VGP3 | MT6331_PMIC_OC_STATUS_VGP2 | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VDVFS11_PG_DEB | MT6331_PMIC_VDVFS12_PG_DEB | MT6331_PMIC_VDVFS13_PG_DEB | MT6331_PMIC_VDVFS14_PG_DEB | MT6331_PMIC_VGPU_PG_DEB | MT6331_PMIC_VCORE1_PG_DEB | MT6331_PMIC_VCORE2_PG_DEB | MT6331_PMIC_VIO18_PG_DEB | MT6331_PMIC_VUSB10_PG_DEB | MT6331_PMIC_VIO28_PG_DEB | MT6331_PMIC_VSRAM_DVFS1_PG_DEB | MT6331_PMIC_VAUD32_PG_DEB | MT6331_PMIC_VTCXO1_PG_DEB | Reserved | ||
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | - | ||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RTC_XTAL_DET_RSV | MT6331_PMIC_XOSC32_ENB_DET | MT6331_PMIC_RTC_XTAL_DET_DONE | Reserved | MT6331_PMIC_HOMEKEY_DEB | MT6331_PMIC_PWRKEY_DEB | MT6331_PMIC_PMU_TEST_MODE_SCAN | ||||||||
| Type | - | W | R | R | - | R | R | R | ||||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUD_TDSEL | MT6331_PMIC_RG_SPI_TDSEL | MT6331_PMIC_RG_PMU_TDSEL | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUD_RDSEL | MT6331_PMIC_RG_SPI_RDSEL | MT6331_PMIC_RG_PMU_RDSEL | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SMT_RTC_32K1V8_2 | MT6331_PMIC_RG_SMT_RTC_32K1V8_1 | MT6331_PMIC_RG_SMT_SRCLKEN_IN2 | MT6331_PMIC_RG_SMT_SRCLKEN_IN1 | MT6331_PMIC_RG_SMT_HOMEKEY | MT6331_PMIC_RG_SMT_WDTRSTB_IN | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SMT_SPI_MISO | MT6331_PMIC_RG_SMT_SPI_MOSI | MT6331_PMIC_RG_SMT_SPI_CSN | MT6331_PMIC_RG_SMT_SPI_CLK | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SMT_AUD_DAT2_MISO | MT6331_PMIC_RG_SMT_AUD_DAT2_MOSI | MT6331_PMIC_RG_SMT_AUD_DAT1_MISO | MT6331_PMIC_RG_SMT_AUD_DAT1_MOSI | MT6331_PMIC_RG_SMT_AUD_CLK | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OCTL_RTC_32K1V8_2 | MT6331_PMIC_RG_OCTL_RTC_32K1V8_1 | MT6331_PMIC_RG_OCTL_SRCLKEN_IN2 | MT6331_PMIC_RG_OCTL_SRCLKEN_IN1 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OCTL_SPI_MISO | MT6331_PMIC_RG_OCTL_SPI_MOSI | MT6331_PMIC_RG_OCTL_SPI_CSN | MT6331_PMIC_RG_OCTL_SPI_CLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OCTL_AUD_DAT2_MISO | MT6331_PMIC_RG_OCTL_AUD_DAT2_MOSI | MT6331_PMIC_RG_OCTL_AUD_DAT1_MISO | MT6331_PMIC_RG_OCTL_AUD_DAT1_MOSI | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OCTL_AUD_CLK | MT6331_PMIC_RG_OCTL_HOMEKEY | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_TOP_STATUS | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_MAD13M_CK_PDN | MT6331_PMIC_RG_ZCD13M_CK_PDN | MT6331_PMIC_RG_AUD_CK_PDN | MT6331_PMIC_RG_AUDIF_CK_PDN | MT6331_PMIC_RG_AUXADC_32K_CK_PDN | MT6331_PMIC_RG_AUXADC_CK_PDN | MT6331_PMIC_RG_AUXADC_12M_CK_PDN | MT6331_PMIC_RG_AUXADC_1M_CK_PDN | MT6331_PMIC_RG_DRV_ISINK3_CK_PDN | MT6331_PMIC_RG_DRV_ISINK2_CK_PDN | MT6331_PMIC_RG_DRV_ISINK1_CK_PDN | MT6331_PMIC_RG_DRV_ISINK0_CK_PDN | MT6331_PMIC_RG_DRV_32K_CK_PDN | MT6331_PMIC_RG_ACCDET_CK_PDN | MT6331_PMIC_RG_G_DRV_2M_CK_PDN | MT6331_PMIC_RG_G_SMPS_PD_CK_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_INTRP_CK_PDN | MT6331_PMIC_RG_PWMOC_6M_CK_PDN | MT6331_PMIC_RG_BUCK_12M_CK_PDN | MT6331_PMIC_RG_BUCK_1M_CK_PDN | MT6331_PMIC_RG_BUCK_32K_CK_PDN | MT6331_PMIC_RG_BUCK_ANA_CK_PDN | MT6331_PMIC_RG_FBB_12M_CK_PDN | MT6331_PMIC_RG_LDOSTB_1M_CK_PDN | MT6331_PMIC_RG_FQMTR_CK_PDN | MT6331_PMIC_RG_RTC_2SEC_OFF_DET_PDN | MT6331_PMIC_RG_RTC32K_1V8_2_O_PDN | MT6331_PMIC_RG_RTC32K_1V8_1_O_PDN | MT6331_PMIC_RG_RTCDET_CK_PDN | MT6331_PMIC_RG_RTC_75K_CK_PDN | MT6331_PMIC_RG_RTC_MCLK_PDN | MT6331_PMIC_RG_RTC_32K_CK_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_TOP_CKPDN_CON2_RSV | MT6331_PMIC_RG_STRUP_AUXADC_CK_PDN | MT6331_PMIC_RG_SPI_CK_PDN | MT6331_PMIC_RG_SMPS_CK_DIV_PDN | MT6331_PMIC_RG_BGR_TEST_CK_PDN | MT6331_PMIC_RG_EFUSE_CK_PDN | MT6331_PMIC_RG_STRUP_32K_CK_PDN | MT6331_PMIC_RG_STRUP_75K_CK_PDN | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OSC_SEL_HW_SRC_SEL | MT6331_PMIC_TOP_CKSEL_CON_RSV | MT6331_PMIC_RG_AUXADC_CK_DIVSEL | Reserved | MT6331_PMIC_RG_75K_32K_SEL | MT6331_PMIC_RG_BGR_TEST_CK_CKSEL | MT6331_PMIC_RG_STRUP_75K_CK_CKSEL | MT6331_PMIC_RG_DRV_ISINK3_CK_CKSEL | MT6331_PMIC_RG_DRV_ISINK2_CK_CKSEL | MT6331_PMIC_RG_DRV_ISINK1_CK_CKSEL | MT6331_PMIC_RG_DRV_ISINK0_CK_CKSEL | MT6331_PMIC_RG_FQMTR_CK_CKSEL | MT6331_PMIC_RG_AUD_CK_CKSEL | MT6331_PMIC_RG_AUDIF_CK_CKSEL | ||
| Type | W | W | W | - | W | W | W | W | W | W | W | W | W | W | ||
| Reset | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_TOP_CKHWEN_CON_RSV | MT6331_PMIC_RG_EFUSE_CK_PDN_HWEN | MT6331_PMIC_RG_BUCK_1M_CK_PDN_HWEN | MT6331_PMIC_RG_AUXADC_CK_PDN_HWEN | MT6331_PMIC_RG_G_DRV_2M_CK_PDN_HWEN | MT6331_PMIC_RG_G_SMPS_PD_CK_PDN_HWEN | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_BUCK_ANA_AUTO_OFF_DIS | MT6331_PMIC_TOP_CKTST_CON0_RSV | MT6331_PMIC_RG_RTC32K_CK_TST_DIS | MT6331_PMIC_RG_MAD13M_CK_TST_DIS | MT6331_PMIC_RG_AUD26M_CK_TST_DIS | MT6331_PMIC_RG_SMPS_CK_TST_DIS | MT6331_PMIC_RG_PMU75K_CK_TST_DIS | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_TOP_CKTST_CON1_RSV | MT6331_PMIC_RG_RTC32K_CK_TSTSEL | MT6331_PMIC_RG_STRUP_75K_CK_TSTSEL | MT6331_PMIC_RG_AUD_CK_TSTSEL | MT6331_PMIC_RG_AUDIF_CK_TSTSEL | MT6331_PMIC_RG_MAD13M_CK_TSTSEL | MT6331_PMIC_RG_AUD26M_CK_TSTSEL | MT6331_PMIC_RG_SMPS_CK_TSTSEL | MT6331_PMIC_RG_PMU75K_CK_TSTSEL | MT6331_PMIC_RG_RTCDET_CK_TSTSEL | MT6331_PMIC_RG_FQMTR_CK_TSTSEL | MT6331_PMIC_RG_DRV_ISINK3_CK_TSTSEL | MT6331_PMIC_RG_DRV_ISINK2_CK_TSTSEL | MT6331_PMIC_RG_DRV_ISINK1_CK_TSTSEL | MT6331_PMIC_RG_DRV_ISINK0_CK_TSTSEL | |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_CLKSQ_EN_FQR | MT6331_PMIC_RG_CLKSQ_EN_AUD | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_TOP_RST_CON_RSV | MT6331_PMIC_RG_FQMTR_RST | MT6331_PMIC_RG_RTC_RST | MT6331_PMIC_RG_DRIVER_RST | MT6331_PMIC_RG_ACCDET_RST | MT6331_PMIC_RG_AUDIO_RST | MT6331_PMIC_RG_AUXADC_RST | MT6331_PMIC_RG_EFUSE_MAN_RST | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_PWRKEY_RST_TD | Reserved | MT6331_PMIC_RG_PWRRST_TMR_DIS | MT6331_PMIC_RG_PWRKEY_RST_EN | MT6331_PMIC_RG_HOMEKEY_RST_EN | Reserved | MT6331_PMIC_RG_WDTRSTB_FB_EN | MT6331_PMIC_WDTRSTB_STATUS_CLR | MT6331_PMIC_WDTRSTB_STATUS | MT6331_PMIC_RG_WDTRSTB_MODE | MT6331_PMIC_RG_WDTRSTB_EN | ||||
| Type | - | W | - | W | W | W | - | W | W | R | W | W | ||||
| Reset | - | ? | - | ? | ? | ? | - | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_INT_EN_ACCDET_NEGV | MT6331_PMIC_RG_INT_EN_ACCDET_EINT | MT6331_PMIC_RG_INT_EN_ACCDET | MT6331_PMIC_RG_INT_EN_MAD | MT6331_PMIC_RG_INT_EN_AUDIO | MT6331_PMIC_RG_INT_EN_RTC | MT6331_PMIC_RG_INT_EN_BAT_L | MT6331_PMIC_RG_INT_EN_BAT_H | MT6331_PMIC_RG_INT_EN_THR_L | MT6331_PMIC_RG_INT_EN_THR_H | MT6331_PMIC_RG_INT_EN_CHRDET | MT6331_PMIC_RG_INT_EN_HOMEKEY | MT6331_PMIC_RG_INT_EN_PWRKEY | ||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_INT_CON1_RSV3 | MT6331_PMIC_RG_INT_CON1_RSV2 | MT6331_PMIC_RG_INT_CON1_RSV1 | MT6331_PMIC_RG_INT_CON1_RSV0 | MT6331_PMIC_RG_INT_EN_LDO_OC | MT6331_PMIC_RG_INT_EN_VIO18_OC | MT6331_PMIC_RG_INT_EN_VCORE2_OC | MT6331_PMIC_RG_INT_EN_VCORE1_OC | MT6331_PMIC_RG_INT_EN_VGPU_OC | MT6331_PMIC_RG_INT_EN_VDVFS14_OC | MT6331_PMIC_RG_INT_EN_VDVFS13_OC | MT6331_PMIC_RG_INT_EN_VDVFS12_OC | MT6331_PMIC_RG_INT_EN_VDVFS11_OC | ||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_PWRKEY_INT_SEL | MT6331_PMIC_RG_HOMEKEY_INT_SEL | MT6331_PMIC_POLARITY | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_INT_STATUS_ACCDET_NEGV | MT6331_PMIC_RG_INT_STATUS_ACCDET_EINT | MT6331_PMIC_RG_INT_STATUS_ACCDET | MT6331_PMIC_RG_INT_STATUS_MAD | MT6331_PMIC_RG_INT_STATUS_AUDIO | MT6331_PMIC_RG_INT_STATUS_RTC | MT6331_PMIC_RG_INT_STATUS_BAT_L | MT6331_PMIC_RG_INT_STATUS_BAT_H | MT6331_PMIC_RG_INT_STATUS_THR_L | MT6331_PMIC_RG_INT_STATUS_THR_H | MT6331_PMIC_RG_INT_STATUS_CHRDET | MT6331_PMIC_RG_INT_STATUS_HOMEKEY | MT6331_PMIC_RG_INT_STATUS_PWRKEY | ||
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_INT_STATUS_LDO_OC | MT6331_PMIC_RG_INT_STATUS_VIO18_OC | MT6331_PMIC_RG_INT_STATUS_VCORE2_OC | MT6331_PMIC_RG_INT_STATUS_VCORE1_OC | MT6331_PMIC_RG_INT_STATUS_VGPU_OC | MT6331_PMIC_RG_INT_STATUS_VDVFS14_OC | MT6331_PMIC_RG_INT_STATUS_VDVFS13_OC | MT6331_PMIC_RG_INT_STATUS_VDVFS12_OC | MT6331_PMIC_RG_INT_STATUS_VDVFS11_OC | ||||||
| Type | - | R | R | R | R | R | R | R | R | R | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_OC_GEAR_LDO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_FQMTR_EN | Reserved | MT6331_PMIC_FQMTR_BUSY | MT6331_PMIC_FQMTR_TCKSEL | ||||||||||||
| Type | W | - | R | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_FQMTR_WINSET | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_FQMTR_DATA | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SPI_CON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_DIO_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_DEW_READ_TEST | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_DEW_WRITE_TEST | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CRC_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CRC_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CRC_VAL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_DBG_MON_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_KEY_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_IV_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_RDY | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_MODE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_CIPHER_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_DEW_RDDMY_NO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_INT_TYPE_CON0 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_INT_TYPE_CON1 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_MD32_INT_STA | MT6331_PMIC_CPU_INT_STA | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_SMPS_TESTMODE_B | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VSLEEP_SRC1 | Reserved | MT6331_PMIC_VSLEEP_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_R2R_SRC1 | Reserved | MT6331_PMIC_R2R_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_SRCLKEN_DLY_SRC1 | Reserved | MT6331_PMIC_BUCK_OSC_SEL_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_BUCK_CON5_RSV0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VIO18_DIG_MON | MT6331_PMIC_QI_VGPU_DIG_MON | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE2_DIG_MON | MT6331_PMIC_QI_VCORE1_DIG_MON | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS14_DIG_MON | MT6331_PMIC_QI_VDVFS13_DIG_MON | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS12_DIG_MON | MT6331_PMIC_QI_VDVFS11_DIG_MON | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_OC_THD | Reserved | MT6331_PMIC_VDVFS11_OC_WND | MT6331_PMIC_VDVFS11_OC_DEG_EN | MT6331_PMIC_VDVFS11_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_OC_THD | Reserved | MT6331_PMIC_VDVFS12_OC_WND | MT6331_PMIC_VDVFS12_OC_DEG_EN | MT6331_PMIC_VDVFS12_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_OC_THD | Reserved | MT6331_PMIC_VDVFS13_OC_WND | MT6331_PMIC_VDVFS13_OC_DEG_EN | MT6331_PMIC_VDVFS13_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_OC_THD | Reserved | MT6331_PMIC_VDVFS14_OC_WND | MT6331_PMIC_VDVFS14_OC_DEG_EN | MT6331_PMIC_VDVFS14_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_OC_THD | Reserved | MT6331_PMIC_VGPU_OC_WND | MT6331_PMIC_VGPU_OC_DEG_EN | MT6331_PMIC_VGPU_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_OC_THD | Reserved | MT6331_PMIC_VCORE1_OC_WND | MT6331_PMIC_VCORE1_OC_DEG_EN | MT6331_PMIC_VCORE1_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_OC_THD | Reserved | MT6331_PMIC_VCORE2_OC_WND | MT6331_PMIC_VCORE2_OC_DEG_EN | MT6331_PMIC_VCORE2_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_OC_THD | Reserved | MT6331_PMIC_VIO18_OC_WND | MT6331_PMIC_VIO18_OC_DEG_EN | MT6331_PMIC_VIO18_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_EN_OC_SDN_SEL | MT6331_PMIC_VCORE2_EN_OC_SDN_SEL | MT6331_PMIC_VCORE1_EN_OC_SDN_SEL | MT6331_PMIC_VGPU_EN_OC_SDN_SEL | MT6331_PMIC_VDVFS14_EN_OC_SDN_SEL | MT6331_PMIC_VDVFS13_EN_OC_SDN_SEL | MT6331_PMIC_VDVFS12_EN_OC_SDN_SEL | MT6331_PMIC_VDVFS11_EN_OC_SDN_SEL | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VIO18_OC_FLAG_CLR_SEL | MT6331_PMIC_VCORE2_OC_FLAG_CLR_SEL | MT6331_PMIC_VCORE1_OC_FLAG_CLR_SEL | MT6331_PMIC_VGPU_OC_FLAG_CLR_SEL | MT6331_PMIC_VDVFS14_OC_FLAG_CLR_SEL | MT6331_PMIC_VDVFS13_OC_FLAG_CLR_SEL | MT6331_PMIC_VDVFS12_OC_FLAG_CLR_SEL | MT6331_PMIC_VDVFS11_OC_FLAG_CLR_SEL | MT6331_PMIC_VIO18_OC_FLAG_CLR | MT6331_PMIC_VCORE2_OC_FLAG_CLR | MT6331_PMIC_VCORE1_OC_FLAG_CLR | MT6331_PMIC_VGPU_OC_FLAG_CLR | MT6331_PMIC_VDVFS14_OC_FLAG_CLR | MT6331_PMIC_VDVFS13_OC_FLAG_CLR | MT6331_PMIC_VDVFS12_OC_FLAG_CLR | MT6331_PMIC_VDVFS11_OC_FLAG_CLR |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_OC_INT_EN | MT6331_PMIC_VCORE2_OC_INT_EN | MT6331_PMIC_VCORE1_OC_INT_EN | MT6331_PMIC_VGPU_OC_INT_EN | MT6331_PMIC_VDVFS14_OC_INT_EN | MT6331_PMIC_VDVFS13_OC_INT_EN | MT6331_PMIC_VDVFS12_OC_INT_EN | MT6331_PMIC_VDVFS11_OC_INT_EN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_OC_STATUS | MT6331_PMIC_VCORE2_OC_STATUS | MT6331_PMIC_VCORE1_OC_STATUS | MT6331_PMIC_VGPU_OC_STATUS | MT6331_PMIC_VDVFS14_OC_STATUS | MT6331_PMIC_VDVFS13_OC_STATUS | MT6331_PMIC_VDVFS12_OC_STATUS | MT6331_PMIC_VDVFS11_OC_STATUS | |||||||
| Type | - | R | R | R | R | R | R | R | R | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS1_TRACK_ON_CTRL | MT6331_PMIC_VSRAM_DVFS1_TRACK_ON_CTRL | MT6331_PMIC_VSRAM_DVFS1_TRACK_SLEEP_CTRL | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_OFFSET | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_DELTA | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_ON_HB | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_ON_LB | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_SLEEP_LB | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VSRAM_DVFS1_TRIMH | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VSRAM_DVFS1_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDVFS11_ZX_OS | Reserved | MT6331_PMIC_RG_VDVFS11_CSL | MT6331_PMIC_RG_VDVFS11_CSR | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_NDIS_EN | MT6331_PMIC_RG_VDVFS11_MODESET | Reserved | MT6331_PMIC_RG_VDVFS11_CSM | MT6331_PMIC_RG_VDVFS11_AVP_EN | Reserved | |||||||||
| Type | - | W | W | - | W | W | - | |||||||||
| Reset | - | ? | ? | - | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_VSLEEP | Reserved | MT6331_PMIC_RG_VDVFS11_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_DIG1_RSV1 | MT6331_PMIC_VDVFS11_DIG0_RSV1 | MT6331_PMIC_VDVFS11_VOSEL_CTRL | MT6331_PMIC_VDVFS11_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_DIG1_RSV2 | Reserved | MT6331_PMIC_VDVFS11_DIG0_RSV2 | Reserved | MT6331_PMIC_VDVFS11_VOSEL_SEL | Reserved | MT6331_PMIC_VDVFS11_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS11_OC_STATUS | Reserved | MT6331_PMIC_QI_VDVFS11_EN | MT6331_PMIC_QI_VDVFS11_STB | Reserved | MT6331_PMIC_VDVFS11_STBTD | Reserved | MT6331_PMIC_VDVFS11_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VDVFS11_SFCHG_REN | MT6331_PMIC_VDVFS11_SFCHG_RRATE | MT6331_PMIC_VDVFS11_SFCHG_FEN | MT6331_PMIC_VDVFS11_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS11_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VDVFS11_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VDVFS11_VSLEEP_SEL | MT6331_PMIC_NI_VDVFS11_R2R_PDN | Reserved | MT6331_PMIC_VDVFS11_VSLEEP_SEL | MT6331_PMIC_VDVFS11_R2R_PDN | Reserved | MT6331_PMIC_VDVFS11_VSLEEP_EN | MT6331_PMIC_NI_VDVFS11_VOSEL_TRANS | MT6331_PMIC_VDVFS11_TRANS_ONCE | MT6331_PMIC_VDVFS11_TRANS_CTRL | Reserved | MT6331_PMIC_VDVFS11_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RGS_VDVFS11_ENPWM_STATUS | MT6331_PMIC_RG_VDVFS11_PFM_CSR | Reserved | MT6331_PMIC_QI_VDVFS11_VSLEEP | MT6331_PMIC_RG_VDVFS11_RC | Reserved | MT6331_PMIC_RG_VDVFS11_CS_CAL | MT6331_PMIC_RG_VDVFS11_PKMODE | |||||||
| Type | - | R | W | - | W | W | - | W | W | |||||||
| Reset | - | ? | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS11_TRANS_BST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDVFS11_DIG1_RSV | MT6331_PMIC_QI_VSRAM_DVFS1_VSLEEP | MT6331_PMIC_RG_VDVFS11_DIG0_RSV | MT6331_PMIC_QI_VDVFS1_EN_MODECONFIG | MT6331_PMIC_QI_VDVFS1_LATCH_MODECONFIG | MT6331_PMIC_RG_VSRAM_DVFS1_VSLEEP | ||||||||||
| Type | W | W | W | R | R | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_SEL | MT6331_PMIC_VSRAM_DVFS1_VOSEL_CTRL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VSRAM_DVFS1_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VSRAM_DVFS1_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VSRAM_DVFS1_SFCHG_REN | MT6331_PMIC_VSRAM_DVFS1_SFCHG_RRATE | MT6331_PMIC_VSRAM_DVFS1_SFCHG_FEN | MT6331_PMIC_VSRAM_DVFS1_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VSRAM_DVFS1_VSLEEP_SEL | MT6331_PMIC_NI_VSRAM_DVFS1_R2R_PDN | Reserved | MT6331_PMIC_VSRAM_DVFS1_VSLEEP_SEL | MT6331_PMIC_VSRAM_DVFS1_R2R_PDN | Reserved | MT6331_PMIC_VSRAM_DVFS1_VSLEEP_EN | MT6331_PMIC_NI_VSRAM_DVFS1_VOSEL_TRANS | MT6331_PMIC_VSRAM_DVFS1_TRANS_ONCE | MT6331_PMIC_VSRAM_DVFS1_TRANS_CTRL | Reserved | MT6331_PMIC_VSRAM_DVFS1_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDVFS12_ZX_OS | Reserved | MT6331_PMIC_RG_VDVFS12_CSL | MT6331_PMIC_RG_VDVFS12_CSR | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_NDIS_EN | MT6331_PMIC_RG_VDVFS12_MODESET | Reserved | MT6331_PMIC_RG_VDVFS12_CSM | MT6331_PMIC_RG_VDVFS12_AVP_EN | Reserved | |||||||||
| Type | - | W | W | - | W | W | - | |||||||||
| Reset | - | ? | ? | - | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_VSLEEP | Reserved | MT6331_PMIC_RG_VDVFS12_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_DIG1_RSV1 | MT6331_PMIC_VDVFS12_DIG0_RSV1 | MT6331_PMIC_VDVFS12_VOSEL_CTRL | MT6331_PMIC_VDVFS12_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_DIG1_RSV2 | Reserved | MT6331_PMIC_VDVFS12_DIG0_RSV2 | Reserved | MT6331_PMIC_VDVFS12_VOSEL_SEL | Reserved | MT6331_PMIC_VDVFS12_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS12_OC_STATUS | Reserved | MT6331_PMIC_QI_VDVFS12_EN | MT6331_PMIC_QI_VDVFS12_STB | Reserved | MT6331_PMIC_VDVFS12_STBTD | Reserved | MT6331_PMIC_VDVFS12_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VDVFS12_SFCHG_REN | MT6331_PMIC_VDVFS12_SFCHG_RRATE | MT6331_PMIC_VDVFS12_SFCHG_FEN | MT6331_PMIC_VDVFS12_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS12_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VDVFS12_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VDVFS12_VSLEEP_SEL | MT6331_PMIC_NI_VDVFS12_R2R_PDN | Reserved | MT6331_PMIC_VDVFS12_VSLEEP_SEL | MT6331_PMIC_VDVFS12_R2R_PDN | Reserved | MT6331_PMIC_VDVFS12_VSLEEP_EN | MT6331_PMIC_NI_VDVFS12_VOSEL_TRANS | MT6331_PMIC_VDVFS12_TRANS_ONCE | MT6331_PMIC_VDVFS12_TRANS_CTRL | Reserved | MT6331_PMIC_VDVFS12_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RGS_VDVFS12_ENPWM_STATUS | MT6331_PMIC_RG_VDVFS12_PFM_CSR | Reserved | MT6331_PMIC_QI_VDVFS12_VSLEEP | MT6331_PMIC_RG_VDVFS12_RC | Reserved | MT6331_PMIC_RG_VDVFS12_CS_CAL | MT6331_PMIC_RG_VDVFS12_PKMODE | |||||||
| Type | - | R | W | - | W | W | - | W | W | |||||||
| Reset | - | ? | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS12_TRANS_BST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDVFS13_ZX_OS | Reserved | MT6331_PMIC_RG_VDVFS13_CSL | MT6331_PMIC_RG_VDVFS13_CSR | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_NDIS_EN | MT6331_PMIC_RG_VDVFS13_MODESET | Reserved | MT6331_PMIC_RG_VDVFS13_CSM | MT6331_PMIC_RG_VDVFS13_AVP_EN | Reserved | |||||||||
| Type | - | W | W | - | W | W | - | |||||||||
| Reset | - | ? | ? | - | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_VSLEEP | Reserved | MT6331_PMIC_RG_VDVFS13_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_DIG1_RSV1 | MT6331_PMIC_VDVFS13_DIG0_RSV1 | MT6331_PMIC_VDVFS13_VOSEL_CTRL | MT6331_PMIC_VDVFS13_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_DIG1_RSV2 | Reserved | MT6331_PMIC_VDVFS13_DIG0_RSV2 | Reserved | MT6331_PMIC_VDVFS13_VOSEL_SEL | Reserved | MT6331_PMIC_VDVFS13_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS13_OC_STATUS | Reserved | MT6331_PMIC_QI_VDVFS13_EN | MT6331_PMIC_QI_VDVFS13_STB | Reserved | MT6331_PMIC_VDVFS13_STBTD | Reserved | MT6331_PMIC_VDVFS13_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VDVFS13_SFCHG_REN | MT6331_PMIC_VDVFS13_SFCHG_RRATE | MT6331_PMIC_VDVFS13_SFCHG_FEN | MT6331_PMIC_VDVFS13_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS13_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VDVFS13_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VDVFS13_VSLEEP_SEL | MT6331_PMIC_NI_VDVFS13_R2R_PDN | Reserved | MT6331_PMIC_VDVFS13_VSLEEP_SEL | MT6331_PMIC_VDVFS13_R2R_PDN | Reserved | MT6331_PMIC_VDVFS13_VSLEEP_EN | MT6331_PMIC_NI_VDVFS13_VOSEL_TRANS | MT6331_PMIC_VDVFS13_TRANS_ONCE | MT6331_PMIC_VDVFS13_TRANS_CTRL | Reserved | MT6331_PMIC_VDVFS13_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RGS_VDVFS13_ENPWM_STATUS | MT6331_PMIC_RG_VDVFS13_PFM_CSR | Reserved | MT6331_PMIC_QI_VDVFS13_VSLEEP | MT6331_PMIC_RG_VDVFS13_RC | Reserved | MT6331_PMIC_RG_VDVFS13_CS_CAL | MT6331_PMIC_RG_VDVFS13_PKMODE | |||||||
| Type | - | R | W | - | W | W | - | W | W | |||||||
| Reset | - | ? | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS13_TRANS_BST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDVFS14_ZX_OS | Reserved | MT6331_PMIC_RG_VDVFS14_CSL | MT6331_PMIC_RG_VDVFS14_CSR | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_NDIS_EN | MT6331_PMIC_RG_VDVFS14_MODESET | Reserved | MT6331_PMIC_RG_VDVFS14_CSM | MT6331_PMIC_RG_VDVFS14_AVP_EN | Reserved | |||||||||
| Type | - | W | W | - | W | W | - | |||||||||
| Reset | - | ? | ? | - | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_VSLEEP | Reserved | MT6331_PMIC_RG_VDVFS14_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_DIG1_RSV1 | MT6331_PMIC_VDVFS14_DIG0_RSV1 | MT6331_PMIC_VDVFS14_VOSEL_CTRL | MT6331_PMIC_VDVFS14_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_DIG1_RSV2 | Reserved | MT6331_PMIC_VDVFS14_DIG0_RSV2 | Reserved | MT6331_PMIC_VDVFS14_VOSEL_SEL | Reserved | MT6331_PMIC_VDVFS14_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VDVFS14_OC_STATUS | Reserved | MT6331_PMIC_QI_VDVFS14_EN | MT6331_PMIC_QI_VDVFS14_STB | Reserved | MT6331_PMIC_VDVFS14_STBTD | Reserved | MT6331_PMIC_VDVFS14_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VDVFS14_SFCHG_REN | MT6331_PMIC_VDVFS14_SFCHG_RRATE | MT6331_PMIC_VDVFS14_SFCHG_FEN | MT6331_PMIC_VDVFS14_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VDVFS14_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VDVFS14_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VDVFS14_VSLEEP_SEL | MT6331_PMIC_NI_VDVFS14_R2R_PDN | Reserved | MT6331_PMIC_VDVFS14_VSLEEP_SEL | MT6331_PMIC_VDVFS14_R2R_PDN | Reserved | MT6331_PMIC_VDVFS14_VSLEEP_EN | MT6331_PMIC_NI_VDVFS14_VOSEL_TRANS | MT6331_PMIC_VDVFS14_TRANS_ONCE | MT6331_PMIC_VDVFS14_TRANS_CTRL | Reserved | MT6331_PMIC_VDVFS14_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RGS_VDVFS14_ENPWM_STATUS | MT6331_PMIC_RG_VDVFS14_PFM_CSR | Reserved | MT6331_PMIC_QI_VDVFS14_VSLEEP | MT6331_PMIC_RG_VDVFS14_RC | Reserved | MT6331_PMIC_RG_VDVFS14_CS_CAL | MT6331_PMIC_RG_VDVFS14_PKMODE | |||||||
| Type | - | R | W | - | W | W | - | W | W | |||||||
| Reset | - | ? | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VDVFS14_TRANS_BST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VGPU_ZX_OS | Reserved | MT6331_PMIC_RG_VGPU_CSL | MT6331_PMIC_RG_VGPU_CSR | MT6331_PMIC_RG_VGPU_CC | Reserved | MT6331_PMIC_RG_VGPU_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_NDIS_EN | MT6331_PMIC_RG_VGPU_MODESET | Reserved | MT6331_PMIC_RG_VGPU_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_VSLEEP | Reserved | MT6331_PMIC_RG_VGPU_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_BURST_CTRL | MT6331_PMIC_VGPU_DLC_CTRL | MT6331_PMIC_VGPU_VOSEL_CTRL | MT6331_PMIC_VGPU_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_BURST_SEL | Reserved | MT6331_PMIC_VGPU_DLC_SEL | Reserved | MT6331_PMIC_VGPU_VOSEL_SEL | Reserved | MT6331_PMIC_VGPU_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VGPU_OC_STATUS | Reserved | MT6331_PMIC_QI_VGPU_EN | MT6331_PMIC_QI_VGPU_STB | Reserved | MT6331_PMIC_VGPU_STBTD | Reserved | MT6331_PMIC_VGPU_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VGPU_SFCHG_REN | MT6331_PMIC_VGPU_SFCHG_RRATE | MT6331_PMIC_VGPU_SFCHG_FEN | MT6331_PMIC_VGPU_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VGPU_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VGPU_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VGPU_BURST | Reserved | MT6331_PMIC_VGPU_BURST_SLEEP | Reserved | MT6331_PMIC_VGPU_BURST_ON | Reserved | MT6331_PMIC_VGPU_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VGPU_DLC | Reserved | MT6331_PMIC_VGPU_DLC_SLEEP | Reserved | MT6331_PMIC_VGPU_DLC_ON | Reserved | MT6331_PMIC_VGPU_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VGPU_DLC_N | Reserved | MT6331_PMIC_VGPU_DLC_N_SLEEP | Reserved | MT6331_PMIC_VGPU_DLC_N_ON | Reserved | MT6331_PMIC_VGPU_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VGPU_VSLEEP_SEL | MT6331_PMIC_NI_VGPU_R2R_PDN | Reserved | MT6331_PMIC_VGPU_VSLEEP_SEL | MT6331_PMIC_VGPU_R2R_PDN | Reserved | MT6331_PMIC_VGPU_VSLEEP_EN | MT6331_PMIC_NI_VGPU_VOSEL_TRANS | MT6331_PMIC_VGPU_TRANS_ONCE | MT6331_PMIC_VGPU_TRANS_CTRL | Reserved | MT6331_PMIC_VGPU_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VGPU_PFM_RIP | MT6331_PMIC_RGS_VGPU_ENPWM_STATUS | Reserved | MT6331_PMIC_QI_VGPU_MODE | MT6331_PMIC_QI_VGPU_VSLEEP | Reserved | MT6331_PMIC_RG_VGPU_TRAN_BST | MT6331_PMIC_RG_VGPU_DTS_ENB | ||||||||
| Type | W | R | - | W | W | - | W | W | ||||||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGPU_RCL_TRIM_EN | Reserved | MT6331_PMIC_RG_VGPU_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCORE1_ZX_OS | Reserved | MT6331_PMIC_RG_VCORE1_CSL | MT6331_PMIC_RG_VCORE1_CSR | MT6331_PMIC_RG_VCORE1_CC | Reserved | MT6331_PMIC_RG_VCORE1_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_NDIS_EN | MT6331_PMIC_RG_VCORE1_MODESET | Reserved | MT6331_PMIC_RG_VCORE1_CSM | MT6331_PMIC_RG_VCORE1_AVP_EN | MT6331_PMIC_RG_VCORE1_AVP_OS | |||||||||
| Type | - | W | W | - | W | W | W | |||||||||
| Reset | - | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_VSLEEP | Reserved | MT6331_PMIC_RG_VCORE1_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_BURST_CTRL | MT6331_PMIC_VCORE1_DLC_CTRL | MT6331_PMIC_VCORE1_VOSEL_CTRL | MT6331_PMIC_VCORE1_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_BURST_SEL | Reserved | MT6331_PMIC_VCORE1_DLC_SEL | Reserved | MT6331_PMIC_VCORE1_VOSEL_SEL | Reserved | MT6331_PMIC_VCORE1_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VCORE1_OC_STATUS | Reserved | MT6331_PMIC_QI_VCORE1_EN | MT6331_PMIC_QI_VCORE1_STB | Reserved | MT6331_PMIC_VCORE1_STBTD | Reserved | MT6331_PMIC_VCORE1_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VCORE1_SFCHG_REN | MT6331_PMIC_VCORE1_SFCHG_RRATE | MT6331_PMIC_VCORE1_SFCHG_FEN | MT6331_PMIC_VCORE1_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE1_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VCORE1_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE1_BURST | Reserved | MT6331_PMIC_VCORE1_BURST_SLEEP | Reserved | MT6331_PMIC_VCORE1_BURST_ON | Reserved | MT6331_PMIC_VCORE1_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE1_DLC | Reserved | MT6331_PMIC_VCORE1_DLC_SLEEP | Reserved | MT6331_PMIC_VCORE1_DLC_ON | Reserved | MT6331_PMIC_VCORE1_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE1_DLC_N | Reserved | MT6331_PMIC_VCORE1_DLC_N_SLEEP | Reserved | MT6331_PMIC_VCORE1_DLC_N_ON | Reserved | MT6331_PMIC_VCORE1_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VCORE1_VSLEEP_SEL | MT6331_PMIC_NI_VCORE1_R2R_PDN | Reserved | MT6331_PMIC_VCORE1_VSLEEP_SEL | MT6331_PMIC_VCORE1_R2R_PDN | Reserved | MT6331_PMIC_VCORE1_VSLEEP_EN | MT6331_PMIC_NI_VCORE1_VOSEL_TRANS | MT6331_PMIC_VCORE1_TRANS_ONCE | MT6331_PMIC_VCORE1_TRANS_CTRL | Reserved | MT6331_PMIC_VCORE1_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCORE1_PFM_RIP | MT6331_PMIC_RGS_VCORE1_ENPWM_STATUS | Reserved | MT6331_PMIC_QI_VCORE1_MODE | MT6331_PMIC_QI_VCORE1_VSLEEP | Reserved | MT6331_PMIC_RG_VCORE1_TRAN_BST | MT6331_PMIC_RG_VCORE1_DTS_ENB | ||||||||
| Type | W | R | - | W | W | - | W | W | ||||||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE1_RCL_TRIM_EN | Reserved | MT6331_PMIC_RG_VCORE1_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCORE2_ZX_OS | Reserved | MT6331_PMIC_RG_VCORE2_CSL | MT6331_PMIC_RG_VCORE2_CSR | MT6331_PMIC_RG_VCORE2_CC | Reserved | MT6331_PMIC_RG_VCORE2_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_NDIS_EN | MT6331_PMIC_RG_VCORE2_MODESET | Reserved | MT6331_PMIC_RG_VCORE2_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_VSLEEP | Reserved | MT6331_PMIC_RG_VCORE2_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_BURST_CTRL | MT6331_PMIC_VCORE2_DLC_CTRL | MT6331_PMIC_VCORE2_VOSEL_CTRL | MT6331_PMIC_VCORE2_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_BURST_SEL | Reserved | MT6331_PMIC_VCORE2_DLC_SEL | Reserved | MT6331_PMIC_VCORE2_VOSEL_SEL | Reserved | MT6331_PMIC_VCORE2_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VCORE2_OC_STATUS | Reserved | MT6331_PMIC_QI_VCORE2_EN | MT6331_PMIC_QI_VCORE2_STB | Reserved | MT6331_PMIC_VCORE2_STBTD | Reserved | MT6331_PMIC_VCORE2_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VCORE2_SFCHG_REN | MT6331_PMIC_VCORE2_SFCHG_RRATE | MT6331_PMIC_VCORE2_SFCHG_FEN | MT6331_PMIC_VCORE2_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VCORE2_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VCORE2_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE2_BURST | Reserved | MT6331_PMIC_VCORE2_BURST_SLEEP | Reserved | MT6331_PMIC_VCORE2_BURST_ON | Reserved | MT6331_PMIC_VCORE2_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE2_DLC | Reserved | MT6331_PMIC_VCORE2_DLC_SLEEP | Reserved | MT6331_PMIC_VCORE2_DLC_ON | Reserved | MT6331_PMIC_VCORE2_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCORE2_DLC_N | Reserved | MT6331_PMIC_VCORE2_DLC_N_SLEEP | Reserved | MT6331_PMIC_VCORE2_DLC_N_ON | Reserved | MT6331_PMIC_VCORE2_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VCORE2_VSLEEP_SEL | MT6331_PMIC_NI_VCORE2_R2R_PDN | Reserved | MT6331_PMIC_VCORE2_VSLEEP_SEL | MT6331_PMIC_VCORE2_R2R_PDN | Reserved | MT6331_PMIC_VCORE2_VSLEEP_EN | MT6331_PMIC_NI_VCORE2_VOSEL_TRANS | MT6331_PMIC_VCORE2_TRANS_ONCE | MT6331_PMIC_VCORE2_TRANS_CTRL | Reserved | MT6331_PMIC_VCORE2_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCORE2_PFM_RIP | MT6331_PMIC_RGS_VCORE2_ENPWM_STATUS | Reserved | MT6331_PMIC_QI_VCORE2_MODE | MT6331_PMIC_QI_VCORE2_VSLEEP | Reserved | MT6331_PMIC_RG_VCORE2_TRAN_BST | MT6331_PMIC_RG_VCORE2_DTS_ENB | ||||||||
| Type | W | R | - | W | W | - | W | W | ||||||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_RCL_TRIM_EN | Reserved | MT6331_PMIC_RG_VCORE2_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCORE2_FBDIV | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VIO18_ZX_OS | Reserved | MT6331_PMIC_RG_VIO18_CSL | MT6331_PMIC_RG_VIO18_CSR | MT6331_PMIC_RG_VIO18_CC | Reserved | MT6331_PMIC_RG_VIO18_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_NDIS_EN | MT6331_PMIC_RG_VIO18_MODESET | Reserved | MT6331_PMIC_RG_VIO18_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_VSLEEP | Reserved | MT6331_PMIC_RG_VIO18_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_BURST_CTRL | MT6331_PMIC_VIO18_DLC_CTRL | MT6331_PMIC_VIO18_VOSEL_CTRL | MT6331_PMIC_VIO18_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_BURST_SEL | Reserved | MT6331_PMIC_VIO18_DLC_SEL | Reserved | MT6331_PMIC_VIO18_VOSEL_SEL | Reserved | MT6331_PMIC_VIO18_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VIO18_OC_STATUS | Reserved | MT6331_PMIC_QI_VIO18_EN | MT6331_PMIC_QI_VIO18_STB | Reserved | MT6331_PMIC_VIO18_STBTD | Reserved | MT6331_PMIC_VIO18_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_VIO18_SFCHG_REN | MT6331_PMIC_VIO18_SFCHG_RRATE | MT6331_PMIC_VIO18_SFCHG_FEN | MT6331_PMIC_VIO18_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_VIO18_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_VIO18_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VIO18_BURST | Reserved | MT6331_PMIC_VIO18_BURST_SLEEP | Reserved | MT6331_PMIC_VIO18_BURST_ON | Reserved | MT6331_PMIC_VIO18_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VIO18_DLC | Reserved | MT6331_PMIC_VIO18_DLC_SLEEP | Reserved | MT6331_PMIC_VIO18_DLC_ON | Reserved | MT6331_PMIC_VIO18_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VIO18_DLC_N | Reserved | MT6331_PMIC_VIO18_DLC_N_SLEEP | Reserved | MT6331_PMIC_VIO18_DLC_N_ON | Reserved | MT6331_PMIC_VIO18_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_VIO18_VSLEEP_SEL | MT6331_PMIC_NI_VIO18_R2R_PDN | Reserved | MT6331_PMIC_VIO18_VSLEEP_SEL | MT6331_PMIC_VIO18_R2R_PDN | Reserved | MT6331_PMIC_VIO18_VSLEEP_EN | MT6331_PMIC_NI_VIO18_VOSEL_TRANS | MT6331_PMIC_VIO18_TRANS_ONCE | MT6331_PMIC_VIO18_TRANS_CTRL | Reserved | MT6331_PMIC_VIO18_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VIO18_PFM_RIP | MT6331_PMIC_RGS_VIO18_ENPWM_STATUS | Reserved | MT6331_PMIC_RG_VIO18_TRAN_BST | MT6331_PMIC_RG_VIO18_DTS_ENB | |||||||||||
| Type | W | R | - | W | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO18_RCL_TRIM_EN | Reserved | MT6331_PMIC_RG_VIO18_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_K_INV | MT6331_PMIC_K_AUTO_EN | MT6331_PMIC_K_SRC_SEL | MT6331_PMIC_K_START_MANUAL | MT6331_PMIC_K_ONCE | MT6331_PMIC_K_ONCE_EN | MT6331_PMIC_K_MAP_SEL | MT6331_PMIC_K_RST_DONE | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_K_CONTROL_SMPS | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_SMPS_OSC_CAL | MT6331_PMIC_K_CONTROL | MT6331_PMIC_K_DONE | MT6331_PMIC_K_RESULT | |||||||||||
| Type | - | R | R | R | R | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_K_BUCK_CK_CNT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDZCDMUXSEL_VAUDP32 | MT6331_PMIC_RG_AUDZCDCLKSEL_VAUDP32 | MT6331_PMIC_RG_AUDZCDTIMEOUTMODESEL | MT6331_PMIC_RG_AUDZCDGAINSTEPSIZE | MT6331_PMIC_RG_AUDZCDGAINSTEPTIME | MT6331_PMIC_RG_AUDZCDENABLE | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDLORGAIN | Reserved | MT6331_PMIC_RG_AUDLOLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDHPRGAIN | Reserved | MT6331_PMIC_RG_AUDHPLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDHSGAIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDIVRGAIN | Reserved | MT6331_PMIC_RG_AUDIVLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDINTGAIN2 | Reserved | MT6331_PMIC_RG_AUDINTGAIN1 | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK0_RSV0 | Reserved | MT6331_PMIC_ISINK0_RSV1 | MT6331_PMIC_ISINK_CH0_MODE | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_DIM0_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_CH0_STEP | Reserved | MT6331_PMIC_ISINK_DIM0_DUTY | MT6331_PMIC_ISINK_SFSTR0_TC | MT6331_PMIC_ISINK_SFSTR0_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_BREATH0_TR1_SEL | MT6331_PMIC_ISINK_BREATH0_TR2_SEL | MT6331_PMIC_ISINK_BREATH0_TF1_SEL | MT6331_PMIC_ISINK_BREATH0_TF2_SEL | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_BREATH0_TON_SEL | Reserved | MT6331_PMIC_ISINK_BREATH0_TOFF_SEL | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK1_RSV0 | Reserved | MT6331_PMIC_ISINK1_RSV1 | MT6331_PMIC_ISINK_CH1_MODE | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_DIM1_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_CH1_STEP | Reserved | MT6331_PMIC_ISINK_DIM1_DUTY | MT6331_PMIC_ISINK_SFSTR1_TC | MT6331_PMIC_ISINK_SFSTR1_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_BREATH1_TR1_SEL | MT6331_PMIC_ISINK_BREATH1_TR2_SEL | MT6331_PMIC_ISINK_BREATH1_TF1_SEL | MT6331_PMIC_ISINK_BREATH1_TF2_SEL | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_BREATH1_TON_SEL | Reserved | MT6331_PMIC_ISINK_BREATH1_TOFF_SEL | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK2_RSV0 | Reserved | MT6331_PMIC_ISINK2_RSV1 | MT6331_PMIC_ISINK_CH2_MODE | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_DIM2_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_CH2_STEP | Reserved | MT6331_PMIC_ISINK_DIM2_DUTY | MT6331_PMIC_ISINK_SFSTR2_TC | MT6331_PMIC_ISINK_SFSTR2_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_BREATH2_TR1_SEL | MT6331_PMIC_ISINK_BREATH2_TR2_SEL | MT6331_PMIC_ISINK_BREATH2_TF1_SEL | MT6331_PMIC_ISINK_BREATH2_TF2_SEL | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_BREATH2_TON_SEL | Reserved | MT6331_PMIC_ISINK_BREATH2_TOFF_SEL | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK3_RSV0 | Reserved | MT6331_PMIC_ISINK3_RSV1 | MT6331_PMIC_ISINK_CH3_MODE | Reserved | |||||||||||
| Type | W | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_DIM3_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_CH3_STEP | Reserved | MT6331_PMIC_ISINK_DIM3_DUTY | MT6331_PMIC_ISINK_SFSTR3_TC | MT6331_PMIC_ISINK_SFSTR3_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ISINK_BREATH3_TR1_SEL | MT6331_PMIC_ISINK_BREATH3_TR2_SEL | MT6331_PMIC_ISINK_BREATH3_TF1_SEL | MT6331_PMIC_ISINK_BREATH3_TF2_SEL | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_BREATH3_TON_SEL | Reserved | MT6331_PMIC_ISINK_BREATH3_TOFF_SEL | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_TRIM_EN | MT6331_PMIC_RG_TRIM_SEL | MT6331_PMIC_RG_ISINK0_DOUBLE_EN | MT6331_PMIC_RG_ISINK1_DOUBLE_EN | MT6331_PMIC_RG_ISINK2_DOUBLE_EN | MT6331_PMIC_RG_ISINK3_DOUBLE_EN | MT6331_PMIC_RG_ISINKS_RSV | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_NI_ISINK0_STATUS | MT6331_PMIC_NI_ISINK1_STATUS | MT6331_PMIC_NI_ISINK2_STATUS | MT6331_PMIC_NI_ISINK3_STATUS | |||||||||||
| Type | - | R | R | R | R | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_PHASE_DLY_TC | MT6331_PMIC_ISINK_PHASE3_DLY_EN | MT6331_PMIC_ISINK_PHASE2_DLY_EN | MT6331_PMIC_ISINK_PHASE1_DLY_EN | MT6331_PMIC_ISINK_PHASE0_DLY_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ISINK_CH3_BIAS_EN | MT6331_PMIC_ISINK_CH2_BIAS_EN | MT6331_PMIC_ISINK_CH1_BIAS_EN | MT6331_PMIC_ISINK_CH0_BIAS_EN | MT6331_PMIC_ISINK_CHOP3_EN | MT6331_PMIC_ISINK_CHOP2_EN | MT6331_PMIC_ISINK_CHOP1_EN | MT6331_PMIC_ISINK_CHOP0_EN | MT6331_PMIC_ISINK_CH3_EN | MT6331_PMIC_ISINK_CH2_EN | MT6331_PMIC_ISINK_CH1_EN | MT6331_PMIC_ISINK_CH0_EN | |||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_ALDO_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VTCXO1_EN | MT6331_PMIC_RG_VTCXO1_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VTCXO1_ON_CTRL | MT6331_PMIC_RG_VTCXO1_EN | MT6331_PMIC_RG_VTCXO1_STBTD | MT6331_PMIC_QI_VTCXO1_MODE | MT6331_PMIC_RG_VTCXO1_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VTCXO1_LP_SET | MT6331_PMIC_RG_VTCXO1_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VTCXO2_EN | MT6331_PMIC_RG_VTCXO2_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VTCXO2_ON_CTRL | MT6331_PMIC_RG_VTCXO2_EN | MT6331_PMIC_RG_VTCXO2_STBTD | MT6331_PMIC_QI_VTCXO2_MODE | MT6331_PMIC_RG_VTCXO2_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VTCXO2_LP_SET | MT6331_PMIC_RG_VTCXO2_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VAUD32_EN | MT6331_PMIC_RG_VAUD32_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VAUD32_ON_CTRL | MT6331_PMIC_RG_VAUD32_EN | MT6331_PMIC_RG_VAUD32_STBTD | MT6331_PMIC_QI_VAUD32_MODE | MT6331_PMIC_RG_VAUD32_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VAUD32_LP_SET | MT6331_PMIC_RG_VAUD32_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VAUXA32_EN | MT6331_PMIC_RG_VAUXA32_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VAUXA32_ON_CTRL | MT6331_PMIC_RG_VAUXA32_EN | MT6331_PMIC_RG_VAUXA32_STBTD | MT6331_PMIC_QI_VAUXA32_MODE | MT6331_PMIC_RG_VAUXA32_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VAUXA32_AUXADC_PWDB_EN | MT6331_PMIC_RG_VAUXA32_LP_SET | MT6331_PMIC_RG_VAUXA32_LP_CTRL | ||||
| Type | R | W | - | W | W | W | R | W | - | W | W | W | ||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCAMA_EN | Reserved | MT6331_PMIC_RG_VCAMA_STBTD | Reserved | ||||||||||||
| Type | W | - | W | - | ||||||||||||
| Reset | ? | - | ? | - | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VAUXA32_CAL | Reserved | MT6331_PMIC_RG_VAUXA32_VOSEL | Reserved | MT6331_PMIC_RG_VAUXA32_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VTCXO1_CAL | Reserved | MT6331_PMIC_RG_VTCXO1_VOSEL | Reserved | MT6331_PMIC_RG_VTCXO1_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VTCXO2_CAL | Reserved | MT6331_PMIC_RG_VTCXO2_VOSEL | Reserved | MT6331_PMIC_RG_VTCXO2_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAMA_CAL | Reserved | MT6331_PMIC_RG_VCAMA_VOSEL | Reserved | MT6331_PMIC_RG_VCAMA_NDIS_EN | MT6331_PMIC_RG_VCAMA_FBSEL | |||||||||
| Type | - | W | - | W | - | W | W | |||||||||
| Reset | - | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VAUD32_CAL | Reserved | MT6331_PMIC_RG_VAUD32_VOSEL | Reserved | MT6331_PMIC_RG_VAUD32_NDIS_EN | MT6331_PMIC_RG_VAUD32_FBSEL | |||||||||
| Type | - | W | - | W | - | W | W | |||||||||
| Reset | - | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ANALDO_DEGTD_SEL | MT6331_PMIC_RG_VTCXO1_OCFB_EN | MT6331_PMIC_RG_VTCXO2_OCFB_EN | MT6331_PMIC_RG_VAUD32_OCFB_EN | MT6331_PMIC_RG_VAUXA32_OCFB_EN | MT6331_PMIC_RG_VCAMA_OCFB_EN | Reserved | |||||||||
| Type | W | W | W | W | W | W | - | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VTCXO1_OCFB_EN | MT6331_PMIC_QI_VTCXO2_OCFB_EN | MT6331_PMIC_QI_VAUD32_OCFB_EN | MT6331_PMIC_QI_VAUXA32_OCFB_EN | MT6331_PMIC_QI_VCAMA_OCFB_EN | Reserved | ||||||||||
| Type | R | R | R | R | R | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_ANALDO_RSV0 | MT6331_PMIC_RG_ANALDO_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SYSLDO3_RSV | MT6331_PMIC_RG_SYSLDO2_RSV | MT6331_PMIC_RG_SYSLDO1_RSV | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VCAMD_EN | Reserved | MT6331_PMIC_RG_VCAMD_STBTD | MT6331_PMIC_QI_VCAMD_MODE | MT6331_PMIC_RG_VCAMD_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VCAMD_LP_MODE_SET | MT6331_PMIC_RG_VCAMD_LP_CTRL | ||||||||
| Type | W | - | W | R | W | - | W | W | ||||||||
| Reset | ? | - | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VUSB10_EN | Reserved | MT6331_PMIC_RG_VUSB10_EN | MT6331_PMIC_RG_VUSB10_STBTD | MT6331_PMIC_QI_VUSB10_MODE | MT6331_PMIC_RG_VUSB10_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VUSB10_LP_MODE_SET | MT6331_PMIC_RG_VUSB10_LP_CTRL | |||||||
| Type | R | - | W | W | R | W | - | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAM_IO_EN | MT6331_PMIC_RG_VCAM_IO_STBTD | MT6331_PMIC_QI_VCAM_IO_MODE | MT6331_PMIC_RG_VCAM_IO_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VCAM_IO_LP_MODE_SET | MT6331_PMIC_RG_VCAM_IO_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VSRAM_DVFS1_EN | MT6331_PMIC_RG_VSRAM_DVFS1_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VSRAM_DVFS1_ON_CTRL | MT6331_PMIC_RG_VSRAM_DVFS1_EN | MT6331_PMIC_RG_VSRAM_DVFS1_STBTD | MT6331_PMIC_QI_VSRAM_DVFS1_MODE | MT6331_PMIC_RG_VSRAM_DVFS1_SRCLK_MODE_SEL | MT6331_PMIC_RG_VSRAM_DIG0_RSV0 | Reserved | MT6331_PMIC_RG_VSRAM_DVFS1_LP_MODE_SET | MT6331_PMIC_RG_VSRAM_DVFS1_LP_CTRL | ||||
| Type | R | W | - | W | W | W | R | W | W | - | W | W | ||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | - | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VMIPI_EN | MT6331_PMIC_RG_VMIPI_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VMIPI_ON_CTRL | MT6331_PMIC_RG_VMIPI_EN | MT6331_PMIC_RG_VMIPI_STBTD | MT6331_PMIC_QI_VMIPI_MODE | MT6331_PMIC_RG_VMIPI_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VMIPI_LP_MODE_SET | MT6331_PMIC_RG_VMIPI_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP2_EN | MT6331_PMIC_RG_VGP2_STBTD | MT6331_PMIC_QI_VGP2_MODE | MT6331_PMIC_RG_VGP2_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VGP2_LP_MODE_SET | MT6331_PMIC_RG_VGP2_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP3_EN | MT6331_PMIC_RG_VGP3_STBTD | MT6331_PMIC_QI_VGP3_MODE | MT6331_PMIC_RG_VGP3_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VGP3_LP_MODE_SET | MT6331_PMIC_RG_VGP3_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VBIASN_EN | Reserved | MT6331_PMIC_RG_VBIASN_EN | MT6331_PMIC_RG_VBIASN_STBTD | MT6331_PMIC_QI_VBIASN_MODE | MT6331_PMIC_RG_VBIASN_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VBIASN_LP_MODE_SET | MT6331_PMIC_RG_VBIASN_LP_CTRL | |||||||
| Type | R | - | W | W | R | W | - | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAMD_CAL | Reserved | MT6331_PMIC_RG_VCAMD_VOSEL | Reserved | MT6331_PMIC_RG_VCAMD_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VUSB10_CAL | Reserved | MT6331_PMIC_RG_VUSB10_VOSEL | MT6331_PMIC_RG_VUSB10_NDIS_EN | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAM_IO_CAL | Reserved | MT6331_PMIC_RG_VCAM_IO_VOSEL | MT6331_PMIC_RG_VCAM_IO_NDIS_EN | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VSRAM_DVFS1_VOSEL | MT6331_PMIC_RG_VSRAM_DVFS1_CMP_DEBUG_EN | MT6331_PMIC_RG_VSRAM_DVFS1_POWER_DOWN_NDIS_EN | MT6331_PMIC_RG_VSRAM_DVFS1_NDIS_PLCUR | Reserved | MT6331_PMIC_RG_VSRAM_DVFS1_NDIS_EN | Reserved | |||||||||
| Type | W | W | W | W | - | W | - | |||||||||
| Reset | ? | ? | ? | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VMIPI_CAL | Reserved | MT6331_PMIC_RG_VMIPI_VOSEL | MT6331_PMIC_RG_VMIPI_NDIS_EN | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP2_CAL | Reserved | MT6331_PMIC_RG_VGP2_VOSEL | MT6331_PMIC_RG_VGP2_NDIS_EN | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP3_CAL | Reserved | MT6331_PMIC_RG_VGP3_VOSEL | MT6331_PMIC_RG_VGP3_NDIS_EN | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VBIASN_CAL | Reserved | MT6331_PMIC_RG_VBIASN_NDIS_EN | Reserved | |||||||||||
| Type | - | W | - | W | - | |||||||||||
| Reset | - | ? | - | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VBIASN_RSV1 | Reserved | MT6331_PMIC_RG_VBIASN_RSV2 | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_SYSLDO_DEGTD_SEL | MT6331_PMIC_RG_VCAMD_OCFB_EN | MT6331_PMIC_RG_VUSB10_OCFB_EN | MT6331_PMIC_RG_VCAM_IO_OCFB_EN | MT6331_PMIC_RG_VSRAM_DVFS1_OCFB_EN | MT6331_PMIC_RG_VMIPI_OCFB_EN | MT6331_PMIC_RG_VGP2_OCFB_EN | MT6331_PMIC_RG_VGP3_OCFB_EN | MT6331_PMIC_RG_VBIASN_OCFB_EN | Reserved | ||||||
| Type | W | W | W | W | W | W | W | W | W | - | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VCAMD_OCFB_EN | MT6331_PMIC_QI_VUSB10_OCFB_EN | MT6331_PMIC_QI_VCAM_IO_OCFB_EN | MT6331_PMIC_QI_VSRAM_DVFS1_OCFB_EN | MT6331_PMIC_QI_VMIPI_OCFB_EN | MT6331_PMIC_QI_VGP2_OCFB_EN | MT6331_PMIC_QI_VGP3_OCFB_EN | MT6331_PMIC_QI_VBIASN_OCFB_EN | Reserved | ||||||
| Type | - | R | R | R | R | R | R | R | R | - | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | - | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VBIASN_VOSEL | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_SYSLDO_RSV0 | MT6331_PMIC_RG_SYSLDO_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_DLDO1_RSV | MT6331_PMIC_RG_DLDO2_RSV | Reserved | MT6331_PMIC_RG_DLDO3_RSV | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VIO28_EN | Reserved | MT6331_PMIC_RG_VIO28_EN | MT6331_PMIC_RG_VIO28_STBTD | MT6331_PMIC_QI_VIO28_MODE | MT6331_PMIC_RG_VIO28_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VIO28_LP_MODE_SET | MT6331_PMIC_RG_VIO28_LP_CTRL | |||||||
| Type | R | - | W | W | R | W | - | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAM_AF_EN | MT6331_PMIC_RG_VCAM_AF_STBTD | MT6331_PMIC_QI_VCAM_AF_MODE | MT6331_PMIC_RG_VCAM_AF_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VCAM_AF_LP_MODE_SET | MT6331_PMIC_RG_VCAM_AF_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VMC_EN | MT6331_PMIC_RG_VMC_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VMC_ON_CTRL | MT6331_PMIC_RG_VMC_EN | MT6331_PMIC_RG_VMC_STBTD | MT6331_PMIC_QI_VMC_MODE | MT6331_PMIC_RG_VMC_SRCLK_MODE_SEL | MT6331_PMIC_RG_VMC_INT_DIS_SEL | Reserved | MT6331_PMIC_RG_VMC_LP_MODE_SET | MT6331_PMIC_RG_VMC_LP_CTRL | ||||
| Type | R | W | - | W | W | W | R | W | W | - | W | W | ||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | - | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VMCH_EN | MT6331_PMIC_RG_VMCH_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VMCH_ON_CTRL | MT6331_PMIC_RG_VMCH_EN | MT6331_PMIC_RG_VMCH_STBTD | MT6331_PMIC_QI_VMCH_MODE | MT6331_PMIC_RG_VMCH_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VMCH_LP_MODE_SET | MT6331_PMIC_RG_VMCH_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VEMC33_EN | MT6331_PMIC_RG_VEMC33_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VEMC33_ON_CTRL | MT6331_PMIC_RG_VEMC33_EN | MT6331_PMIC_RG_VEMC33_STBTD | MT6331_PMIC_QI_VEMC33_MODE | MT6331_PMIC_RG_VEMC33_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VEMC33_LP_MODE_SET | MT6331_PMIC_RG_VEMC33_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP1_EN | MT6331_PMIC_RG_VGP1_STBTD | MT6331_PMIC_QI_VGP1_MODE | MT6331_PMIC_RG_VGP1_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VGP1_LP_MODE_SET | MT6331_PMIC_RG_VGP1_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP4_EN | MT6331_PMIC_RG_VGP4_STBTD | MT6331_PMIC_QI_VGP4_MODE | MT6331_PMIC_RG_VGP4_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VGP4_LP_MODE_SET | MT6331_PMIC_RG_VGP4_LP_CTRL | ||||||||
| Type | - | W | W | R | W | - | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VSIM1_EN | MT6331_PMIC_RG_VSIM1_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VSIM1_ON_CTRL | MT6331_PMIC_RG_VSIM1_EN | MT6331_PMIC_RG_VSIM1_STBTD | MT6331_PMIC_QI_VSIM1_MODE | MT6331_PMIC_RG_VSIM1_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VSIM1_LP_MODE_SET | MT6331_PMIC_RG_VSIM1_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VSIM2_EN | MT6331_PMIC_RG_VSIM2_SRCLK_EN_SEL | Reserved | MT6331_PMIC_RG_VSIM2_ON_CTRL | MT6331_PMIC_RG_VSIM2_EN | MT6331_PMIC_RG_VSIM2_STBTD | MT6331_PMIC_QI_VSIM2_MODE | MT6331_PMIC_RG_VSIM2_SRCLK_MODE_SEL | Reserved | MT6331_PMIC_RG_VSIM2_LP_MODE_SET | MT6331_PMIC_RG_VSIM2_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VFBB_EN | MT6331_PMIC_RG_VFBB_EN_SEL | MT6331_PMIC_RG_VFBB_EN | Reserved | MT6331_PMIC_QI_VFBB_RSTB | MT6331_PMIC_RG_VFBB_RSTB_SEL | MT6331_PMIC_RG_VFBB_RSTB | Reserved | ||||||||
| Type | R | W | W | - | R | W | W | - | ||||||||
| Reset | ? | ? | ? | - | ? | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_QI_VRTC_EN | Reserved | MT6331_PMIC_RG_VRTC_EN | Reserved | MT6331_PMIC_RG_VRTC_FORCE_ON | |||||||||||
| Type | R | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIBR_EN | MT6331_PMIC_RG_VIBR_STBTD | MT6331_PMIC_QI_VIBR_MODE | MT6331_PMIC_RG_VIBR_SRCLK_MODE_SEL | MT6331_PMIC_RG_VIBR_THER_SHEN_EN | Reserved | MT6331_PMIC_RG_VIBR_LP_MODE_SET | MT6331_PMIC_RG_VIBR_LP_CTRL | |||||||
| Type | - | W | W | R | W | W | - | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIO28_CAL | Reserved | MT6331_PMIC_RG_VIO28_VOSEL | Reserved | MT6331_PMIC_RG_VIO28_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VCAM_AF_CAL | Reserved | MT6331_PMIC_RG_VCAM_AF_VOSEL | Reserved | MT6331_PMIC_RG_VCAM_AF_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VMC_CAL | Reserved | MT6331_PMIC_RG_VMC_VOSEL | Reserved | MT6331_PMIC_RG_VMC_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VMCH_CAL | Reserved | MT6331_PMIC_RG_VMCH_VOSEL | Reserved | MT6331_PMIC_RG_VMCH_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VEMC33_CAL | Reserved | MT6331_PMIC_RG_VEMC33_VOSEL | Reserved | MT6331_PMIC_RG_VEMC33_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP4_CAL | Reserved | MT6331_PMIC_RG_VGP4_VOSEL | Reserved | MT6331_PMIC_RG_VGP4_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VGP1_CAL | Reserved | MT6331_PMIC_RG_VGP1_VOSEL | Reserved | MT6331_PMIC_RG_VGP1_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VIBR_CAL | Reserved | MT6331_PMIC_RG_VIBR_VOSEL | Reserved | MT6331_PMIC_RG_VIBR_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VSIM1_CAL | Reserved | MT6331_PMIC_RG_VSIM1_VOSEL | Reserved | MT6331_PMIC_RG_VSIM1_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VSIM2_CAL | Reserved | MT6331_PMIC_RG_VSIM2_VOSEL | Reserved | MT6331_PMIC_RG_VSIM2_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VFBB_TRIM | MT6331_PMIC_RG_VFBB_VOSEL | MT6331_PMIC_RG_VFBB_SLEW_CNTRL | MT6331_PMIC_RG_VFBB_RECOVERY | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_DIGLDO_DEGTD_SEL | MT6331_PMIC_RG_VIO28_OCFB_EN | MT6331_PMIC_RG_VCAM_AF_OCFB_EN | MT6331_PMIC_RG_VMC_OCFB_EN | MT6331_PMIC_RG_VMCH_OCFB_EN | MT6331_PMIC_RG_VEMC33_OCFB_EN | MT6331_PMIC_RG_VGP1_OCFB_EN | MT6331_PMIC_RG_VGP4_OCFB_EN | MT6331_PMIC_RG_VSIM1_OCFB_EN | MT6331_PMIC_RG_VSIM2_OCFB_EN | MT6331_PMIC_RG_VIBR_OCFB_EN | Reserved | ||||
| Type | W | W | W | W | W | W | W | W | W | W | W | - | ||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_QI_VIO28_OCFB_EN | MT6331_PMIC_QI_VCAM_AF_OCFB_EN | MT6331_PMIC_QI_VMC_OCFB_EN | MT6331_PMIC_QI_VMCH_OCFB_EN | MT6331_PMIC_QI_VEMC33_OCFB_EN | MT6331_PMIC_QI_VGP1_OCFB_EN | MT6331_PMIC_QI_VGP4_OCFB_EN | MT6331_PMIC_QI_VSIM1_OCFB_EN | MT6331_PMIC_QI_VSIM2_OCFB_EN | MT6331_PMIC_QI_VIBR_OCFB_EN | Reserved | ||||
| Type | - | R | R | R | R | R | R | R | R | R | R | - | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_VFBB_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_DIGLDO_RSV0 | MT6331_PMIC_RG_DIGLDO_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_VDIG18_VOSEL_CTRL | MT6331_PMIC_RG_VDIG18_VOSEL | MT6331_PMIC_RG_VDIG18_SLEEP_VOSEL | MT6331_PMIC_RG_VDIG18_SRCLKEN_SEL | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PA | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PDIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PTM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PWE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PPROG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PWE_SRC | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_PROG_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_RD_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_RD_TRIG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_RD_RDY_BYPASS | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_SKIP_OTP_OUT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_RD_SW | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_SW | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_RD_ACK | Reserved | MT6331_PMIC_RG_OTP_RD_BUSY | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_OTP_PA_SW | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_0_15 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_16_31 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_32_47 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_48_63 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_64_79 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_80_95 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_96_111 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_112_127 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_128_143 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_144_159 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_160_175 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_176_191 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_192_207 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_208_223 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_224_239 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_DOUT_240_255 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_0_15 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_16_31 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_32_47 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_48_63 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_64_79 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_80_95 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_96_111 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_112_127 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_128_143 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_144_159 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_160_175 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_176_191 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_192_207 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_208_223 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_224_239 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_OTP_VAL_240_255 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_STMP_MODE | MT6331_PMIC_MIX_XOSC32_STP_CALI | MT6331_PMIC_MIX_XOSC32_STP_LPDRST | MT6331_PMIC_MIX_XOSC32_STP_LPDEN | MT6331_PMIC_MIX_XOSC32_STP_LPDTB | MT6331_PMIC_MIX_XOSC32_STP_PWDB | MT6331_PMIC_MIX_XOSC32_STP_CPDTB | MT6331_PMIC_MIX_EOSC32_OPT | |||||||
| Type | - | W | W | W | W | R | W | R | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_MIX_EFUSE_XOSC32_ENB_OPT | MT6331_PMIC_MIX_RTC_XOSC32_ENB | MT6331_PMIC_MIX_STP_RTC_DDLO | MT6331_PMIC_MIX_STP_BBWAKEUP | MT6331_PMIC_MIX_EOSC32_VCT_EN | MT6331_PMIC_MIX_EOSC32_STP_RSV | MT6331_PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE | MT6331_PMIC_MIX_RTC_STP_XOSC32_ENB | MT6331_PMIC_MIX_PMU_STP_DDLO_VRTC_EN | MT6331_PMIC_MIX_PMU_STP_DDLO_VRTC | MT6331_PMIC_MIX_DCXO_STP_LVSH_EN | MT6331_PMIC_MIX_EOSC32_STP_CHOP_EN | |||
| Type | - | W | R | R | W | W | W | W | W | W | W | W | W | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUD_DAC_PWL_UP_VA32 | MT6331_PMIC_RG_AUD_DAC_PWR_UP_VA32 | MT6331_PMIC_RG_AUDDACRPWRUP_VAUDP32 | MT6331_PMIC_RG_AUDDACLPWRUP_VAUDP32 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDHPRSCDISABLE_VAUDP32 | MT6331_PMIC_RG_AUDHPLSCDISABLE_VAUDP32 | MT6331_PMIC_RG_AUDHSSCDISABLE_VAUDP32 | Reserved | MT6331_PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP32 | MT6331_PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP32 | MT6331_PMIC_RG_AUDHSMUXINPUTSEL_VAUDP32 | MT6331_PMIC_RG_AUDHPRPWRUP_VAUDP32 | MT6331_PMIC_RG_AUDHPLPWRUP_VAUDP32 | MT6331_PMIC_RG_AUDHSPWRUP_VAUDP32 | ||||||
| Type | W | W | W | - | W | W | W | W | W | W | ||||||
| Reset | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_LINENOISEENH_VAUDP32 | MT6331_PMIC_RG_HPOUT_SHORTVCM_VAUDP32 | MT6331_PMIC_RG_HPOUTPUTRESET0_VAUDP32 | MT6331_PMIC_RG_HPINPUTRESET0_VAUDP32 | MT6331_PMIC_RG_HPOUTPUTSTBENH_VAUDP32 | MT6331_PMIC_RG_HPINPUTSTBENH_VAUDP32 | MT6331_PMIC_RG_PRECHARGEBUF_EN_VAUDP32 | MT6331_PMIC_RG_AUDBGBON_VAUDP32 | MT6331_PMIC_RG_AUDHSSTARTUP_VAUDP32 | MT6331_PMIC_RG_AUDHPSTARTUP_VAUDP32 | MT6331_PMIC_RG_AUDHSBSCCURRENT_VAUDP32 | MT6331_PMIC_RG_AUDHPRBSCCURRENT_VAUDP32 | MT6331_PMIC_RG_AUDHPLBSCCURRENT_VAUDP32 | ||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_HSOUT_SHORTVCM_VAUDP32 | MT6331_PMIC_RG_HPOUTSTB_RSEL_VAUDP32 | MT6331_PMIC_RG_HSOUTPUTRESET0_VAUDP32 | MT6331_PMIC_RG_HSINPUTRESET0_VAUDP32 | MT6331_PMIC_RG_HSOUTPUTSTBENH_VAUDP32 | MT6331_PMIC_RG_HSINPUTSTBENH_VAUDP32 | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDHPRFINETRIM_VAUDP32 | MT6331_PMIC_RG_AUDHPLFINETRIM_VAUDP32 | MT6331_PMIC_RG_AUDHPTRIM_EN_VAUDP32 | MT6331_PMIC_RG_AUDHPRTRIM_VAUDP32 | MT6331_PMIC_RG_AUDHPLTRIM_VAUDP32 | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_ABIDEC_RSVD1_VA32 | MT6331_PMIC_RG_ABIDEC_RSVD0_VA32 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_ABIDEC_RSVD1_VAUDP32 | MT6331_PMIC_RG_ABIDEC_RSVD0_VAUDP32 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDHPSPKDET_OUTPUTMUXSEL_VAUDP32 | MT6331_PMIC_RG_AUDHPSPKDET_INPUTMUXSEL_VAUDP32 | MT6331_PMIC_RG_AUDLOSTARTUP_VAUDP32 | MT6331_PMIC_RG_AUDLORBSCCURRENT_VAUDP32 | MT6331_PMIC_RG_AUDLOLBSCCURRENT_VAUDP32 | MT6331_PMIC_RG_AUDLORSCDISABLE_VAUDP32 | MT6331_PMIC_RG_AUDLOLSCDISABLE_VAUDP32 | MT6331_PMIC_RG_AUDLORMUXINPUTSEL_VAUDP32 | MT6331_PMIC_RG_AUDLOLMUXINPUTSEL_VAUDP32 | MT6331_PMIC_RG_AUDLORPWRUP_VAUDP32 | MT6331_PMIC_RG_AUDLOLPWRUP_VAUDP32 | ||||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDTRIMBUF_INPUTMUXSEL_VAUDP32 | MT6331_PMIC_RG_AUDTRIMBUF_GAINSEL_VAUDP32 | MT6331_PMIC_RG_LOOUTSTB_RSEL_VAUDP32 | MT6331_PMIC_RG_LOOUT_SHORTVCM_VAUDP32 | Reserved | MT6331_PMIC_RG_LOOUTPUTRESET0_VAUDP32 | MT6331_PMIC_RG_LOINPUTRESET0_VAUDP32 | MT6331_PMIC_RG_LOOUTPUTSTBENH_VAUDP32 | MT6331_PMIC_RG_LOINPUTSTBENH_VAUDP32 | |||||||
| Type | W | W | W | W | - | W | W | W | W | |||||||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDHPSPKDET_EN_VAUDP32 | MT6331_PMIC_RG_AUDTRIMBUF_EN_VAUDP32 | MT6331_PMIC_RG_AUDLORFINETRIM_VAUDP32 | MT6331_PMIC_RG_AUDLOLFINETRIM_VAUDP32 | MT6331_PMIC_RG_AUDLOTRIM_EN_VAUDP32 | MT6331_PMIC_RG_AUDLORTRIM_VAUDP32 | MT6331_PMIC_RG_AUDLOLTRIM_VAUDP32 | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDIBIASPWRDN_VAUDP32 | MT6331_PMIC_RG_AUDBIASADJ_0_VAUDP32 | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDBIASADJ_1_VAUDP32 | Reserved | MT6331_PMIC_RG_SEL_DELAY_VCORE | MT6331_PMIC_RG_SEL_ENCODER_96K_VA32 | MT6331_PMIC_RG_SEL_DECODER_96K_VA32 | MT6331_PMIC_RG_RSTB_ENCODER_VA32 | MT6331_PMIC_RG_RSTB_DECODER_VA32 | |||||||||
| Type | W | - | W | W | W | W | W | |||||||||
| Reset | ? | - | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDPMU_RESERVED_VAUDP32 | MT6331_PMIC_RG_AUDPMU_RESERVED_VA18 | Reserved | MT6331_PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA18 | MT6331_PMIC_RG_LCLDO_ENC_PDDIS_EN_VA18 | MT6331_PMIC_RG_LCLDO_REMOTE_SENSE_VA18 | MT6331_PMIC_RG_LCLDO_PDDIS_EN_VA18 | MT6331_PMIC_RG_HCLDO_REMOTE_SENSE_VA18 | MT6331_PMIC_RG_HCLDO_PDDIS_EN_VA18 | |||||||
| Type | W | W | - | W | W | W | W | W | W | |||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_ENB_VN_TRACK_VA18 | MT6331_PMIC_RG_CHGBOOST_VBAT | MT6331_PMIC_RG_VTFCV_DISABLE_VA18 | MT6331_PMIC_RG_RSEL_VN18 | MT6331_PMIC_RG_DCDC_REMOTE_SENSE_VA18 | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDDCDC_RSVD_VBAT | MT6331_PMIC_RG_AUDDCDC_RSVD_VA18 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDGLB_PWRDN_VA32 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_NCP_REMOTE_SENSE_VA18 | MT6331_PMIC_RG_HCLDO_EN_VA18 | MT6331_PMIC_RG_LCLDO_EN_VA18 | MT6331_PMIC_RG_LCLDO_ENC_EN_VA18 | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUD_DIG0_RSV1 | MT6331_PMIC_RG_AUD_DIG0_RSV0 | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDSPAREPGA | MT6331_PMIC_RG_AUDPREAMPCAPVALEN | MT6331_PMIC_RG_AUDPREAMPAAFEN | MT6331_PMIC_RG_AUDPREAMPOPENH | MT6331_PMIC_RG_AUDPREAMPCHOPEN | MT6331_PMIC_RG_AUDPREAMPCH_2PGATEST | MT6331_PMIC_RG_AUDPREAMPCH_2DCRPECHARGE | MT6331_PMIC_RG_AUDPREAMPCH_2DCCEN | MT6331_PMIC_RG_AUDPREAMPCH_2ON | MT6331_PMIC_RG_AUDPREAMPCH0_1INPUTSEL | MT6331_PMIC_RG_AUDPREAMPCH0_1PGATEST | MT6331_PMIC_RG_AUDPREAMPCH0_1DCRPECHARGE | MT6331_PMIC_RG_AUDPREAMPCH0_1DCCEN | MT6331_PMIC_RG_AUDPREAMPCH0_1ON | ||
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDADCCH_4INPUTSEL | MT6331_PMIC_RG_AUDADCCH_4PWRUP | MT6331_PMIC_RG_AUDADCCH_3INPUTSEL | MT6331_PMIC_RG_AUDADCCH_3PWRUP | MT6331_PMIC_RG_AUDADCCH_2INPUTSEL | MT6331_PMIC_RG_AUDADCCH_2PWRUP | MT6331_PMIC_RG_AUDADCCH0_1SPARE | MT6331_PMIC_RG_AUDADCCH0_1INPUTSEL | MT6331_PMIC_RG_AUDADCCH0_1PWRUP | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDPREAMPLPEN | MT6331_PMIC_RG_AUDPREAMPIDDTEST | MT6331_PMIC_RG_AUDPREAMPCH_4PGATEST | MT6331_PMIC_RG_AUDPREAMPCH_4DCRPECHARGE | MT6331_PMIC_RG_AUDPREAMPCH_4DCCEN | MT6331_PMIC_RG_AUDPREAMPCH_4ON | MT6331_PMIC_RG_AUDPREAMPCH_3PGATEST | MT6331_PMIC_RG_AUDPREAMPCH_3DCRPECHARGE | MT6331_PMIC_RG_AUDPREAMPCH_3DCCEN | MT6331_PMIC_RG_AUDPREAMPCH_3ON | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDADCCLKSEL | MT6331_PMIC_RG_AUDADCCLKGENMODE | MT6331_PMIC_RG_AUDADCCLKSOURCE | MT6331_PMIC_RG_AUDADCFLASHLPEN | MT6331_PMIC_RG_AUDADCCLKRSTB | MT6331_PMIC_RG_AUDADC2NDSTAGELPEN | MT6331_PMIC_RG_AUDADC1STSTAGELPEN | MT6331_PMIC_RG_AUDADCFLASHIDDTEST | MT6331_PMIC_RG_AUDADCREFBUFIDDTEST | MT6331_PMIC_RG_AUDADC2NDSTAGEIDDTEST | MT6331_PMIC_RG_AUDADC1STSTAGEIDDTEST | |||||
| Type | W | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDULHALFBIAS | MT6331_PMIC_RG_AUDADCDAC0P25FS | MT6331_PMIC_RG_AUDADCDACTEST | MT6331_PMIC_RG_AUDADCNODEM | MT6331_PMIC_RG_AUDADCDACNRZ | MT6331_PMIC_RG_AUDADCDACIDDTEST | MT6331_PMIC_RG_AUDADCDACFBCURRENT | MT6331_PMIC_RG_AUDADCFFBYPASS | MT6331_PMIC_RG_AUDADCBYPASS | MT6331_PMIC_RG_AUDADCNOPATEST | MT6331_PMIC_RG_AUDADCFSRESET | MT6331_PMIC_RG_AUDADC3RDSTAGERESET | MT6331_PMIC_RG_AUDADC2NDSTAGERESET | MT6331_PMIC_RG_AUDADCWIDECM | |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDADCTESTDATA | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDRCTUNECH_2SEL | MT6331_PMIC_RG_AUDRCTUNECH_2 | Reserved | MT6331_PMIC_RG_AUDRCTUNECH0_1SEL | MT6331_PMIC_RG_AUDRCTUNECH0_1 | ||||||||||
| Type | - | W | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDRCTUNECH_4SEL | MT6331_PMIC_RG_AUDRCTUNECH_4 | Reserved | MT6331_PMIC_RG_AUDRCTUNECH_3SEL | MT6331_PMIC_RG_AUDRCTUNECH_3 | ||||||||||
| Type | - | W | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDSPAREVA18 | MT6331_PMIC_RG_AUDSPAREVA28 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_DMIC0HPCLKEN | MT6331_PMIC_RG_DMIC0MONEN | MT6331_PMIC_RG_AUDDIGMIC0BIAS | MT6331_PMIC_RG_AUDDIGMIC0NDUTY | MT6331_PMIC_RG_AUDDIGMIC0PDUTY | MT6331_PMIC_RG_AUDDIGMIC0EN | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDSPAREVMIC | Reserved | MT6331_PMIC_RG_DMIC1HPCLKEN | MT6331_PMIC_RG_DMIC1MONSEL | MT6331_PMIC_RG_DMIC1MONEN | MT6331_PMIC_RG_AUDDIGMIC1BIAS | MT6331_PMIC_RG_AUDDIGMIC1NDUTY | MT6331_PMIC_RG_AUDDIGMIC1PDUTY | MT6331_PMIC_RG_AUDDIGMIC1EN | |||||||
| Type | W | - | W | W | W | W | W | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDMICBIAS1LOWPEN | MT6331_PMIC_RG_AUDMICBIAS1DCSWNEN | MT6331_PMIC_RG_AUDMICBIAS1DCSWPEN | MT6331_PMIC_RG_AUDMICBIAS1VREF | MT6331_PMIC_RG_AUDPWDBMICBIAS1 | MT6331_PMIC_RG_AUDMICBIAS0LOWPEN | MT6331_PMIC_RG_AUDMICBIAS0DCSWNEN | MT6331_PMIC_RG_AUDMICBIAS0DCSWPEN | MT6331_PMIC_RG_AUDMICBIAS0VREF | MT6331_PMIC_RG_AUDPWDBMICBIAS0 | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDMICBIAS3LOWPEN | MT6331_PMIC_RG_AUDMICBIAS3DCSWNEN | MT6331_PMIC_RG_AUDMICBIAS3DCSWPEN | MT6331_PMIC_RG_AUDMICBIAS3VREF | MT6331_PMIC_RG_AUDPWDBMICBIAS3 | MT6331_PMIC_RG_AUDMICBIAS2LOWPEN | MT6331_PMIC_RG_AUDMICBIAS2DCSWNEN | MT6331_PMIC_RG_AUDMICBIAS2DCSWPEN | MT6331_PMIC_RG_AUDMICBIAS2VREF | MT6331_PMIC_RG_AUDPWDBMICBIAS2 | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDENCSPAREVA18 | MT6331_PMIC_RG_AUDENCSPAREVA28 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_AUDPREAMPCH_4GAIN | Reserved | MT6331_PMIC_RG_AUDPREAMPCH_3GAIN | Reserved | MT6331_PMIC_RG_AUDPREAMPCH_2GAIN | Reserved | MT6331_PMIC_RG_AUDPREAMPCH0_1GAIN | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_PLL_PDIV1_EN | MT6331_PMIC_RG_PLL_PDIV1 | MT6331_PMIC_RG_PLL_DIV1 | MT6331_PMIC_RG_PLLBS_RST | MT6331_PMIC_RG_PLL_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_RG_PLL_HPM_EN | MT6331_PMIC_RG_PLL_CKT_EN | MT6331_PMIC_RG_PLL_VCT_EN | MT6331_PMIC_RG_PLL_CKT_SEL | MT6331_PMIC_RG_PLL_IBSEL | MT6331_PMIC_RG_CKO_SEL | MT6331_PMIC_RG_PLL_BR | MT6331_PMIC_RG_PLL_BP | MT6331_PMIC_RG_PLL_BC | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_PLL_RSVA | MT6331_PMIC_RG_CKDRV_EN | MT6331_PMIC_RG_VCOBAND | MT6331_PMIC_RG_PLL_RLATCH_EN | MT6331_PMIC_RG_PLL_CDIV | |||||||||||
| Type | W | W | W | W | W | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDPMU_RSVD_VA18 | MT6331_PMIC_RG_NVREG_PULL0V_VAUDP32 | MT6331_PMIC_RG_NVREG_EN_VAUDP32 | MT6331_PMIC_RG_LCLDO_DEC_REMOTE_SENSE_VA18 | MT6331_PMIC_RG_LCLDO_DEC_PDDIS_EN_VA18 | MT6331_PMIC_RG_LCLDO_DEC_EN_VA32 | Reserved | |||||||||
| Type | W | W | W | W | W | W | - | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_LCLDO_ENC_RSVA | MT6331_PMIC_RG_LCLDO19_ADC_VOSEL | MT6331_PMIC_RG_LCLDO18_ENC_VOSEL | MT6331_PMIC_RG_LCLDO18_ENC_LPEN | MT6331_PMIC_RG_LCLDO18_ENC_REMOTE_SENSE | MT6331_PMIC_RG_LCLDO18_ENC_PDDIS_EN | MT6331_PMIC_RG_LCLDO18_ENC_EN | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_LCLDO19_ADCCH_4_LPEN | MT6331_PMIC_RG_LCLDO19_ADCCH_4_REMOTE_SENSE | MT6331_PMIC_RG_LCLDO19_ADCCH_4_PDDIS_EN | MT6331_PMIC_RG_LCLDO19_ADCCH_4_EN | MT6331_PMIC_RG_LCLDO19_ADCCH_3_LPEN | MT6331_PMIC_RG_LCLDO19_ADCCH_3_REMOTE_SENSE | MT6331_PMIC_RG_LCLDO19_ADCCH_3_PDDIS_EN | MT6331_PMIC_RG_LCLDO19_ADCCH_3_EN | MT6331_PMIC_RG_LCLDO19_ADCCH_2_LPEN | MT6331_PMIC_RG_LCLDO19_ADCCH_2_REMOTE_SENSE | MT6331_PMIC_RG_LCLDO19_ADCCH_2_PDDIS_EN | MT6331_PMIC_RG_LCLDO19_ADCCH_2_EN | MT6331_PMIC_RG_LCLDO19_ADCCH0_1_LPEN | MT6331_PMIC_RG_LCLDO19_ADCCH0_1_REMOTE_SENSE | MT6331_PMIC_RG_LCLDO19_ADCCH0_1_PDDIS_EN | MT6331_PMIC_RG_LCLDO19_ADCCH0_1_EN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH0 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH0 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH1 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH1 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH2 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH2 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH3 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH3 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH4 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH4 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH5 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH5 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH6 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH6 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH7 | MT6331_PMIC_AUXADC_ADC_OUT_CH7 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH8 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH8 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH9 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH9 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH10 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH10 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH11_15 | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH11_15 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_WAKEUP | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_WAKEUP | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_LBAT | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_LBAT | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH7_BY_GPS | MT6331_PMIC_AUXADC_ADC_OUT_CH7_BY_GPS | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH7_BY_MD | MT6331_PMIC_AUXADC_ADC_OUT_CH7_BY_MD | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH7_BY_AP | MT6331_PMIC_AUXADC_ADC_OUT_CH7_BY_AP | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_CH4_BY_MD | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_CH4_BY_MD | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_RDY_THR_HW | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_THR_HW | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_ADC_OUT_RAW | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_BUSY_IN_SPK_V | MT6331_PMIC_AUXADC_ADC_BUSY_IN_SPK_I | MT6331_PMIC_AUXADC_ADC_BUSY_IN_WAKEUP | MT6331_PMIC_AUXADC_ADC_BUSY_IN_LBAT | MT6331_PMIC_AUXADC_ADC_BUSY_IN | |||||||||||
| Type | R | R | R | R | R | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ADC_BUSY_IN_THR_MD | MT6331_PMIC_AUXADC_ADC_BUSY_IN_THR_HW | MT6331_PMIC_AUXADC_ADC_BUSY_IN_GPS | MT6331_PMIC_AUXADC_ADC_BUSY_IN_GPS_MD | MT6331_PMIC_AUXADC_ADC_BUSY_IN_GPS_AP | Reserved | ||||||||||
| Type | R | R | R | R | R | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_RQST_CH15 | MT6331_PMIC_AUXADC_RQST_CH14 | MT6331_PMIC_AUXADC_RQST_CH13 | MT6331_PMIC_AUXADC_RQST_CH12 | MT6331_PMIC_AUXADC_RQST_CH11 | MT6331_PMIC_AUXADC_RQST_CH10 | MT6331_PMIC_AUXADC_RQST_CH9 | MT6331_PMIC_AUXADC_RQST_CH8 | MT6331_PMIC_AUXADC_RQST_CH7 | MT6331_PMIC_AUXADC_RQST_CH6 | MT6331_PMIC_AUXADC_RQST_CH5 | MT6331_PMIC_AUXADC_RQST_CH4 | MT6331_PMIC_AUXADC_RQST_CH3 | MT6331_PMIC_AUXADC_RQST_CH2 | MT6331_PMIC_AUXADC_RQST_CH1 | MT6331_PMIC_AUXADC_RQST_CH0 |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_RQST_RSV1 | MT6331_PMIC_AUXADC_RQST_CH7_BY_GPS | MT6331_PMIC_AUXADC_RQST_CH7_BY_MD | Reserved | MT6331_PMIC_AUXADC_RQST_CH4_BY_MD | MT6331_PMIC_AUXADC_RQST_RSV0 | ||||||||||
| Type | W | W | W | - | W | W | ||||||||||
| Reset | ? | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_CK_AON | MT6331_PMIC_AUXADC_CK_AON_MD | MT6331_PMIC_AUXADC_CK_AON_GPS | MT6331_PMIC_AUXADC_SRCLKEN_CK_EN | MT6331_PMIC_AUXADC_ADC_RDY_WAKEUP_CLR | MT6331_PMIC_AUXADC_STRUP_CK_ON_ENB | Reserved | MT6331_PMIC_AUXADC_CK_ON_EXTD | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_SPL_NUM | MT6331_PMIC_AUXADC_AVG_NUM_LARGE | MT6331_PMIC_AUXADC_AVG_NUM_SMALL | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_AVG_NUM_SEL_SPK_V | MT6331_PMIC_AUXADC_AVG_NUM_SEL_SPK_I | MT6331_PMIC_AUXADC_AVG_NUM_SEL_WAKEUP | MT6331_PMIC_AUXADC_AVG_NUM_SEL_LBAT | MT6331_PMIC_AUXADC_AVG_NUM_SEL | |||||||||||
| Type | W | W | W | W | W | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_TRIM_CH7_SEL | MT6331_PMIC_AUXADC_TRIM_CH6_SEL | MT6331_PMIC_AUXADC_TRIM_CH5_SEL | MT6331_PMIC_AUXADC_TRIM_CH4_SEL | MT6331_PMIC_AUXADC_TRIM_CH3_SEL | MT6331_PMIC_AUXADC_TRIM_CH2_SEL | MT6331_PMIC_AUXADC_TRIM_CH1_SEL | MT6331_PMIC_AUXADC_TRIM_CH0_SEL | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_ADC_TRIM_COMP | MT6331_PMIC_RG_ADC_2S_COMP_ENB | Reserved | MT6331_PMIC_AUXADC_TRIM_CH11_SEL | MT6331_PMIC_AUXADC_TRIM_CH10_SEL | MT6331_PMIC_AUXADC_TRIM_CH9_SEL | MT6331_PMIC_AUXADC_TRIM_CH8_SEL | |||||||||
| Type | W | W | - | W | W | W | W | |||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_SW_GAIN_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_SW_OFFSET_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_OUT_SEL | Reserved | MT6331_PMIC_AUXADC_ADC_PWDB_SWCTRL | MT6331_PMIC_AUXADC_ADC_PWDB | MT6331_PMIC_AUXADC_START_SWCTRL | MT6331_PMIC_AUXADC_START_SW | MT6331_PMIC_AUXADC_BIT_SEL | MT6331_PMIC_AUXADC_TEST_MODE | MT6331_PMIC_AUXADC_DATA_REUSE_SEL | MT6331_PMIC_AUXADC_RNG_EN | |||||
| Type | - | W | - | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AD_AUXADC_COMP | Reserved | MT6331_PMIC_AUXADC_DA_DAC_SWCTRL | MT6331_PMIC_AUXADC_DA_DAC | ||||||||||||
| Type | R | - | W | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUXADC_CALI | MT6331_PMIC_RG_AUX_RSV | MT6331_PMIC_RG_VBUF_EN | MT6331_PMIC_RG_VBUF_BYP | MT6331_PMIC_RG_VBUF_CALEN | MT6331_PMIC_RG_VBUF_EXTEN | Reserved | |||||||||
| Type | W | W | W | W | W | W | - | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_SWCTRL_EN | MT6331_PMIC_AUXADC_CHSEL | MT6331_PMIC_AUXADC_DIG0_RSV0 | MT6331_PMIC_AUXADC_ADCIN_BATON_TED_EN | MT6331_PMIC_AUXADC_ADCIN_CS_EN | MT6331_PMIC_AUXADC_ADCIN_BATSNS_EN | MT6331_PMIC_AUXADC_ADCIN_CHRIN_EN | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_DAC_EXTD_EN | MT6331_PMIC_AUXADC_DAC_EXTD | MT6331_PMIC_AUXADC_ACCDET_AUTO_RQST_CLR | MT6331_PMIC_AUXADC_ACCDET_AUTO_SPL | MT6331_PMIC_AUXADC_DIG1_RSV2 | MT6331_PMIC_AUXADC_DIG0_RSV2 | ||||||||||
| Type | W | W | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_SPK_MODE | MT6331_PMIC_AUXADC_SPK_V_PTR_ENB | MT6331_PMIC_AUXADC_SPK_I_PTR_ENB | MT6331_PMIC_AUXADC_SPK_HW_SEL_ENB | MT6331_PMIC_AUXADC_SPK_SW_SEL | MT6331_PMIC_AUXADC_DIG1_RSV1 | MT6331_PMIC_AUXADC_SPK_BUFFER_LENGTH | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_DIG0_RSV1 | MT6331_PMIC_AUXADC_PMU_THR_PDN_STATUS | MT6331_PMIC_AUXADC_PMU_THR_PDN_SEL | MT6331_PMIC_AUXADC_PMU_THR_PDN_SW | MT6331_PMIC_AUXADC_AUTORPT_EN | MT6331_PMIC_AUXADC_AUTORPT_PRD | ||||||||||
| Type | W | R | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_LBAT_DEBT_MIN | MT6331_PMIC_AUXADC_LBAT_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_LBAT_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_LBAT_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_LBAT_MAX_IRQ_B | Reserved | MT6331_PMIC_AUXADC_LBAT_EN_MAX | MT6331_PMIC_AUXADC_LBAT_IRQ_EN_MAX | MT6331_PMIC_AUXADC_LBAT_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_LBAT_MIN_IRQ_B | Reserved | MT6331_PMIC_AUXADC_LBAT_EN_MIN | MT6331_PMIC_AUXADC_LBAT_IRQ_EN_MIN | MT6331_PMIC_AUXADC_LBAT_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_ACCDET_DIG0_RSV0 | MT6331_PMIC_AUXADC_ACCDET_DIG1_RSV0 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_THR_DEBT_MIN | MT6331_PMIC_AUXADC_THR_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_THR_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_THR_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_THR_MAX_IRQ_B | Reserved | MT6331_PMIC_AUXADC_THR_EN_MAX | MT6331_PMIC_AUXADC_THR_IRQ_EN_MAX | MT6331_PMIC_AUXADC_THR_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_AUXADC_THR_MIN_IRQ_B | Reserved | MT6331_PMIC_AUXADC_THR_EN_MIN | MT6331_PMIC_AUXADC_THR_IRQ_EN_MIN | MT6331_PMIC_AUXADC_THR_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_EFUSE_GAIN_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_EFUSE_OFFSET_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_EFUSE_GAIN_CH7_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_EFUSE_OFFSET_CH7_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_AUDACCDETRSV | Reserved | MT6331_PMIC_AUDACCDETAUXADCSWCTRL_SEL | MT6331_PMIC_AUDACCDETAUXADCSWCTRL | MT6331_PMIC_RG_AUDACCDETVIN1PULLLOW | MT6331_PMIC_RG_AUDACCDETTVDET | MT6331_PMIC_RG_AUDACCDETMICBIAS1PULLLOW | MT6331_PMIC_RG_AUDACCDETSWCTRL | MT6331_PMIC_RG_ACCDETSEL | MT6331_PMIC_RG_AUDACCDETANASWCTRLENB | MT6331_PMIC_RG_AUDACCDETVTHCAL | |||||
| Type | W | - | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ACCDET_EINT_SEQ_INIT | MT6331_PMIC_ACCDET_EINTDET_EN | MT6331_PMIC_ACCDET_NEGVDET_EN | MT6331_PMIC_ACCDET_SEQ_INIT | MT6331_PMIC_ACCDET_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ACCDET_EINT_PWM_IDLE | MT6331_PMIC_ACCDET_MBIAS_PWM_IDLE | MT6331_PMIC_ACCDET_VTH_PWM_IDLE | MT6331_PMIC_ACCDET_CMP_PWM_IDLE | MT6331_PMIC_ACCDET_EINT_PWM_EN | MT6331_PMIC_ACCDET_MBIAS_PWM_EN | MT6331_PMIC_ACCDET_VTH_PWM_EN | MT6331_PMIC_ACCDET_CMP_PWM_EN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_PWM_WIDTH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_PWM_THRESH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_FALL_DELAY | MT6331_PMIC_ACCDET_RISE_DELAY | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_DEBOUNCE0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_DEBOUNCE1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_DEBOUNCE2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_DEBOUNCE3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_DEBOUNCE4 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_IVAL_SEL | MT6331_PMIC_ACCDET_EINT_IVAL_SEL | Reserved | MT6331_PMIC_ACCDET_EINT_IVAL_MEM_IN | MT6331_PMIC_ACCDET_IVAL_MEM_IN | Reserved | MT6331_PMIC_ACCDET_EINT_IVAL_SAM_IN | MT6331_PMIC_ACCDET_IVAL_SAM_IN | Reserved | MT6331_PMIC_ACCDET_EINT_IVAL_CUR_IN | MT6331_PMIC_ACCDET_IVAL_CUR_IN | |||||
| Type | W | W | - | W | W | - | W | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_EINT_IRQ_POLARITY | Reserved | MT6331_PMIC_ACCDET_EINT_IRQ_CLR | MT6331_PMIC_ACCDET_NEGV_IRQ_CLR | MT6331_PMIC_ACCDET_IRQ_CLR | Reserved | MT6331_PMIC_ACCDET_EINT_IRQ | MT6331_PMIC_ACCDET_NEGV_IRQ | MT6331_PMIC_ACCDET_IRQ | |||||||
| Type | W | - | W | W | W | - | R | R | R | |||||||
| Reset | ? | - | ? | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_PWM_EN_SW | MT6331_PMIC_ACCDET_MBIAS_EN_SW | MT6331_PMIC_ACCDET_VTH_EN_SW | MT6331_PMIC_ACCDET_CMP_EN_SW | Reserved | MT6331_PMIC_ACCDET_IN_SW | MT6331_PMIC_ACCDET_PWM_SEL | MT6331_PMIC_ACCDET_TEST_MODE5 | MT6331_PMIC_ACCDET_TEST_MODE4 | MT6331_PMIC_ACCDET_TEST_MODE3 | MT6331_PMIC_ACCDET_TEST_MODE2 | MT6331_PMIC_ACCDET_TEST_MODE1 | MT6331_PMIC_ACCDET_TEST_MODE0 | |||
| Type | W | W | W | W | - | W | W | W | W | W | W | W | W | |||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_DA_AUDACCDETAUXADCSWCTRL | MT6331_PMIC_ACCDET_CMP_CLK | MT6331_PMIC_ACCDET_VTH_CLK | MT6331_PMIC_ACCDET_MBIAS_CLK | Reserved | MT6331_PMIC_ACCDET_STATE | MT6331_PMIC_ACCDET_MEM_IN | MT6331_PMIC_ACCDET_SAM_IN | MT6331_PMIC_ACCDET_CUR_IN | MT6331_PMIC_ACCDET_IN | ||||||
| Type | R | R | R | R | - | R | R | R | R | R | ||||||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ACCDET_EINT_PWM_WIDTH | Reserved | MT6331_PMIC_ACCDET_EINT_PWM_THRESH | Reserved | MT6331_PMIC_ACCDET_EINT_DEBOUNCE | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_EINT_PWM_RISE_DELAY | MT6331_PMIC_ACCDET_EINT_PWM_FALL_DELAY | MT6331_PMIC_ACCDET_NEGV_THRESH | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_EINTCMP_EN_SW | MT6331_PMIC_ACCDET_TEST_MODE6 | MT6331_PMIC_ACCDET_TEST_MODE7 | Reserved | MT6331_PMIC_ACCDET_AUXADC_CTRL_SW | MT6331_PMIC_ACCDET_TEST_MODE8 | MT6331_PMIC_ACCDET_TEST_MODE9 | Reserved | MT6331_PMIC_ACCDET_EINTCMPOUT_SW | MT6331_PMIC_ACCDET_TEST_MODE10 | MT6331_PMIC_ACCDET_TEST_MODE11 | Reserved | MT6331_PMIC_ACCDET_NVDETECTOUT_SW | MT6331_PMIC_ACCDET_TEST_MODE12 | MT6331_PMIC_ACCDET_TEST_MODE13 | Reserved |
| Type | W | W | W | - | W | W | W | - | W | W | W | - | W | W | W | - |
| Reset | ? | ? | ? | - | ? | ? | ? | - | ? | ? | ? | - | ? | ? | ? | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_RG_EINTCOMPVTH | MT6331_PMIC_RG_EINTCONFIGACCDET | MT6331_PMIC_RG_NVDETCMPEN | MT6331_PMIC_RG_NVDETVTH | MT6331_PMIC_RG_SWBUFMODSEL | MT6331_PMIC_RG_SWBUFSWEN | Reserved | |||||||||
| Type | W | W | W | W | W | W | - | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_NI_EINTCMPEN | MT6331_PMIC_EINTCMPOUT | MT6331_PMIC_NVDETECTOUT | Reserved | MT6331_PMIC_ACCDET_EINT_MEM_IN | MT6331_PMIC_ACCDET_EINT_SAM_IN | MT6331_PMIC_ACCDET_EINT_CUR_IN | Reserved | MT6331_PMIC_ACCDET_EINT_STATE | |||||||
| Type | R | R | R | - | R | R | R | - | R | |||||||
| Reset | ? | ? | ? | - | ? | ? | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_NEGV_CMP | MT6331_PMIC_ACCDET_NEGV_ADD | MT6331_PMIC_ACCDET_NEGV_MINU | MT6331_PMIC_ACCDET_NEGV_COUNT_END | Reserved | MT6331_PMIC_ACCDET_NEGV_COUNT_IN | ||||||||||
| Type | R | R | R | R | - | R | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_CUR_DEB | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6331_PMIC_ACCDET_EINT_CUR_DEB | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_RSV_CON0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6331_PMIC_ACCDET_RSV_CON1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_HWCID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SWCID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OSC_EN_AUTO_OFF | MT6332_PMIC_RG_SRCLKEN_IN_SYNC_EN | MT6332_PMIC_RG_LPDDR3_LP_HW_MODE | MT6332_PMIC_RG_OSC_SEL_HW_MODE | MT6332_PMIC_RG_SRCLKEN_IN2_HW_MODE | MT6332_PMIC_RG_SRCLKEN_IN1_HW_MODE | MT6332_PMIC_RG_LPDDR3_LP_EN | MT6332_PMIC_RG_OSC_SEL | MT6332_PMIC_RG_SRCLKEN_IN2_EN | MT6332_PMIC_RG_SRCLKEN_IN1_EN | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_REFTUNE_AP | MT6332_PMIC_RG_DS_AP | MT6332_PMIC_RG_EN_REF_AP | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_REFTUNE_DQ | MT6332_PMIC_RG_DS_DQ | MT6332_PMIC_RG_EN_REF_DQ | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_REFTUNE_CA | MT6332_PMIC_RG_DS_CA | MT6332_PMIC_RG_EN_REF_CA | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_TEST_OUT | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_MON_GRP_SEL | MT6332_PMIC_RG_MON_FLAG_SEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_TEST_DRIVER | MT6332_PMIC_RG_TEST_CLASSD | Reserved | MT6332_PMIC_RG_TEST_AUXADC | MT6332_PMIC_RG_NANDTREE_MODE | MT6332_PMIC_RG_EFUSE_MODE | MT6332_PMIC_RG_TEST_STRUP | MT6332_PMIC_RG_TEST_SPK | MT6332_PMIC_RG_TEST_SPK_PWM | ||||||
| Type | - | W | W | - | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | - | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_TESTMODE_SW | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_ANA_TESTMODE_EN | MT6332_PMIC_RG_ANA_TESTMODE_SEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPI_TDSEL | MT6332_PMIC_RG_PMU_TDSEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPI_RDSEL | MT6332_PMIC_RG_PMU_RDSEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SMT_PWM_IN | MT6332_PMIC_RG_SMT_RTC_32K1V8 | MT6332_PMIC_RG_SMT_DRV_VBUS | MT6332_PMIC_RG_SMT_SRCLKEN_IN2 | MT6332_PMIC_RG_SMT_SRCLKEN_IN1 | MT6332_PMIC_RG_SMT_WDTRSTB_IN | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SMT_SPI_MISO | MT6332_PMIC_RG_SMT_SPI_MOSI | MT6332_PMIC_RG_SMT_SPI_CSN | MT6332_PMIC_RG_SMT_SPI_CLK | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OCTL_RTC_32K1V8 | MT6332_PMIC_RG_OCTL_DRV_VBUS | MT6332_PMIC_RG_OCTL_SRCLKEN_IN2 | MT6332_PMIC_RG_OCTL_SRCLKEN_IN1 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OCTL_PWM_IN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OCTL_SPI_MISO | MT6332_PMIC_RG_OCTL_SPI_MOSI | MT6332_PMIC_RG_OCTL_SPI_CSN | MT6332_PMIC_RG_OCTL_SPI_CLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_EN_STATUS_VSBST | MT6332_PMIC_EN_STATUS_VPA | MT6332_PMIC_EN_STATUS_VRF2 | MT6332_PMIC_EN_STATUS_VRF1 | MT6332_PMIC_EN_STATUS_VDVFS2 | MT6332_PMIC_EN_STATUS_VDRAM | Reserved | MT6332_PMIC_EN_STATUS_VSRAM_DVFS2 | MT6332_PMIC_EN_STATUS_VUSB33 | MT6332_PMIC_EN_STATUS_VBIF28 | MT6332_PMIC_EN_STATUS_VAUXB32 | ||||
| Type | - | R | R | R | R | R | R | - | R | R | R | R | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_OC_STATUS_VSBST | MT6332_PMIC_OC_STATUS_VPA | MT6332_PMIC_OC_STATUS_VRF2 | MT6332_PMIC_OC_STATUS_VRF1 | MT6332_PMIC_OC_STATUS_VDVFS2 | MT6332_PMIC_OC_STATUS_VDRAM | MT6332_PMIC_NI_SPK_OC_DET_AB_L | MT6332_PMIC_NI_SPK_OC_DET_D_L | MT6332_PMIC_OC_STATUS_VSRAM_DVFS2 | MT6332_PMIC_OC_STATUS_VUSB33 | MT6332_PMIC_OC_STATUS_VBIF28 | MT6332_PMIC_OC_STATUS_VAUXB32 | |||
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_TOP_STATUS | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_TORCH_VCLAMP_SEL | MT6332_PMIC_RG_TORCH2_TRIM | MT6332_PMIC_RG_TORCH1_TRIM | MT6332_PMIC_RG_TORCH2_DRV_EN_RSV | MT6332_PMIC_RG_TORCH1_DRV_EN_RSV | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FLASH_VCLAMP_SEL | MT6332_PMIC_RG_FLASH2_TRIM | MT6332_PMIC_RG_FLASH1_TRIM | MT6332_PMIC_RG_FLASH2_DRV_EN | MT6332_PMIC_RG_FLASH1_DRV_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FLASH2_OPEN_VTH | MT6332_PMIC_RG_FLASH1_OPEN_VTH | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_BC12_BB_CTRL | MT6332_PMIC_RG_BC12_BIAS_EN | MT6332_PMIC_RG_BC12_CMP_EN | MT6332_PMIC_RG_BC12_IPD_EN | MT6332_PMIC_RG_BC12_IPU_EN | MT6332_PMIC_RG_BC12_VREF_VTH | MT6332_PMIC_RG_BC12_VSRC_EN | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CS_FEN | MT6332_PMIC_RG_CHR_FORCE_PWM | MT6332_PMIC_RG_CHGPREG_SEL | MT6332_PMIC_RG_CC_COMPRC | MT6332_PMIC_RG_CC_COMPCC | MT6332_PMIC_RG_BURSHTL | MT6332_PMIC_RG_BURSHTH | MT6332_PMIC_RG_ASW | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CV_COMPCC | MT6332_PMIC_RG_CS_VREFTRIM | MT6332_PMIC_RG_CS_TRIM | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_ITERM_SEL | MT6332_PMIC_RG_INOUT_CSREG_SEL | MT6332_PMIC_RG_ICS_LOOP | MT6332_PMIC_RG_HFDET_EN | MT6332_PMIC_RG_GDRI_MINOFF_DIS | MT6332_PMIC_RG_FREQ_HALF | MT6332_PMIC_RG_FORCE_NON_SST | MT6332_PMIC_RG_FORCE_NON_OV | MT6332_PMIC_RG_FORCE_NON_OC | MT6332_PMIC_RG_FLASH_DRV_EN | MT6332_PMIC_RG_CV_COMPRC | |||||
| Type | W | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_BOOST_CLK_SEL | MT6332_PMIC_RG_OSC_TRIM | MT6332_PMIC_RG_M3_REF_OE | MT6332_PMIC_RG_M3_REF_EN | MT6332_PMIC_RG_M3_FEN | MT6332_PMIC_RG_M3_FCTRL | MT6332_PMIC_RG_M3_CP_VG | MT6332_PMIC_RG_M3_CP_CKSEL | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SST_CURRENT | MT6332_PMIC_RG_RAMP_HALF | MT6332_PMIC_RG_BOOST_SLP_SEL | MT6332_PMIC_RG_BOOST_OCP_EN | MT6332_PMIC_RG_BOOST_OCPLVL | MT6332_PMIC_RG_BOOST_MAXDUTY_SEL | MT6332_PMIC_RG_BOOST_LVL | MT6332_PMIC_RG_BOOST_FPWM | MT6332_PMIC_RG_BOOST_CS_SLP_EN | MT6332_PMIC_RG_BOOST_CSA_SEL | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SWCHR_VRAMPCC | MT6332_PMIC_RG_SWCHR_TEST_EN | MT6332_PMIC_RG_SWCHR_DTEST_SEL | MT6332_PMIC_RG_SWCHR_CHRINSLP | MT6332_PMIC_RG_SWCHR_BOUNT | MT6332_PMIC_RG_SWCHR_ATEST_SEL | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_TRIM_IPRECC | MT6332_PMIC_RG_SYS_VREFTRIM | MT6332_PMIC_RG_SWCHR_VRAMPSLP | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_BOOST_FASTRAN | MT6332_PMIC_RG_BUCK_NOVLP_PD | MT6332_PMIC_RG_BUCK_NOVLP | MT6332_PMIC_RG_ZX_TRIM_BOOST | MT6332_PMIC_RG_ZX_TRIM | MT6332_PMIC_RG_ZXGM_TUNE | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SWCHR_REV | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_M3_CS_MODE | MT6332_PMIC_RG_M3_CS_TRIM | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SWCHR_M3_REV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SWCHR_PPTRIM | MT6332_PMIC_RG_SWCHR_TREV | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_FORCE_NON_OC2 | MT6332_PMIC_RG_SWCHR_ADTEST_SEL | MT6332_PMIC_RG_RAMP_CONSBIAS_EN | MT6332_PMIC_RG_HFDET_LVL | MT6332_PMIC_RG_BOOST_COMPRES | MT6332_PMIC_RG_BOOST_FASTRAN_EN | MT6332_PMIC_RG_BAT_OV_TRIM | MT6332_PMIC_RG_SWCHR_ANA_TEST_MODE | MT6332_PMIC_RG_CHR_EN | |||||||
| Type | W | W | W | W | W | W | W | W | W | |||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SWCHR_CURRENT_TUNE | MT6332_PMIC_RG_SWCHR_RCCOMP_TUNE | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_M3_FASTON_FEN | MT6332_PMIC_RG_RCOMP_SEL | MT6332_PMIC_RG_CBIAS_EXTR_SEL | MT6332_PMIC_RG_BUCK_VBTCHECK_PD | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_VDRV_RDY | MT6332_PMIC_RGS_CS_GT_22 | MT6332_PMIC_RGS_CS_GT_34 | MT6332_PMIC_RGS_BAT_GT_CV | MT6332_PMIC_RGS_BAT_GT_34 | MT6332_PMIC_RGS_BAT_GT_30 | MT6332_PMIC_RGS_BAT_GT_27 | MT6332_PMIC_RGS_BAT_GT_24 | MT6332_PMIC_RGS_BAT_GT_22 | MT6332_PMIC_RGS_VSYS_LT_VBAT_V0P1 | MT6332_PMIC_RGS_CHRIN_GT_V6P0 | MT6332_PMIC_RGS_SYS_CV_FLAG_CHR_CORE | MT6332_PMIC_RGS_M3_CP_RDY | MT6332_PMIC_RGS_ICH_OCH_FLAG_CHR_CORE | MT6332_PMIC_RGS_ICH_LOW_FLAG_CHR_CORE | MT6332_PMIC_RGS_BC12_CMP_OUT |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_CHR_STA_RSV_0 | MT6332_PMIC_RGS_SWCHR_BC12_CMP_OUT | MT6332_PMIC_RGS_BATON_HT | MT6332_PMIC_RGS_BAT_OV | MT6332_PMIC_RGS_FLASH2_VLED_GT_LV | MT6332_PMIC_RGS_FLASH2_VLED_GT_HV | MT6332_PMIC_RGS_FLASH1_VLED_GT_LV | MT6332_PMIC_RGS_FLASH1_VLED_GT_HV | MT6332_PMIC_RGS_OTG_CHR_GT_HV | MT6332_PMIC_RGS_OTG_CHR_GT_LV | MT6332_PMIC_RGS_CHR_GT_DPM | MT6332_PMIC_RGS_TEMP_GT_120 | MT6332_PMIC_RGS_TEMP_GT_150 | |||
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | |||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_CHR_STA_RSV_1 | MT6332_PMIC_RGS_UVP_USB | MT6332_PMIC_RGS_UVP_DCIN | MT6332_PMIC_RGS_USB_OC | MT6332_PMIC_RGS_OVP_USB | MT6332_PMIC_RGS_OVP_DCIN | MT6332_PMIC_RGS_DCIN_OC | |||||||||
| Type | R | R | R | R | R | R | R | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RGS_ICS_SETTING | Reserved | MT6332_PMIC_RGS_IPRECC | MT6332_PMIC_RGS_CS_SEL | |||||||||||
| Type | - | R | - | R | R | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_M3_RTUNE | MT6332_PMIC_RGS_SYSCV_FINE_SEL | MT6332_PMIC_RGS_SYSCV_COARSE_SEL | |||||||||||||
| Type | R | R | R | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RGS_DCIN_SW_EN | MT6332_PMIC_RGS_USB_SW_EN | MT6332_PMIC_RGS_AUTO_RECHARGE | MT6332_PMIC_RGS_CHARGE_COMPLETE_DET | MT6332_PMIC_RGS_CHRINBAT_ISNS | MT6332_PMIC_RGS_CSBAT_VSNS | MT6332_PMIC_RGS_SWCHR_REF_OSC_EN | MT6332_PMIC_RGS_PWM_EN | MT6332_PMIC_RGS_PRECC_EN | MT6332_PMIC_RGS_BOOST_MODE | MT6332_PMIC_RGS_BOOST_EN | MT6332_PMIC_RGS_M3_EN | MT6332_PMIC_RGS_CHR_PLUG_IN | MT6332_PMIC_RGS_CV_MODE | |
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | R | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_CHR_HV_DET | MT6332_PMIC_RGS_BOOST_PWRON_RDY | MT6332_PMIC_RGS_DRVCDT_SHORT | MT6332_PMIC_RGS_BOOST_THERMAL | MT6332_PMIC_RGS_CHR_M3_OC | MT6332_PMIC_RGS_BOOST_M3_OC | MT6332_PMIC_RGS_CHRIN_SHORT | MT6332_PMIC_RGS_VLED2_OPEN | MT6332_PMIC_RGS_VLED1_OPEN | MT6332_PMIC_RGS_VLED2_SHORT | MT6332_PMIC_RGS_VLED1_SHORT | MT6332_PMIC_RGS_FLASH2_EN_TIMEOUT | MT6332_PMIC_RGS_FLASH1_EN_TIMEOUT | MT6332_PMIC_RGS_THERMAL_REG_MODE | MT6332_PMIC_RGS_ADAPTIVE_CV_MODE | MT6332_PMIC_RGS_VIN_DPM_MODE |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_CHR_MODE | MT6332_PMIC_RGS_BC12_TIMEOUT | MT6332_PMIC_RGS_DCIN_OC_DB | MT6332_PMIC_RGS_USB_OC_DB | MT6332_PMIC_RGS_DC_IN_OV_DB | MT6332_PMIC_RGS_DC_IN_UV_DB | MT6332_PMIC_RGS_USB_IN_OV_DB | MT6332_PMIC_RGS_USB_IN_UV_DB | MT6332_PMIC_RGS_M3_EN_SWCHR | MT6332_PMIC_RGS_USBLDO_FORCE_STB | MT6332_PMIC_RGS_USBLDO_FORCE_EN | MT6332_PMIC_RGS_BATON_HT_DB | MT6332_PMIC_RGS_TEMP_GT_150_DB | MT6332_PMIC_RGS_TEMP_GT_120_DB | MT6332_PMIC_RGS_M3_RTUNE_EQ | MT6332_PMIC_RGS_CHRWDT_FLAG |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FORCE_CHR_PLUG_OUT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SWCHR_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_PWM_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_USBDL_MODE_B | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_THERMAL_CHECKER_SEL | Reserved | MT6332_PMIC_RG_TERM_TIMER | Reserved | MT6332_PMIC_RG_CHR_OVPFET_OC_AUTO_OFF | MT6332_PMIC_RG_CHR_OC_AUTO_OFF | MT6332_PMIC_RG_CH_COMPLETE_M3_OFF | MT6332_PMIC_RG_CH_COMPLETE_PWM_OFF | MT6332_PMIC_RG_CH_COMPLETE_DET_OFF | MT6332_PMIC_RG_CH_COMPLETE_AUTO_OFF | |||||
| Type | - | W | - | W | - | W | W | W | W | W | W | |||||
| Reset | - | ? | - | ? | - | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_M3_CS2_EN | MT6332_PMIC_RG_M3_CS1_EN | Reserved | MT6332_PMIC_RG_M3_OC_SEL | Reserved | MT6332_PMIC_RG_M3_OC2_LVL | MT6332_PMIC_RG_M3_FASTON | MT6332_PMIC_RG_M3_FASTON_SWEN | Reserved | MT6332_PMIC_RG_M3_RTUNE_FLOAD | Reserved | MT6332_PMIC_RG_M3_RTUNE_CKSEL | MT6332_PMIC_RG_M3_RSV | |||
| Type | W | W | - | W | - | W | W | W | - | W | - | W | W | |||
| Reset | ? | ? | - | ? | - | ? | ? | ? | - | ? | - | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_M3_RTUNE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SWCHR_DIG_RSV_2 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_FLOAD_CV_SEL | MT6332_PMIC_RG_FLOAD_ICH_SEL | MT6332_PMIC_RG_SYSCV_FINE_SEL_SWEN | MT6332_PMIC_RG_ICH_SEL_SWEN | MT6332_PMIC_RG_IPRECC_SWEN | Reserved | MT6332_PMIC_RG_CHRINBAT_ISNS | MT6332_PMIC_RG_CHRINBAT_ISNS_SWEN | MT6332_PMIC_RG_CSBAT_VSNS | MT6332_PMIC_RG_CSBAT_VSNS_SWEN | Reserved | MT6332_PMIC_RG_PRECC_EN | MT6332_PMIC_RG_PRECC_EN_SWEN | Reserved | MT6332_PMIC_RG_SCC_EN | MT6332_PMIC_RG_SCC_EN_SWEN |
| Type | W | W | W | W | W | - | W | W | W | W | - | W | W | - | W | W |
| Reset | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | - | ? | ? | - | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_IPRECC | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_ICH_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CV_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SYSCV_FINE_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CV_PP_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_THERMAL_TEMP_SEL | Reserved | MT6332_PMIC_RG_THERMAL_RG_VTH | Reserved | MT6332_PMIC_RG_CVVTH_SFSTR_STEP | Reserved | MT6332_PMIC_RG_ICH_SFSTR_STEP | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSYS_LT_VBAT_V0P1_DB_SEL | Reserved | MT6332_PMIC_RG_VSYS_LT_VBAT_V0P1_OFF_SEL | Reserved | MT6332_PMIC_RG_VSYS_LT_VBAT_V0P1_OFF_TOGGLE | Reserved | MT6332_PMIC_RG_PWM_BAT_CONFIG | Reserved | MT6332_PMIC_RG_PWM_OC_SEL | Reserved | MT6332_PMIC_RG_OC_SEL | ||||
| Type | - | W | - | W | - | W | - | W | - | W | - | W | ||||
| Reset | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FLED_EN | Reserved | MT6332_PMIC_RG_OTG_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_BOOST_DIG_RSV_0 | MT6332_PMIC_RG_OTG_OVPFET_OC_AUTO_OFF | MT6332_PMIC_RG_OTG_OVPFET_DCIN | Reserved | MT6332_PMIC_RG_OTG_M3_OC_AUTO_OFF | Reserved | MT6332_PMIC_RG_FLASH2_EN | Reserved | MT6332_PMIC_RG_FLASH1_EN | Reserved | MT6332_PMIC_RG_TORCH2_EN | MT6332_PMIC_RG_TORCH1_EN | MT6332_PMIC_RG_TORCH_CK_EN_HW | |||
| Type | W | W | W | - | W | - | W | - | W | - | W | W | W | |||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | - | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_BOOST_DIG_RSV_1 | Reserved | MT6332_PMIC_RG_TORCH2_ISET | Reserved | MT6332_PMIC_RG_TORCH1_ISET | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FLASH2_ISET_FLOAD | Reserved | MT6332_PMIC_RG_FLASH2_ISET | Reserved | MT6332_PMIC_RG_FLASH1_ISET_FLOAD | Reserved | MT6332_PMIC_RG_FLASH1_ISET | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FLASH2_EN_TIMEOUT_SEL | Reserved | MT6332_PMIC_RG_FLASH1_EN_TIMEOUT_SEL | Reserved | MT6332_PMIC_RG_FLASH2_ISET_STEP | Reserved | MT6332_PMIC_RG_FLASH1_ISET_STEP | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_TORCH1_DIM_FSEL | Reserved | MT6332_PMIC_RG_TORCH1_DIM_DUTY | Reserved | MT6332_PMIC_RG_TORCH1_PWM_EN | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_TORCH2_DIM_FSEL | Reserved | MT6332_PMIC_RG_TORCH2_DIM_DUTY | Reserved | MT6332_PMIC_RG_TORCH2_PWM_EN | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_BOOST_DIG_RSV_2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_BIF_X48_CK_PDN | MT6332_PMIC_RG_CBUS_CK_PDN | MT6332_PMIC_RG_VWLED_6M_CK_PDN | MT6332_PMIC_RG_VWLED_32K_CK_PDN | MT6332_PMIC_RG_AUXADC_32K_CK_PDN | MT6332_PMIC_RG_AUXADC_CK_PDN | MT6332_PMIC_RG_AUXADC_12M_CK_PDN | MT6332_PMIC_RG_AUXADC_1M_CK_PDN | MT6332_PMIC_RG_BIF_X1_CK_PDN | MT6332_PMIC_RG_BIF_X4_CK_PDN | MT6332_PMIC_RG_FGADC_DIG_CK_PDN | MT6332_PMIC_RG_FGADC_ANA_CK_PDN | MT6332_PMIC_RG_SPK_PWMIN_CK_PDN | MT6332_PMIC_RG_SPK_PWM_CK_PDN | MT6332_PMIC_RG_SPK_CK_PDN | MT6332_PMIC_RG_G_SMPS_PD_CK_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SWCHR_REF_OSC_EN | MT6332_PMIC_RG_ANA_TORCH_CK_PDN | MT6332_PMIC_RG_TORCH_0P25M_CK_PDN | MT6332_PMIC_RG_CHR_0P25M_CK_PDN | Reserved | MT6332_PMIC_RG_INTRP_CK_PDN | MT6332_PMIC_RG_PWMOC_6M_CK_PDN | MT6332_PMIC_RG_BUCK_12M_CK_PDN | MT6332_PMIC_RG_BUCK_1M_CK_PDN | MT6332_PMIC_RG_BUCK_32K_CK_PDN | MT6332_PMIC_RG_BUCK_ANA_CK_PDN | MT6332_PMIC_RG_LDOSTB_1M_CK_PDN | MT6332_PMIC_RG_FQMTR_CK_PDN | MT6332_PMIC_RG_VSBST_3M_CK_PDN | MT6332_PMIC_RG_VWLED_1M_CK_PDN | |
| Type | W | W | W | W | - | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_CHR_2P5M_CK_PDN | MT6332_PMIC_RG_CHR_AO_2P5M_CK_PDN | MT6332_PMIC_TOP_CKPDN_CON2_RSV | MT6332_PMIC_RG_VRF1_MODESET_3 | MT6332_PMIC_RG_VRF1_MODESET_2 | MT6332_PMIC_RG_VRF1_MODESET_1 | MT6332_PMIC_RG_VRF1_MODESET_0 | MT6332_PMIC_RG_CHR_TRIM_CK_PDN | MT6332_PMIC_RG_SPI_CK_PDN | MT6332_PMIC_RG_SMPS_CK_DIV_PDN | MT6332_PMIC_RG_BGR_TEST_CK_PDN | MT6332_PMIC_RG_EFUSE_CK_PDN | MT6332_PMIC_RG_FGADC_FT_CK_PDN | MT6332_PMIC_RG_STRUP_75K_CK_PDN | ||
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OSC_SEL_HW_SRC_SEL | MT6332_PMIC_RG_BIF_X4_CK_DIVSEL | Reserved | MT6332_PMIC_RG_AUXADC_CK_DIVSEL | Reserved | MT6332_PMIC_RG_BGR_TEST_CK_CKSEL | MT6332_PMIC_RG_STRUP_75K_CK_CKSEL | MT6332_PMIC_RG_FQMTR_CK_CKSEL | MT6332_PMIC_RG_FGADC_ANA_CK_CKSEL | |||||||
| Type | W | W | - | W | - | W | W | W | W | |||||||
| Reset | ? | ? | - | ? | - | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_PWMIN_CK_DSEL | MT6332_PMIC_RG_SPK_PWMIN_CK_FSEL | Reserved | MT6332_PMIC_RG_SPK_PWM_CK_DIVSEL | Reserved | MT6332_PMIC_RG_SPK_CK_DIVSEL | ||||||||||
| Type | W | W | - | W | - | W | ||||||||||
| Reset | ? | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_CK_DSEL | MT6332_PMIC_RG_CHR_2P5M_CK_PDN_HWEN | MT6332_PMIC_RG_ANA_TORCH_CK_PDN_HWEN | MT6332_PMIC_RG_TORCH_0P25M_CK_PDN_HWEN | MT6332_PMIC_RG_CHR_0P25M_CK_PDN_HWEN | MT6332_PMIC_RG_EFUSE_CK_PDN_HWEN | MT6332_PMIC_RG_BUCK_1M_CK_PDN_HWEN | MT6332_PMIC_RG_AUXADC_CK_PDN_HWEN | MT6332_PMIC_RG_AUXADC_12M_CK_PDN_HWEN | MT6332_PMIC_RG_G_SMPS_PD_CK_PDN_HWEN | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_BUCK_ANA_AUTO_OFF_DIS | MT6332_PMIC_TOP_CKTST_CON0_RSV | MT6332_PMIC_RG_CHR_PWM_CK_TST_DIS | MT6332_PMIC_RG_FG_CK_TST_DIS | MT6332_PMIC_RG_SPK_CK_TST_DIS | MT6332_PMIC_RG_SMPS_CK_TST_DIS | MT6332_PMIC_RG_PMU75K_CK_TST_DIS | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_TOP_CKTST_CON1_RSV | MT6332_PMIC_RG_FGADC_ANA_CK_TSTSEL | MT6332_PMIC_RG_STRUP_75K_CK_TSTSEL | MT6332_PMIC_RG_SMPS_CK_TSTSEL | MT6332_PMIC_RG_PMU75K_CK_TSTSEL | MT6332_PMIC_RG_FQMTR_CK_TSTSEL | MT6332_PMIC_RG_CHR_PWM_CK_TSTSEL | MT6332_PMIC_RG_FG_CK_TSTSEL | MT6332_PMIC_RG_SPK_CK_TSTSEL | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TOP_RST_CON_RSV | MT6332_PMIC_RG_AUXADC_REG_RST | MT6332_PMIC_RG_VWLED_RST | MT6332_PMIC_RG_SPK_RST | MT6332_PMIC_RG_FQMTR_RST | MT6332_PMIC_RG_FGADC_RST | MT6332_PMIC_RG_CHR_RST | MT6332_PMIC_RG_CBUS_RST | MT6332_PMIC_RG_BIF_RST | MT6332_PMIC_RG_AUXADC_RST | MT6332_PMIC_RG_EFUSE_MAN_RST | |||||
| Type | W | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_WDTRSTB_FB_EN | MT6332_PMIC_WDTRSTB_STATUS_CLR | MT6332_PMIC_WDTRSTB_STATUS | MT6332_PMIC_RG_WDTRSTB_MODE | MT6332_PMIC_RG_WDTRSTB_EN | ||||||||||
| Type | - | W | W | R | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_EN_FLASH_VLED1_OPEN | MT6332_PMIC_RG_INT_EN_FLASH_VLED1_SHORT | MT6332_PMIC_RG_INT_EN_FLASH_EN_TIMEOUT | MT6332_PMIC_RG_INT_EN_CHRWDT_FLAG | MT6332_PMIC_RG_INT_EN_CHR_PLUG_IN_FLASH | MT6332_PMIC_RG_INT_EN_OTG_DRVCDT_SHORT | MT6332_PMIC_RG_INT_EN_OTG_CHRIN_SHORT | MT6332_PMIC_RG_INT_EN_OTG_THERMAL | MT6332_PMIC_RG_INT_EN_CHR_OC | MT6332_PMIC_RG_INT_EN_OTG_OC | MT6332_PMIC_RG_INT_EN_THERMAL_REG_OUT | MT6332_PMIC_RG_INT_EN_THERMAL_REG_IN | MT6332_PMIC_RG_INT_EN_THERMAL_SD | MT6332_PMIC_RG_INT_EN_CHR_COMPLETE | |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_EN_FLASH_VLED2_OPEN | MT6332_PMIC_RG_INT_EN_FLASH_VLED2_SHORT | MT6332_PMIC_RG_INT_EN_BC11_TIMEOUT | MT6332_PMIC_RG_INT_EN_CHR_PLUG_OUT | MT6332_PMIC_RG_INT_EN_CHR_PLUG_IN | MT6332_PMIC_RG_INT_EN_VBATON_UNDET | MT6332_PMIC_RG_INT_EN_BVALID_DET | MT6332_PMIC_RG_INT_EN_OV | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_EN_M3_L | MT6332_PMIC_RG_INT_EN_M3_H | MT6332_PMIC_RG_INT_EN_FG_CUR_L | MT6332_PMIC_RG_INT_EN_FG_CUR_H | MT6332_PMIC_RG_INT_EN_VWLED_OC | MT6332_PMIC_RG_INT_EN_CBUS | MT6332_PMIC_RG_INT_EN_BIF | MT6332_PMIC_RG_INT_EN_SPKL_AB | MT6332_PMIC_RG_INT_EN_SPKL_D | MT6332_PMIC_RG_INT_EN_FG_BAT_L | MT6332_PMIC_RG_INT_EN_FG_BAT_H | MT6332_PMIC_RG_INT_EN_BAT_L | MT6332_PMIC_RG_INT_EN_BAT_H | MT6332_PMIC_RG_INT_EN_THR_L | MT6332_PMIC_RG_INT_EN_THR_H |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_EN_LDO_OC | MT6332_PMIC_RG_INT_EN_VSBST_OC | MT6332_PMIC_RG_INT_EN_VPA_OC | MT6332_PMIC_RG_INT_EN_VRF2_OC | MT6332_PMIC_RG_INT_EN_VRF1_OC | MT6332_PMIC_RG_INT_EN_VDVFS2_OC | MT6332_PMIC_RG_INT_EN_VDRAM_OC | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CHRWDT_WR | Reserved | MT6332_PMIC_RG_CHRWDT_TD | MT6332_PMIC_RG_CHRWDT_EN | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_CHRWDT_FLAG | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_STATUS_FLASH_VLED1_OPEN | MT6332_PMIC_RG_INT_STATUS_FLASH_VLED1_SHORT | MT6332_PMIC_RG_INT_STATUS_FLASH_EN_TIMEOUT | MT6332_PMIC_RG_INT_STATUS_CHRWDT_FLAG | MT6332_PMIC_RG_INT_STATUS_CHR_PLUG_IN_FLASH | MT6332_PMIC_RG_INT_STATUS_OTG_DRVCDT_SHORT | MT6332_PMIC_RG_INT_STATUS_OTG_CHRIN_SHORT | MT6332_PMIC_RG_INT_STATUS_OTG_THERMAL | MT6332_PMIC_RG_INT_STATUS_CHR_OC | MT6332_PMIC_RG_INT_STATUS_OTG_OC | MT6332_PMIC_RG_INT_STATUS_THERMAL_REG_OUT | MT6332_PMIC_RG_INT_STATUS_THERMAL_REG_IN | MT6332_PMIC_RG_INT_STATUS_THERMAL_SD | MT6332_PMIC_RG_INT_STATUS_CHR_COMPLETE | |
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | R | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_STATUS_FLASH_VLED2_OPEN | MT6332_PMIC_RG_INT_STATUS_FLASH_VLED2_SHORT | MT6332_PMIC_RG_INT_STATUS_BC11_TIMEOUT | MT6332_PMIC_RG_INT_STATUS_CHR_PLUG_OUT | MT6332_PMIC_RG_INT_STATUS_CHR_PLUG_IN | MT6332_PMIC_RG_INT_STATUS_VBATON_UNDET | MT6332_PMIC_RG_INT_STATUS_BVALID_DET | MT6332_PMIC_RG_INT_STATUS_OV | |||||||
| Type | - | R | R | R | R | R | R | R | R | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_STATUS_M3_L | MT6332_PMIC_RG_INT_STATUS_M3_H | MT6332_PMIC_RG_INT_STATUS_FG_CUR_L | MT6332_PMIC_RG_INT_STATUS_FG_CUR_H | MT6332_PMIC_RG_INT_STATUS_VWLED_OC | MT6332_PMIC_RG_INT_STATUS_CBUS | MT6332_PMIC_RG_INT_STATUS_BIF | MT6332_PMIC_RG_INT_STATUS_SPKL_AB | MT6332_PMIC_RG_INT_STATUS_SPKL_D | MT6332_PMIC_RG_INT_STATUS_FG_BAT_L | MT6332_PMIC_RG_INT_STATUS_FG_BAT_H | MT6332_PMIC_RG_INT_STATUS_BAT_L | MT6332_PMIC_RG_INT_STATUS_BAT_H | MT6332_PMIC_RG_INT_STATUS_THR_L | MT6332_PMIC_RG_INT_STATUS_THR_H |
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_INT_STATUS_LDO_OC | MT6332_PMIC_RG_INT_STATUS_VSBST_OC | MT6332_PMIC_RG_INT_STATUS_VPA_OC | MT6332_PMIC_RG_INT_STATUS_VRF2_OC | MT6332_PMIC_RG_INT_STATUS_VRF1_OC | MT6332_PMIC_RG_INT_STATUS_VDVFS2_OC | MT6332_PMIC_RG_INT_STATUS_VDRAM_OC | ||||||||
| Type | - | R | R | R | R | R | R | R | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_OC_GEAR_BVALID_DET | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_OC_GEAR_VBATON_UNDET | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_OC_GEAR_LDO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_POLARITY_VBATON_UNDET | MT6332_PMIC_POLARITY_BVALID_DET | MT6332_PMIC_INT_POLARITY | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPI_CON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_DIO_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_DEW_READ_TEST | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_DEW_WRITE_TEST | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CRC_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CRC_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CRC_VAL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_DBG_MON_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_KEY_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_IV_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_RDY | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_MODE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_CIPHER_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEW_RDDMY_NO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RESERVED_INT_STA | MT6332_PMIC_CPU_INT_STA | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_0 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_1 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_2 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_3 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_4 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_5 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_6 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_7 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_8 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_9 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_10 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_11 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_12 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_13 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_COMMAND_14 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_TRASFER_NUM | Reserved | MT6332_PMIC_BIF_COMMAND_TYPE | Reserved | MT6332_PMIC_BIF_TIMEOUT_SET | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_STOP_SET | Reserved | MT6332_PMIC_BIF_LOGIC_1_SET | MT6332_PMIC_BIF_LOGIC_0_SET | ||||||||||||
| Type | W | - | W | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_READ_EXPECT_NUM | Reserved | MT6332_PMIC_BIF_DEBOUNCE_EN | MT6332_PMIC_BIF_DEBOUNCE_THD | MT6332_PMIC_BIF_DEBOUNCE_WND | |||||||||||
| Type | W | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_TRASACT_TRIGGER | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_RESPONSE | Reserved | MT6332_PMIC_BIF_DATA_NUM | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_0 | Reserved | MT6332_PMIC_BIF_ACK_0 | MT6332_PMIC_BIF_DATA_0 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_1 | Reserved | MT6332_PMIC_BIF_ACK_1 | MT6332_PMIC_BIF_DATA_1 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_2 | Reserved | MT6332_PMIC_BIF_ACK_2 | MT6332_PMIC_BIF_DATA_2 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_3 | Reserved | MT6332_PMIC_BIF_ACK_3 | MT6332_PMIC_BIF_DATA_3 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_4 | Reserved | MT6332_PMIC_BIF_ACK_4 | MT6332_PMIC_BIF_DATA_4 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_5 | Reserved | MT6332_PMIC_BIF_ACK_5 | MT6332_PMIC_BIF_DATA_5 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_6 | Reserved | MT6332_PMIC_BIF_ACK_6 | MT6332_PMIC_BIF_DATA_6 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_7 | Reserved | MT6332_PMIC_BIF_ACK_7 | MT6332_PMIC_BIF_DATA_7 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_8 | Reserved | MT6332_PMIC_BIF_ACK_8 | MT6332_PMIC_BIF_DATA_8 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_ERROR_9 | Reserved | MT6332_PMIC_BIF_ACK_9 | MT6332_PMIC_BIF_DATA_9 | ||||||||||||
| Type | R | - | R | R | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_TX_EN_SW | MT6332_PMIC_BIF_RX_EN_SW | MT6332_PMIC_BIF_TX_DATA_SW | MT6332_PMIC_BIF_RX_DATA_SW | MT6332_PMIC_BIF_BAT_LOST_SW | Reserved | MT6332_PMIC_BIF_TEST_MODE8 | MT6332_PMIC_BIF_TEST_MODE7 | MT6332_PMIC_BIF_TEST_MODE6 | MT6332_PMIC_BIF_TEST_MODE5 | MT6332_PMIC_BIF_TEST_MODE4 | MT6332_PMIC_BIF_TEST_MODE3 | MT6332_PMIC_BIF_TEST_MODE2 | MT6332_PMIC_BIF_TEST_MODE1 | MT6332_PMIC_BIF_TEST_MODE0 | |
| Type | W | W | W | W | W | - | W | W | W | W | W | W | W | W | W | |
| Reset | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_BUS_STATUS | MT6332_PMIC_BIF_TOTAL_VALID | MT6332_PMIC_BIF_BAT_LOST | MT6332_PMIC_BIF_TIMEOUT | MT6332_PMIC_BIF_IRQ | Reserved | MT6332_PMIC_BIF_IRQ_CLR | MT6332_PMIC_BIF_BACK_NORMAL | ||||||||
| Type | R | R | R | R | R | - | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_POWER_UP | Reserved | MT6332_PMIC_BIF_POWER_UP_COUNT | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_BIF_TX_EN | MT6332_PMIC_QI_BIF_TX_DATA | MT6332_PMIC_QI_BIF_RX_EN | MT6332_PMIC_QI_BIF_RX_DATA | MT6332_PMIC_BIF_TX_STATE | MT6332_PMIC_BIF_FLOW_CTL_STATE | MT6332_PMIC_BIF_RX_STATE | MT6332_PMIC_BIF_RX_ERROR_LOWPHASE | MT6332_PMIC_BIF_RX_ERROR_INSUFF | MT6332_PMIC_BIF_RX_ERROR_UNKNOW | Reserved | |||||
| Type | R | R | R | R | R | R | R | R | R | R | - | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_TX_DATA_FIANL | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_RX_DATA_SAMPLING | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_BIF_RX_DATA_RECOVERY | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_HW_VTH1 | MT6332_PMIC_RG_HW_VTH2 | MT6332_PMIC_RG_HW_VTH_CTRL | MT6332_PMIC_RG_BATON_HT_TRIM | Reserved | MT6332_PMIC_QI_BATON_HT | MT6332_PMIC_QI_BATON_HT_EN | MT6332_PMIC_RG_BATON_HT_EN_DLY_TIME | MT6332_PMIC_RG_VBIF28_AUXADC_EN | MT6332_PMIC_RG_BATON_TDET_EN | MT6332_PMIC_RG_BATON_EN | MT6332_PMIC_RG_BATON_HT_EN | ||||
| Type | W | W | W | W | - | R | R | W | W | W | W | W | ||||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_RSV_E2 | MT6332_PMIC_BIF_TIMEOUT_SET_E2 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BIF_RX_DEG_EN | Reserved | MT6332_PMIC_BIF_RX_DEG_WND | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_BC12_CHRDET_RST | Reserved | MT6332_PMIC_RG_BC12_RST | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_M3_RSV_1 | MT6332_PMIC_RG_M3_OC_DB_SEL | Reserved | MT6332_PMIC_RG_OVPFET_SW_DB_OFF | Reserved | MT6332_PMIC_RG_OVPFET_SW_TARGET | Reserved | MT6332_PMIC_RG_OVPFET_SW_NOWAIT | Reserved | MT6332_PMIC_RG_OVPFET_PRI_CHG | Reserved | MT6332_PMIC_RG_OVPFET_SW_DIS | Reserved | MT6332_PMIC_RG_OVPFET_SW_FAST | ||
| Type | W | W | - | W | - | W | - | W | - | W | - | W | - | W | ||
| Reset | ? | ? | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OVPFET_2P5M_DB_TARGET | Reserved | MT6332_PMIC_RG_OVPFET_DB_TARGET | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SWCHR_DIG_RSV_0 | Reserved | MT6332_PMIC_RG_CHRIN_ISNS_MODE | Reserved | MT6332_PMIC_RG_CC_FLAG_VTH | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_PWM_VOLTAGE_CONFIG | Reserved | MT6332_PMIC_RG_PWM_CURRENT_CONFIG | Reserved | MT6332_PMIC_RG_PWM_CONFIG_UPDATE_EN | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SWCHR_DIG_RSV_1 | Reserved | MT6332_PMIC_RG_VDRV_RDIVSEL | Reserved | MT6332_PMIC_RG_VDRV_RDIVSEL_SWEN | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_FORCE_DCIN_PP | Reserved | MT6332_PMIC_RG_THERMAL_REG_MODE_OFF | MT6332_PMIC_RG_ADAPTIVE_CV_MODE_OFF | MT6332_PMIC_RG_VIN_DPM_MODE_OFF | Reserved | MT6332_PMIC_RG_AUXADC_DCIN_DET | Reserved | MT6332_PMIC_RG_AUXADC_USB_DET | ||||||
| Type | - | W | - | W | W | W | - | W | - | W | ||||||
| Reset | - | ? | - | ? | ? | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_M3_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_PRECC_M3_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SWCHR_DIG_RSV_3 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RGS_CHR_STA_RSV_2 | MT6332_PMIC_RGS_VALID_CHARGER | MT6332_PMIC_RGS_M3_SHORT | MT6332_PMIC_RGS_RSV1_DB | MT6332_PMIC_RGS_RSV0_DB | MT6332_PMIC_RGS_CS_GT_30 | MT6332_PMIC_RGS_VSYS_LT_VBAT_V0P1_M3_ON | MT6332_PMIC_RGS_BOOST_OC | MT6332_PMIC_RGS_CHR_OC | MT6332_PMIC_RGS_DCIN_OC_BOOST | MT6332_PMIC_RGS_USB_OC_BOOST | MT6332_PMIC_RGS_DCIN_OC_CHR | MT6332_PMIC_RGS_USB_OC_CHR | |||
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | |||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SMPS_TESTMODE_B | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VSLEEP_SRC1 | Reserved | MT6332_PMIC_VSLEEP_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_R2R_SRC1 | Reserved | MT6332_PMIC_R2R_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SRCLKEN_DLY_SRC1 | Reserved | MT6332_PMIC_BUCK_OSC_SEL_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_BUCK_CON5_RSV0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDRAM_DIG_MON | MT6332_PMIC_QI_VDVFS2_DIG_MON | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF1_DIG_MON | MT6332_PMIC_QI_VRF2_DIG_MON | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VSBST_DIG_MON | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_OC_THD | Reserved | MT6332_PMIC_VDRAM_OC_WND | MT6332_PMIC_VDRAM_OC_DEG_EN | MT6332_PMIC_VDRAM_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_OC_THD | Reserved | MT6332_PMIC_VDVFS2_OC_WND | MT6332_PMIC_VDVFS2_OC_DEG_EN | MT6332_PMIC_VDVFS2_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_OC_THD | Reserved | MT6332_PMIC_VRF1_OC_WND | MT6332_PMIC_VRF1_OC_DEG_EN | MT6332_PMIC_VRF1_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_OC_THD | Reserved | MT6332_PMIC_VRF2_OC_WND | MT6332_PMIC_VRF2_OC_DEG_EN | MT6332_PMIC_VRF2_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_OC_THD | Reserved | MT6332_PMIC_VPA_OC_WND | MT6332_PMIC_VPA_OC_DEG_EN | MT6332_PMIC_VPA_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_OC_THD | Reserved | MT6332_PMIC_VSBST_OC_WND | MT6332_PMIC_VSBST_OC_DEG_EN | MT6332_PMIC_VSBST_OC_EN | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_EN_OC_SDN_SEL | MT6332_PMIC_VPA_EN_OC_SDN_SEL | MT6332_PMIC_VRF2_EN_OC_SDN_SEL | MT6332_PMIC_VRF1_EN_OC_SDN_SEL | MT6332_PMIC_VDVFS2_EN_OC_SDN_SEL | MT6332_PMIC_VDRAM_EN_OC_SDN_SEL | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_OC_FLAG_CLR_SEL | MT6332_PMIC_VPA_OC_FLAG_CLR_SEL | MT6332_PMIC_VRF2_OC_FLAG_CLR_SEL | MT6332_PMIC_VRF1_OC_FLAG_CLR_SEL | MT6332_PMIC_VDVFS2_OC_FLAG_CLR_SEL | MT6332_PMIC_VDRAM_OC_FLAG_CLR_SEL | Reserved | MT6332_PMIC_VSBST_OC_FLAG_CLR | MT6332_PMIC_VPA_OC_FLAG_CLR | MT6332_PMIC_VRF2_OC_FLAG_CLR | MT6332_PMIC_VRF1_OC_FLAG_CLR | MT6332_PMIC_VDVFS2_OC_FLAG_CLR | MT6332_PMIC_VDRAM_OC_FLAG_CLR | ||
| Type | - | W | W | W | W | W | W | - | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_OC_INT_EN | MT6332_PMIC_VPA_OC_INT_EN | MT6332_PMIC_VRF2_OC_INT_EN | MT6332_PMIC_VRF1_OC_INT_EN | MT6332_PMIC_VDVFS2_OC_INT_EN | MT6332_PMIC_VDRAM_OC_INT_EN | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_OC_STATUS | MT6332_PMIC_VPA_OC_STATUS | MT6332_PMIC_VRF2_OC_STATUS | MT6332_PMIC_VRF1_OC_STATUS | MT6332_PMIC_VDVFS2_OC_STATUS | MT6332_PMIC_VDRAM_OC_STATUS | |||||||||
| Type | - | R | R | R | R | R | R | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_TRACK_ON_CTRL | MT6332_PMIC_VSRAM_DVFS2_TRACK_ON_CTRL | MT6332_PMIC_VSRAM_DVFS2_TRACK_SLEEP_CTRL | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_OFFSET | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_DELTA | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_ON_HB | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_ON_LB | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_SLEEP_LB | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VLCM_TRIMH | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VLCM_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VWLED_TRIMH | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VWLED_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VSRAM_DVFS2_TRIMH | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VDRAM_ZX_OS | Reserved | MT6332_PMIC_RG_VDRAM_CSL | MT6332_PMIC_RG_VDRAM_CSR | MT6332_PMIC_RG_VDRAM_CC | Reserved | MT6332_PMIC_RG_VDRAM_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_NDIS_EN | MT6332_PMIC_RG_VDRAM_MODESET | Reserved | MT6332_PMIC_RG_VDRAM_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDRAM_VSLEEP | Reserved | MT6332_PMIC_RG_VDRAM_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_BURST_CTRL | MT6332_PMIC_VDRAM_DLC_CTRL | MT6332_PMIC_VDRAM_VOSEL_CTRL | MT6332_PMIC_VDRAM_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_BURST_SEL | Reserved | MT6332_PMIC_VDRAM_DLC_SEL | Reserved | MT6332_PMIC_VDRAM_VOSEL_SEL | Reserved | MT6332_PMIC_VDRAM_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VDRAM_OC_STATUS | Reserved | MT6332_PMIC_QI_VDRAM_EN | MT6332_PMIC_QI_VDRAM_STB | Reserved | MT6332_PMIC_VDRAM_STBTD | Reserved | MT6332_PMIC_VDRAM_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VDRAM_SFCHG_REN | MT6332_PMIC_VDRAM_SFCHG_RRATE | MT6332_PMIC_VDRAM_SFCHG_FEN | MT6332_PMIC_VDRAM_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDRAM_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VDRAM_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDRAM_BURST | Reserved | MT6332_PMIC_VDRAM_BURST_SLEEP | Reserved | MT6332_PMIC_VDRAM_BURST_ON | Reserved | MT6332_PMIC_VDRAM_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDRAM_DLC | Reserved | MT6332_PMIC_VDRAM_DLC_SLEEP | Reserved | MT6332_PMIC_VDRAM_DLC_ON | Reserved | MT6332_PMIC_VDRAM_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDRAM_DLC_N | Reserved | MT6332_PMIC_VDRAM_DLC_N_SLEEP | Reserved | MT6332_PMIC_VDRAM_DLC_N_ON | Reserved | MT6332_PMIC_VDRAM_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_NI_VDRAM_VSLEEP_SEL | MT6332_PMIC_NI_VDRAM_R2R_PDN | Reserved | MT6332_PMIC_VDRAM_VSLEEP_SEL | MT6332_PMIC_VDRAM_R2R_PDN | Reserved | MT6332_PMIC_VDRAM_VSLEEP_EN | MT6332_PMIC_NI_VDRAM_VOSEL_TRANS | MT6332_PMIC_VDRAM_TRANS_ONCE | MT6332_PMIC_VDRAM_TRANS_CTRL | Reserved | MT6332_PMIC_VDRAM_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VDRAM_PFM_RIP | MT6332_PMIC_RGS_VDRAM_ENPWM_STATUS | Reserved | MT6332_PMIC_QI_VDRAM_MODE | Reserved | MT6332_PMIC_RG_VDRAM_TRAN_BST | MT6332_PMIC_RG_VDRAM_DTS_ENB | |||||||||
| Type | W | R | - | W | - | W | W | |||||||||
| Reset | ? | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_RCL_TRIM_EN | Reserved | MT6332_PMIC_RG_VDRAM_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDRAM_VSLEEP | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VDVFS2_ZX_OS | Reserved | MT6332_PMIC_RG_VDVFS2_CSL | MT6332_PMIC_RG_VDVFS2_CSR | MT6332_PMIC_RG_VDVFS2_CC | Reserved | MT6332_PMIC_RG_VDVFS2_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_NDIS_EN | MT6332_PMIC_RG_VDVFS2_MODESET | Reserved | MT6332_PMIC_RG_VDVFS2_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDVFS2_VSLEEP | Reserved | MT6332_PMIC_RG_VDVFS2_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_BURST_CTRL | MT6332_PMIC_VDVFS2_DLC_CTRL | MT6332_PMIC_VDVFS2_VOSEL_CTRL | MT6332_PMIC_VDVFS2_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_BURST_SEL | Reserved | MT6332_PMIC_VDVFS2_DLC_SEL | Reserved | MT6332_PMIC_VDVFS2_VOSEL_SEL | Reserved | MT6332_PMIC_VDVFS2_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VDVFS2_OC_STATUS | Reserved | MT6332_PMIC_QI_VDVFS2_EN | MT6332_PMIC_QI_VDVFS2_STB | Reserved | MT6332_PMIC_VDVFS2_STBTD | Reserved | MT6332_PMIC_VDVFS2_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VDVFS2_SFCHG_REN | MT6332_PMIC_VDVFS2_SFCHG_RRATE | MT6332_PMIC_VDVFS2_SFCHG_FEN | MT6332_PMIC_VDVFS2_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VDVFS2_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VDVFS2_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDVFS2_BURST | Reserved | MT6332_PMIC_VDVFS2_BURST_SLEEP | Reserved | MT6332_PMIC_VDVFS2_BURST_ON | Reserved | MT6332_PMIC_VDVFS2_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDVFS2_DLC | Reserved | MT6332_PMIC_VDVFS2_DLC_SLEEP | Reserved | MT6332_PMIC_VDVFS2_DLC_ON | Reserved | MT6332_PMIC_VDVFS2_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VDVFS2_DLC_N | Reserved | MT6332_PMIC_VDVFS2_DLC_N_SLEEP | Reserved | MT6332_PMIC_VDVFS2_DLC_N_ON | Reserved | MT6332_PMIC_VDVFS2_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_NI_VDVFS2_VSLEEP_SEL | MT6332_PMIC_NI_VDVFS2_R2R_PDN | Reserved | MT6332_PMIC_VDVFS2_VSLEEP_SEL | MT6332_PMIC_VDVFS2_R2R_PDN | Reserved | MT6332_PMIC_VDVFS2_VSLEEP_EN | MT6332_PMIC_NI_VDVFS2_VOSEL_TRANS | MT6332_PMIC_VDVFS2_TRANS_ONCE | MT6332_PMIC_VDVFS2_TRANS_CTRL | Reserved | MT6332_PMIC_VDVFS2_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VDVFS2_PFM_RIP | MT6332_PMIC_RGS_VDVFS2_ENPWM_STATUS | Reserved | MT6332_PMIC_QI_VDVFS2_MODE | Reserved | MT6332_PMIC_RG_VDVFS2_TRAN_BST | MT6332_PMIC_RG_VDVFS2_DTS_ENB | |||||||||
| Type | W | R | - | W | - | W | W | |||||||||
| Reset | ? | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_RCL_TRIM_EN | Reserved | MT6332_PMIC_RG_VDVFS2_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VDVFS2_VSLEEP | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_VSLEEP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_SEL | MT6332_PMIC_VSRAM_DVFS2_VOSEL_CTRL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VSRAM_DVFS2_SFCHG_REN | MT6332_PMIC_VSRAM_DVFS2_SFCHG_RRATE | MT6332_PMIC_VSRAM_DVFS2_SFCHG_FEN | MT6332_PMIC_VSRAM_DVFS2_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSRAM_DVFS2_VSLEEP_SEL | MT6332_PMIC_VSRAM_DVFS2_R2R_PDN | Reserved | MT6332_PMIC_VSRAM_DVFS2_VSLEEP_EN | MT6332_PMIC_NI_VSRAM_DVFS2_VOSEL_TRANS | MT6332_PMIC_VSRAM_DVFS2_TRANS_ONCE | MT6332_PMIC_VSRAM_DVFS2_TRANS_CTRL | Reserved | MT6332_PMIC_VSRAM_DVFS2_TRANS_TD | ||||||
| Type | - | W | W | - | W | R | W | W | - | W | ||||||
| Reset | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VSRAM_DVFS2_VSLEEP | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VRF1_ZX_OS | Reserved | MT6332_PMIC_RG_VRF1_CSL | MT6332_PMIC_RG_VRF1_CSR | MT6332_PMIC_RG_VRF1_CC | Reserved | MT6332_PMIC_RG_VRF1_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_NDIS_EN | MT6332_PMIC_RG_VRF1_MODESET | Reserved | MT6332_PMIC_RG_VRF1_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_DIG1_RSV0 | Reserved | MT6332_PMIC_RG_VRF1_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_BURST_CTRL | MT6332_PMIC_VRF1_DLC_CTRL | MT6332_PMIC_VRF1_VOSEL_CTRL | MT6332_PMIC_VRF1_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_BURST_SEL | Reserved | MT6332_PMIC_VRF1_DLC_SEL | Reserved | MT6332_PMIC_VRF1_VOSEL_SEL | Reserved | MT6332_PMIC_VRF1_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VRF1_OC_STATUS | Reserved | MT6332_PMIC_QI_VRF1_EN | MT6332_PMIC_QI_VRF1_STB | Reserved | MT6332_PMIC_VRF1_STBTD | Reserved | MT6332_PMIC_VRF1_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VRF1_SFCHG_REN | MT6332_PMIC_VRF1_SFCHG_RRATE | MT6332_PMIC_VRF1_SFCHG_FEN | MT6332_PMIC_VRF1_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF1_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VRF1_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF1_BURST | Reserved | MT6332_PMIC_VRF1_BURST_SLEEP | Reserved | MT6332_PMIC_VRF1_BURST_ON | Reserved | MT6332_PMIC_VRF1_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF1_DLC | Reserved | MT6332_PMIC_VRF1_DLC_SLEEP | Reserved | MT6332_PMIC_VRF1_DLC_ON | Reserved | MT6332_PMIC_VRF1_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF1_DLC_N | Reserved | MT6332_PMIC_VRF1_DLC_N_SLEEP | Reserved | MT6332_PMIC_VRF1_DLC_N_ON | Reserved | MT6332_PMIC_VRF1_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_NI_VRF1_VSLEEP_SEL | MT6332_PMIC_NI_VRF1_R2R_PDN | Reserved | MT6332_PMIC_VRF1_VSLEEP_SEL | MT6332_PMIC_VRF1_R2R_PDN | Reserved | MT6332_PMIC_VRF1_VSLEEP_EN | MT6332_PMIC_NI_VRF1_VOSEL_TRANS | MT6332_PMIC_VRF1_TRANS_ONCE | MT6332_PMIC_VRF1_TRANS_CTRL | Reserved | MT6332_PMIC_VRF1_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VRF1_PFM_RIP | MT6332_PMIC_RGS_VRF1_ENPWM_STATUS | Reserved | MT6332_PMIC_QI_VRF1_MODE | Reserved | MT6332_PMIC_RG_VRF1_TRAN_BST | MT6332_PMIC_RG_VRF1_DTS_ENB | |||||||||
| Type | W | R | - | W | - | W | W | |||||||||
| Reset | ? | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_RCL_TRIM_EN | Reserved | MT6332_PMIC_RG_VRF1_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF1_FBDIV | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VRF2_ZX_OS | Reserved | MT6332_PMIC_RG_VRF2_CSL | MT6332_PMIC_RG_VRF2_CSR | MT6332_PMIC_RG_VRF2_CC | Reserved | MT6332_PMIC_RG_VRF2_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_NDIS_EN | MT6332_PMIC_RG_VRF2_MODESET | Reserved | MT6332_PMIC_RG_VRF2_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_DIG1_RSV0 | Reserved | MT6332_PMIC_RG_VRF2_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_BURST_CTRL | MT6332_PMIC_VRF2_DLC_CTRL | MT6332_PMIC_VRF2_VOSEL_CTRL | MT6332_PMIC_VRF2_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_BURST_SEL | Reserved | MT6332_PMIC_VRF2_DLC_SEL | Reserved | MT6332_PMIC_VRF2_VOSEL_SEL | Reserved | MT6332_PMIC_VRF2_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VRF2_OC_STATUS | Reserved | MT6332_PMIC_QI_VRF2_EN | MT6332_PMIC_QI_VRF2_STB | Reserved | MT6332_PMIC_VRF2_STBTD | Reserved | MT6332_PMIC_VRF2_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VRF2_SFCHG_REN | MT6332_PMIC_VRF2_SFCHG_RRATE | MT6332_PMIC_VRF2_SFCHG_FEN | MT6332_PMIC_VRF2_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VRF2_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VRF2_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF2_BURST | Reserved | MT6332_PMIC_VRF2_BURST_SLEEP | Reserved | MT6332_PMIC_VRF2_BURST_ON | Reserved | MT6332_PMIC_VRF2_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF2_DLC | Reserved | MT6332_PMIC_VRF2_DLC_SLEEP | Reserved | MT6332_PMIC_VRF2_DLC_ON | Reserved | MT6332_PMIC_VRF2_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VRF2_DLC_N | Reserved | MT6332_PMIC_VRF2_DLC_N_SLEEP | Reserved | MT6332_PMIC_VRF2_DLC_N_ON | Reserved | MT6332_PMIC_VRF2_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_NI_VRF2_VSLEEP_SEL | MT6332_PMIC_NI_VRF2_R2R_PDN | Reserved | MT6332_PMIC_VRF2_VSLEEP_SEL | MT6332_PMIC_VRF2_R2R_PDN | Reserved | MT6332_PMIC_VRF2_VSLEEP_EN | MT6332_PMIC_NI_VRF2_VOSEL_TRANS | MT6332_PMIC_VRF2_TRANS_ONCE | MT6332_PMIC_VRF2_TRANS_CTRL | Reserved | MT6332_PMIC_VRF2_TRANS_TD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VRF2_PFM_RIP | MT6332_PMIC_RGS_VRF2_ENPWM_STATUS | Reserved | MT6332_PMIC_QI_VRF2_MODE | Reserved | MT6332_PMIC_RG_VRF2_TRAN_BST | MT6332_PMIC_RG_VRF2_DTS_ENB | |||||||||
| Type | W | R | - | W | - | W | W | |||||||||
| Reset | ? | ? | - | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_RCL_TRIM_EN | Reserved | MT6332_PMIC_RG_VRF2_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VRF2_FBDIV | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_DIG1_RSV0 | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VPA_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VPA_ZX_OS | Reserved | MT6332_PMIC_RG_VPA_TRIML | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VPA_SLEW | MT6332_PMIC_RG_VPA_SLEW_NMOS | MT6332_PMIC_RG_VPA_CSL | MT6332_PMIC_RG_VPA_CSR | MT6332_PMIC_RG_VPA_CC | Reserved | MT6332_PMIC_RG_VPA_RZSEL | ||||||||
| Type | - | W | W | W | W | W | - | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VPA_VBAT_DEL | MT6332_PMIC_RG_VPA_CSMIR | Reserved | MT6332_PMIC_RG_VPA_NDIS_EN | MT6332_PMIC_RG_VPA_MODESET | Reserved | ||||||||||
| Type | W | W | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_DIG0_RSV0 | MT6332_PMIC_RG_VPA_SLP | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VPA_RSV1 | MT6332_PMIC_RG_VPA_RSV2 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_BURST_CTRL | MT6332_PMIC_VPA_DLC_CTRL | MT6332_PMIC_VPA_VOSEL_CTRL | MT6332_PMIC_VPA_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_BURST_SEL | Reserved | MT6332_PMIC_VPA_DLC_SEL | Reserved | MT6332_PMIC_VPA_VOSEL_SEL | Reserved | MT6332_PMIC_VPA_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VPA_OC_STATUS | Reserved | MT6332_PMIC_QI_VPA_EN | MT6332_PMIC_QI_VPA_STB | Reserved | MT6332_PMIC_VPA_STBTD | Reserved | MT6332_PMIC_VPA_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VPA_SFCHG_REN | MT6332_PMIC_VPA_SFCHG_RRATE | MT6332_PMIC_VPA_SFCHG_FEN | MT6332_PMIC_VPA_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VPA_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_DIG0_RSV3 | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VPA_DLC | Reserved | MT6332_PMIC_VPA_DLC_SLEEP | Reserved | MT6332_PMIC_VPA_DLC_ON | Reserved | MT6332_PMIC_VPA_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VPA_DIG1_RSV1 | MT6332_PMIC_VPA_DIG0_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VPA_DIG1_RSV3 | Reserved | MT6332_PMIC_VPA_DIG1_RSV4 | Reserved | MT6332_PMIC_NI_VPA_DVS_BW | MT6332_PMIC_VPA_TRANS_ONCE | MT6332_PMIC_VPA_TRANS_CTRL | Reserved | MT6332_PMIC_VPA_TRANS_TD | |||||||
| Type | W | - | W | - | R | W | W | - | W | |||||||
| Reset | ? | - | ? | - | ? | ? | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VPA_BURSTH | Reserved | MT6332_PMIC_VPA_BURSTH_SLEEP | Reserved | MT6332_PMIC_VPA_BURSTH_ON | Reserved | MT6332_PMIC_VPA_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VPA_BURSTL | Reserved | MT6332_PMIC_VPA_BURSTL_SLEEP | Reserved | MT6332_PMIC_VPA_BURSTL_ON | Reserved | MT6332_PMIC_VPA_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_VOSEL_DLC111 | Reserved | MT6332_PMIC_VPA_VOSEL_DLC011 | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VPA_VOSEL_DLC001 | Reserved | MT6332_PMIC_VPA_DLC_MAP_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VPA_ZX_POS | MT6332_PMIC_RG_VPA_HZP | MT6332_PMIC_RG_VPA_VBAT_BYPASS | Reserved | MT6332_PMIC_RG_VPA_BWEX_GAT | MT6332_PMIC_RG_VPA_BYPASS_GAT | |||||||||
| Type | - | W | W | W | - | W | W | |||||||||
| Reset | - | ? | ? | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VPA_DIG1_RSV2 | MT6332_PMIC_VPA_DIG0_RSV4 | MT6332_PMIC_NI_VPA_DVS_TRANST | MT6332_PMIC_VPA_DVS_TRANS_ONCE | MT6332_PMIC_VPA_DVS_TRANS_CTRL | Reserved | MT6332_PMIC_VPA_DVS_TRANS_TD | |||||||||
| Type | W | W | R | W | W | - | W | |||||||||
| Reset | ? | ? | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VPA_TRIM_REF | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_ZXOS_TRIM | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_TRIMH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_TRIML | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VSBST_ZX_OS | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_SLEW | MT6332_PMIC_RG_VSBST_SLEW_NMOS | MT6332_PMIC_RG_VSBST_CSL | MT6332_PMIC_RG_VSBST_CSR | MT6332_PMIC_RG_VSBST_CC | Reserved | |||||||||
| Type | - | W | W | W | W | W | - | |||||||||
| Reset | - | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_NDIS_EN | MT6332_PMIC_RG_VSBST_MODESET | Reserved | MT6332_PMIC_RG_VSBST_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_DIG0_RSV0 | MT6332_PMIC_RG_VSBST_SLP | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_BURST_CTRL | MT6332_PMIC_VSBST_DIG0_RSV1 | MT6332_PMIC_VSBST_VOSEL_CTRL | MT6332_PMIC_VSBST_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_BURST_SEL | Reserved | MT6332_PMIC_VSBST_DIG1_RSV0 | Reserved | MT6332_PMIC_VSBST_VOSEL_SEL | Reserved | MT6332_PMIC_VSBST_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VSBST_OC_STATUS | Reserved | MT6332_PMIC_QI_VSBST_EN | MT6332_PMIC_QI_VSBST_STB | Reserved | MT6332_PMIC_VSBST_STBTD | Reserved | MT6332_PMIC_VSBST_EN | ||||||||
| Type | R | - | R | R | - | W | - | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_VSBST_SFCHG_REN | MT6332_PMIC_VSBST_SFCHG_RRATE | MT6332_PMIC_VSBST_SFCHG_FEN | MT6332_PMIC_VSBST_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VSBST_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VSBST_BURSTH | Reserved | MT6332_PMIC_VSBST_BURSTH_SLEEP | Reserved | MT6332_PMIC_VSBST_BURSTH_ON | Reserved | MT6332_PMIC_VSBST_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_VSBST_BURSTL | Reserved | MT6332_PMIC_VSBST_BURSTL_SLEEP | Reserved | MT6332_PMIC_VSBST_BURSTL_ON | Reserved | MT6332_PMIC_VSBST_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_RC | MT6332_PMIC_RGS_VSBST_ENPWM_STATUS | MT6332_PMIC_QI_VSBST_PG_STATUS | MT6332_PMIC_RG_VSBST_FASYNC | Reserved | MT6332_PMIC_RG_VSBST_OVP_SEL | |||||||||
| Type | - | W | R | R | W | - | W | |||||||||
| Reset | - | ? | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_RCL_TRIM_EN | Reserved | MT6332_PMIC_RG_VSBST_RCL_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VSBST_FBODY | Reserved | MT6332_PMIC_RG_VSBST_FBODY_BST | Reserved | MT6332_PMIC_RG_VSBST_FMODE | Reserved | MT6332_PMIC_RG_VSBST_FMODE_BST | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_VSBST_MODE_DEB_SEL | Reserved | MT6332_PMIC_VSBST_BODY_DEB_SEL | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_K_INV | MT6332_PMIC_K_AUTO_EN | MT6332_PMIC_K_SRC_SEL | MT6332_PMIC_K_START_MANUAL | MT6332_PMIC_K_ONCE | MT6332_PMIC_K_ONCE_EN | MT6332_PMIC_K_MAP_SEL | MT6332_PMIC_K_RST_DONE | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_K_CONTROL_SMPS | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_QI_SMPS_OSC_CAL | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_K_CONTROL | MT6332_PMIC_K_DONE | MT6332_PMIC_K_RESULT | ||||||||||||
| Type | - | R | R | R | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_K_BUCK_CK_CNT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_K_CHR_CK_CNT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH0 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH0 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH1 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH1 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH2 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH2 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH3 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH3 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH4 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH4 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH5 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH5 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH6 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH6 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH7 | MT6332_PMIC_AUXADC_ADC_OUT_CH7 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH8 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH8 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH9 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH9 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH10 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH10 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH11_15 | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH11_15 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_THR_HW | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_THR_HW | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_LBAT | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_LBAT | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH7_BY_GPS | MT6332_PMIC_AUXADC_ADC_OUT_CH7_BY_GPS | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH7_BY_MD | MT6332_PMIC_AUXADC_ADC_OUT_CH7_BY_MD | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH7_BY_AP | MT6332_PMIC_AUXADC_ADC_OUT_CH7_BY_AP | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_CH4_BY_MD | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_CH4_BY_MD | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_WAKEUP | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_WAKEUP | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_00 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_00 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_01 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_01 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_02 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_02 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_03 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_03 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_04 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_04 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_05 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_05 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_06 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_06 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_07 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_07 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_08 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_08 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_09 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_09 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_10 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_10 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_11 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_11 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_12 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_12 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_13 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_13 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_14 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_14 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_15 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_15 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_16 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_16 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_17 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_17 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_18 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_18 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_19 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_19 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_20 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_20 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_21 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_21 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_22 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_22 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_RDY_23 | Reserved | MT6332_PMIC_AUXADC_SPK_OUT_23 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_RAW | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_BUSY_IN_SPK_V | MT6332_PMIC_AUXADC_ADC_BUSY_IN_SPK_I | MT6332_PMIC_AUXADC_ADC_BUSY_IN_WAKEUP | MT6332_PMIC_AUXADC_ADC_BUSY_IN_LBAT | MT6332_PMIC_AUXADC_ADC_BUSY_IN | |||||||||||
| Type | R | R | R | R | R | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_BUSY_IN_THR_MD | MT6332_PMIC_AUXADC_ADC_BUSY_IN_THR_HW | MT6332_PMIC_AUXADC_ADC_BUSY_IN_GPS | MT6332_PMIC_AUXADC_ADC_BUSY_IN_GPS_MD | MT6332_PMIC_AUXADC_ADC_BUSY_IN_GPS_AP | Reserved | ||||||||||
| Type | R | R | R | R | R | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_RQST_CH15 | MT6332_PMIC_AUXADC_RQST_CH14 | MT6332_PMIC_AUXADC_RQST_CH13 | MT6332_PMIC_AUXADC_RQST_CH12 | MT6332_PMIC_AUXADC_RQST_CH11 | MT6332_PMIC_AUXADC_RQST_CH10 | MT6332_PMIC_AUXADC_RQST_CH9 | MT6332_PMIC_AUXADC_RQST_CH8 | MT6332_PMIC_AUXADC_RQST_CH7 | MT6332_PMIC_AUXADC_RQST_CH6 | MT6332_PMIC_AUXADC_RQST_CH5 | MT6332_PMIC_AUXADC_RQST_CH4 | MT6332_PMIC_AUXADC_RQST_CH3 | MT6332_PMIC_AUXADC_RQST_CH2 | MT6332_PMIC_AUXADC_RQST_CH1 | MT6332_PMIC_AUXADC_RQST_CH0 |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_RQST_RSV1 | MT6332_PMIC_AUXADC_RQST_CH7_BY_GPS | MT6332_PMIC_AUXADC_RQST_CH7_BY_MD | Reserved | MT6332_PMIC_AUXADC_RQST_CH4_BY_MD | MT6332_PMIC_AUXADC_RQST_RSV0 | ||||||||||
| Type | W | W | W | - | W | W | ||||||||||
| Reset | ? | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_CK_AON | MT6332_PMIC_AUXADC_CK_AON_MD | MT6332_PMIC_AUXADC_CK_AON_GPS | MT6332_PMIC_AUXADC_SRCLKEN_CK_EN | MT6332_PMIC_AUXADC_ADC_RDY_WAKEUP_CLR | MT6332_PMIC_AUXADC_STRUP_CK_ON_ENB | Reserved | MT6332_PMIC_AUXADC_CK_ON_EXTD | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPL_NUM | MT6332_PMIC_AUXADC_AVG_NUM_LARGE | MT6332_PMIC_AUXADC_AVG_NUM_SMALL | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_AVG_NUM_SEL_SPK_V | MT6332_PMIC_AUXADC_AVG_NUM_SEL_SPK_I | MT6332_PMIC_AUXADC_AVG_NUM_SEL_WAKEUP | MT6332_PMIC_AUXADC_AVG_NUM_SEL_LBAT | MT6332_PMIC_AUXADC_AVG_NUM_SEL | |||||||||||
| Type | W | W | W | W | W | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_TRIM_CH7_SEL | MT6332_PMIC_AUXADC_TRIM_CH6_SEL | MT6332_PMIC_AUXADC_TRIM_CH5_SEL | MT6332_PMIC_AUXADC_TRIM_CH4_SEL | MT6332_PMIC_AUXADC_TRIM_CH3_SEL | MT6332_PMIC_AUXADC_TRIM_CH2_SEL | MT6332_PMIC_AUXADC_TRIM_CH1_SEL | MT6332_PMIC_AUXADC_TRIM_CH0_SEL | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_ADC_TRIM_COMP | MT6332_PMIC_RG_ADC_2S_COMP_ENB | Reserved | MT6332_PMIC_AUXADC_TRIM_CH11_SEL | MT6332_PMIC_AUXADC_TRIM_CH10_SEL | MT6332_PMIC_AUXADC_TRIM_CH9_SEL | MT6332_PMIC_AUXADC_TRIM_CH8_SEL | |||||||||
| Type | W | W | - | W | W | W | W | |||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_SW_GAIN_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_SW_OFFSET_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_OUT_SEL | Reserved | MT6332_PMIC_AUXADC_ADC_PWDB_SWCTRL | MT6332_PMIC_AUXADC_ADC_PWDB | MT6332_PMIC_AUXADC_START_SWCTRL | MT6332_PMIC_AUXADC_START_SW | MT6332_PMIC_AUXADC_BIT_SEL | MT6332_PMIC_AUXADC_TEST_MODE | MT6332_PMIC_AUXADC_DATA_REUSE_SEL | MT6332_PMIC_AUXADC_RNG_EN | |||||
| Type | - | W | - | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AD_AUXADC_COMP | Reserved | MT6332_PMIC_AUXADC_DA_DAC_SWCTRL | MT6332_PMIC_AUXADC_DA_DAC | ||||||||||||
| Type | R | - | W | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_AUXADC_CALI | MT6332_PMIC_RG_AUX_RSV | MT6332_PMIC_RG_VBUF_EN | MT6332_PMIC_RG_VBUF_BYP | MT6332_PMIC_RG_VBUF_CALEN | MT6332_PMIC_RG_VBUF_EXTEN | Reserved | |||||||||
| Type | W | W | W | W | W | W | - | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SWCTRL_EN | MT6332_PMIC_AUXADC_CHSEL | MT6332_PMIC_AUXADC_DIG0_RSV0 | MT6332_PMIC_RG_ADCIN_CS_EN | MT6332_PMIC_RG_ADCIN_BATSNS_EN | MT6332_PMIC_RG_ADCIN_CHRIN_EN | MT6332_PMIC_AUXADC_ADCIN_BATON_TDET_EN | MT6332_PMIC_AUXADC_ADCIN_CS_EN | MT6332_PMIC_AUXADC_ADCIN_BATSNS_EN | MT6332_PMIC_AUXADC_ADCIN_CHRIN_EN | ||||||
| Type | W | W | W | W | W | W | W | W | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_DAC_EXTD_EN | MT6332_PMIC_AUXADC_DAC_EXTD | MT6332_PMIC_AUXADC_ACCDET_AUTO_RQST_CLR | MT6332_PMIC_AUXADC_ACCDET_AUTO_SPL | MT6332_PMIC_AUXADC_DIG1_RSV2 | MT6332_PMIC_AUXADC_DIG0_RSV2 | MT6332_PMIC_AUXADC_SPK_MODE_BLOCKING | MT6332_PMIC_AUXADC_SPK_CHSEL_INV | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_MODE | MT6332_PMIC_AUXADC_SPK_V_PTR_ENB | MT6332_PMIC_AUXADC_SPK_I_PTR_ENB | MT6332_PMIC_AUXADC_SPK_HW_SEL_ENB | MT6332_PMIC_AUXADC_SPK_SW_SEL | MT6332_PMIC_AUXADC_SPK_V_DATA_MODE | MT6332_PMIC_AUXADC_SPK_I_DATA_MODE | MT6332_PMIC_AUXADC_SPK_V_QUE_CNT_RST | MT6332_PMIC_AUXADC_SPK_I_QUE_CNT_RST | MT6332_PMIC_AUXADC_SPK_OVFLR_CLR | MT6332_PMIC_AUXADC_SPK_BUFFER_LENGTH | |||||
| Type | W | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_DIG0_RSV1 | MT6332_PMIC_AUXADC_PMU_THR_PDN_STATUS | MT6332_PMIC_AUXADC_PMU_THR_PDN_SEL | MT6332_PMIC_AUXADC_PMU_THR_PDN_SW | MT6332_PMIC_AUXADC_AUTORPT_EN | MT6332_PMIC_AUXADC_AUTORPT_PRD | ||||||||||
| Type | W | R | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_LBAT_DEBT_MIN | MT6332_PMIC_AUXADC_LBAT_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_LBAT_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_LBAT_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_LBAT_MAX_IRQ_B | Reserved | MT6332_PMIC_AUXADC_LBAT_EN_MAX | MT6332_PMIC_AUXADC_LBAT_IRQ_EN_MAX | MT6332_PMIC_AUXADC_LBAT_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_LBAT_MIN_IRQ_B | Reserved | MT6332_PMIC_AUXADC_LBAT_EN_MIN | MT6332_PMIC_AUXADC_LBAT_IRQ_EN_MIN | MT6332_PMIC_AUXADC_LBAT_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_LBAT_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ACCDET_DIG0_RSV0 | MT6332_PMIC_AUXADC_ACCDET_DIG1_RSV0 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_THR_DEBT_MIN | MT6332_PMIC_AUXADC_THR_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_THR_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_THR_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_THR_MAX_IRQ_B | Reserved | MT6332_PMIC_AUXADC_THR_EN_MAX | MT6332_PMIC_AUXADC_THR_IRQ_EN_MAX | MT6332_PMIC_AUXADC_THR_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_THR_MIN_IRQ_B | Reserved | MT6332_PMIC_AUXADC_THR_EN_MIN | MT6332_PMIC_AUXADC_THR_IRQ_EN_MIN | MT6332_PMIC_AUXADC_THR_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_THR_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_THR_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_EFUSE_GAIN_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_EFUSE_OFFSET_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_EFUSE_GAIN_CH0_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_EFUSE_OFFSET_CH0_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_OVFLR | Reserved | MT6332_PMIC_AUXADC_SPK_V_QUE_CNT | Reserved | MT6332_PMIC_AUXADC_SPK_I_QUE_CNT | |||||||||||
| Type | R | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPK_CHSEL | Reserved | MT6332_PMIC_AUXADC_SPK_V_PTR_WRITE | Reserved | MT6332_PMIC_AUXADC_SPK_I_PTR_WRITE | |||||||||||
| Type | R | - | R | - | R | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_DIG0_RSV4 | Reserved | MT6332_PMIC_AUXADC_SPK_V_PTR_READ | Reserved | MT6332_PMIC_AUXADC_SPK_I_PTR_READ | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_DIG0_RSV5 | MT6332_PMIC_AUXADC_SPK_V_CHSEL | MT6332_PMIC_AUXADC_SPK_I_CHSEL | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_M3_DEBT_MIN | MT6332_PMIC_AUXADC_M3_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_M3_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_M3_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_M3_MAX_IRQ_B | Reserved | MT6332_PMIC_AUXADC_M3_EN_MAX | MT6332_PMIC_AUXADC_M3_IRQ_EN_MAX | MT6332_PMIC_AUXADC_M3_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_M3_MIN_IRQ_B | Reserved | MT6332_PMIC_AUXADC_M3_EN_MIN | MT6332_PMIC_AUXADC_M3_IRQ_EN_MIN | MT6332_PMIC_AUXADC_M3_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_M3_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_AUXADC_M3_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_ADC_RDY_M3_HW | Reserved | MT6332_PMIC_AUXADC_ADC_OUT_M3_HW | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_M3_RSV | Reserved | MT6332_PMIC_AUXADC_M3_HW_SPL | Reserved | MT6332_PMIC_AUXADC_M3_REF_EN | MT6332_PMIC_AUXADC_M3_REF_OE | MT6332_PMIC_AUXADC_SWCHR_REF_OSC_EN | |||||||||
| Type | W | - | W | - | W | W | W | |||||||||
| Reset | ? | - | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPL_NUM_LARGE | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_AUXADC_SPL_NUM_SEL_SPK_V | MT6332_PMIC_AUXADC_SPL_NUM_SEL_SPK_I | MT6332_PMIC_AUXADC_SPL_NUM_SEL_WAKEUP | MT6332_PMIC_AUXADC_SPL_NUM_SEL_LBAT | MT6332_PMIC_AUXADC_SPL_NUM_SEL | |||||||||||
| Type | W | W | W | W | W | |||||||||||
| Reset | ? | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_STRUP_BUCK_EN_DEB_SEL | MT6332_PMIC_RG_STRUP_VCORE_EN_DEB_SEL | MT6332_PMIC_RG_STRUP_VMEM_EN_DEB_SEL | MT6332_PMIC_RG_STRUP_POSEQ_DONE_DEB_SEL | MT6332_PMIC_RG_STRUP_SLEEP_MODE_DEB_SEL | MT6332_PMIC_RG_STRUP_RSV1_2_0 | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_STRUP_RSV2_7_4 | MT6332_PMIC_RG_STRUP_IVGEN_ENB_SEL | MT6332_PMIC_RG_STRUP_IVGEN_ENB | MT6332_PMIC_RG_STRUP_OSC_EN_SEL | MT6332_PMIC_RG_STRUP_OSC_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_STRUP_RSV3_7_0 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_THRDET_SEL | MT6332_PMIC_THR_HWPDN_EN | MT6332_PMIC_RG_STRUP_THR_SEL | MT6332_PMIC_RG_THR_TEMP_SEL | MT6332_PMIC_RG_THR_TMODE | MT6332_PMIC_THR_DET_DIS | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_STRUP_IREF_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VREF_BG | Reserved | MT6332_PMIC_RG_RSTB_DRV_SEL | MT6332_PMIC_RG_EN_DRVSEL | Reserved | MT6332_PMIC_RG_FCHR_PU_EN | MT6332_PMIC_RG_FCHR_KEYDET_EN | MT6332_PMIC_RG_USBDL_EN | |||||||
| Type | - | W | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_PMU_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_PMU_THR_STATUS | Reserved | MT6332_PMIC_PMU_THR_DEB | Reserved | MT6332_PMIC_THR_TEST | ||||||||||
| Type | - | R | - | R | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_STRUP_DIG_IO_PG_FORCE | Reserved | MT6332_PMIC_RTC_XOSC32_ENB_SEL | MT6332_PMIC_RTC_XOSC32_ENB_SW | MT6332_PMIC_BIAS_GEN_EN_SEL | MT6332_PMIC_BIAS_GEN_EN | MT6332_PMIC_STRUP_PWRON_SEL | MT6332_PMIC_STRUP_PWRON | MT6332_PMIC_BIAS_GEN_EN_FORCE | MT6332_PMIC_STRUP_PWRON_FORCE | MT6332_PMIC_STRUP_FT_CTRL | MT6332_PMIC_STRUP_OSC_EN_SEL | MT6332_PMIC_STRUP_OSC_EN | MT6332_PMIC_PWRBB_DEB_EN | MT6332_PMIC_DDUVLO_DEB_EN | |
| Type | W | - | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_STRUP_CON6_RSV0 | MT6332_PMIC_VAUXB32_PG_H2L_EN | MT6332_PMIC_EXT_PMIC_EN_INT_PG_H2L_EN | MT6332_PMIC_VDVFS2_PG_H2L_EN | MT6332_PMIC_VDRAM_PG_H2L_EN | MT6332_PMIC_VSRAM_DVFS2_PG_H2L_EN | MT6332_PMIC_VUSB33_PG_H2L_EN | MT6332_PMIC_VSBST_PG_H2L_EN | MT6332_PMIC_VDVFS2_PG_ENB | MT6332_PMIC_VDRAM_PG_ENB | MT6332_PMIC_VSRAM_DVFS2_PG_ENB | MT6332_PMIC_VUSB33_PG_ENB | MT6332_PMIC_VSBST_PG_ENB | MT6332_PMIC_EXT_PMIC_EN_INT_PG_ENB | MT6332_PMIC_VAUXB32_PG_ENB | Reserved |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | - |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_OSC_EN | Reserved | MT6332_PMIC_UVLO_L2H_DEB_EN | MT6332_PMIC_CLR_JUST_RST | Reserved | |||||||||||
| Type | R | - | W | W | - | |||||||||||
| Reset | ? | - | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_EXT_PMIC_EN | MT6332_PMIC_STRUP_CON8_RSV0 | Reserved | MT6332_PMIC_STRUP_EXT_PMIC_SEL | MT6332_PMIC_STRUP_EXT_PMIC_EN | |||||||||||
| Type | R | W | - | W | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_STRUP_AUXADC_RSTB_SEL | MT6332_PMIC_STRUP_AUXADC_START_SEL | MT6332_PMIC_STRUP_AUXADC_RSTB_SW | MT6332_PMIC_STRUP_AUXADC_START_SW | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_STRUP_PWROFF_PREOFF_EN | MT6332_PMIC_STRUP_PWROFF_SEQ_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_UVLO_VTHL | MT6332_PMIC_STRUP_DIG_RSV | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_BGR_UNCHOP | MT6332_PMIC_RG_BGR_UNCHOP_PH | MT6332_PMIC_RG_BGR_RSEL | MT6332_PMIC_RG_BGR_TRIM_EN | MT6332_PMIC_RG_BGR_TRIM | Reserved | MT6332_PMIC_QI_BGR_EXT_BUF_EN | MT6332_PMIC_RG_BGR_TEST_EN | MT6332_PMIC_RG_BGR_TEST_RSTB | |||||||
| Type | W | W | W | W | W | - | W | W | W | |||||||
| Reset | ? | ? | ? | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_STRUP_RSV | MT6332_PMIC_RG_TESTMODE_SWEN | Reserved | MT6332_PMIC_RG_EN_E4 | MT6332_PMIC_RG_EN_E8 | MT6332_PMIC_RG_EN_SR | MT6332_PMIC_RG_EN_SMT | |||||||||
| Type | W | W | - | W | W | W | W | |||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_XOSC32_ENB_DET | MT6332_PMIC_RTC_XOSC32_ENB | MT6332_PMIC_PWRRST_TMR_DIS | MT6332_PMIC_STRUP_CON15_RSV0 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_RSV_SWREG | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_STRUP_PG_STATUS_CLR | Reserved | MT6332_PMIC_STRUP_PG_STATUS | |||||||||||||
| Type | W | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_SW_RSTCLR | MT6332_PMIC_FG_CHARGE_RST | MT6332_PMIC_FG_TIME_RST | MT6332_PMIC_FG_OFFSET_RST | MT6332_PMIC_FG_SW_CLEAR | MT6332_PMIC_FG_LATCHDATA_ST | MT6332_PMIC_FG_SW_READ_PRE | MT6332_PMIC_FG_SW_CR | Reserved | MT6332_PMIC_FG_AUTOCALRATE | MT6332_PMIC_FG_CAL | Reserved | MT6332_PMIC_FG_ON | |||
| Type | W | W | W | W | W | R | W | W | - | W | W | - | W | |||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | - | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CAR_31_16 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CAR_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_NTER_29_16 | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_NTER_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_BLTR | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_BFTR | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CURRENT_OUT | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_ADJUST_OFFSET_VALUE | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_OFFSET | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPARE | MT6332_PMIC_RG_FGANALOGTEST | Reserved | MT6332_PMIC_RG_FGRINTMODE | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_ADC_AUTORST | MT6332_PMIC_FG_ADJ_OFFSET_EN | Reserved | MT6332_PMIC_FG_OSR | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_RST | MT6332_PMIC_FGCAL_EN | MT6332_PMIC_FGADC_EN | Reserved | MT6332_PMIC_FG_SLP_EN | MT6332_PMIC_FG_ADC_RSTDETECT | Reserved | MT6332_PMIC_FG_H_INT_STS | MT6332_PMIC_FG_L_INT_STS | MT6332_PMIC_FG_H_CUR_INT_STS | MT6332_PMIC_FG_L_CUR_INT_STS | MT6332_PMIC_FG_FIR2BYPASS | MT6332_PMIC_FG_FIR1BYPASS | ||
| Type | - | R | R | R | - | W | R | - | R | R | R | R | W | W | ||
| Reset | - | ? | ? | ? | - | ? | ? | - | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CIC2 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_SLP_CUR_TH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_SLP_TIME | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_DET_TIME | MT6332_PMIC_FG_SRCVOLTEN_FTIME | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_R_CAR_31_16 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_R_CAR_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_R_NTER_29_16 | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_R_NTER_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_R_CURR | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_TEST_MODE1 | MT6332_PMIC_FG_TEST_MODE0 | Reserved | MT6332_PMIC_FG_RSV1 | MT6332_PMIC_FG_FGADC_EN_SW | MT6332_PMIC_FG_FGCAL_EN_SW | MT6332_PMIC_FG_RST_SW | MT6332_PMIC_FG_MODE | ||||||||
| Type | W | W | - | W | W | W | W | W | ||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PA | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PDIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PTM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PWE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PPROG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PWE_SRC | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_PROG_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_RD_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_RD_TRIG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_RD_RDY_BYPASS | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SKIP_OTP_OUT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_RD_SW | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_SW | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_RD_ACK | Reserved | MT6332_PMIC_RG_OTP_RD_BUSY | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_OTP_PA_SW | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_0_15 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_16_31 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_32_47 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_48_63 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_64_79 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_80_95 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_96_111 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_112_127 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_128_143 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_144_159 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_160_175 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_176_191 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_192_207 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_208_223 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_224_239 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_DOUT_240_255 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_0_15 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_16_31 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_32_47 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_48_63 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_64_79 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_80_95 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_96_111 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_112_127 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_128_143 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_144_159 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_160_175 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_176_191 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_192_207 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_208_223 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_224_239 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_OTP_VAL_240_255 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RSV | MT6332_PMIC_RG_SYSLDO_RSV | MT6332_PMIC_RG_DLDO_RSV | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VAUXB32_EN | MT6332_PMIC_RG_VAUXB32_SRCLK_EN_SEL | Reserved | MT6332_PMIC_RG_VAUXB32_ON_CTRL | MT6332_PMIC_RG_VAUXB32_EN | MT6332_PMIC_RG_VAUXB32_STBTD | MT6332_PMIC_QI_VAUXB32_MODE | MT6332_PMIC_RG_VAUXB32_SRCLK_MODE_SEL | Reserved | MT6332_PMIC_RG_VAUXB32_AUXADC_PWDB_EN | MT6332_PMIC_RG_VAUXB32_LP_MODE_SET | MT6332_PMIC_RG_VAUXB32_LP_CTRL | ||||
| Type | R | W | - | W | W | W | R | W | - | W | W | W | ||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VBIF28_EN | MT6332_PMIC_RG_VBIF28_SRCLK_EN_SEL | Reserved | MT6332_PMIC_RG_VBIF28_ON_CTRL | MT6332_PMIC_RG_VBIF28_EN | MT6332_PMIC_RG_VBIF28_STBTD | MT6332_PMIC_QI_VBIF28_MODE | MT6332_PMIC_RG_VBIF28_SRCLK_MODE_SEL | Reserved | MT6332_PMIC_RG_VBIF28_LP_MODE_SET | MT6332_PMIC_RG_VBIF28_LP_CTRL | |||||
| Type | R | W | - | W | W | W | R | W | - | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VUSB33_EN | Reserved | MT6332_PMIC_RG_VUSB33_EN | MT6332_PMIC_RG_VUSB33_STBTD | MT6332_PMIC_QI_VUSB33_MODE | MT6332_PMIC_RG_VUSB33_SRCLK_MODE_SEL | Reserved | MT6332_PMIC_RG_VUSB33_LP_MODE_SET | MT6332_PMIC_RG_VUSB33_LP_CTRL | |||||||
| Type | R | - | W | W | R | W | - | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VSRAM_DVFS2_EN | MT6332_PMIC_RG_VSRAM_DVFS2_SRCLK_EN_SEL | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_ON_CTRL | MT6332_PMIC_RG_VSRAM_DVFS2_EN | MT6332_PMIC_RG_VSRAM_DVFS2_STBTD | MT6332_PMIC_QI_VSRAM_DVFS2_MODE | MT6332_PMIC_RG_VSRAM_DVFS2_SRCLK_MODE_SEL | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_TRCK_NDIS_EN | MT6332_PMIC_RG_VSRAM_DVFS2_LP_MODE_SET | MT6332_PMIC_RG_VSRAM_DVFS2_LP_CTRL | ||||
| Type | R | W | - | W | W | W | R | W | - | W | W | W | ||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VBIF28_CAL | Reserved | MT6332_PMIC_RG_VBIF28_NDIS_EN | Reserved | |||||||||||
| Type | - | W | - | W | - | |||||||||||
| Reset | - | ? | - | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VUSB33_CAL | Reserved | MT6332_PMIC_RG_VUSB33_NDIS_EN | Reserved | |||||||||||
| Type | - | W | - | W | - | |||||||||||
| Reset | - | ? | - | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VSRAM_DVFS2_VOSEL | MT6332_PMIC_RG_VSRAM_DVFS2_CMP_DEBUG_EN | MT6332_PMIC_RG_VSRAM_DVFS2_POWER_DOWN_NDIS_EN | MT6332_PMIC_RG_VSRAM_DVFS2_NDIS_PLCUR | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_NDIS_EN | Reserved | |||||||||
| Type | W | W | W | W | - | W | - | |||||||||
| Reset | ? | ? | ? | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_VAUXB32_CAL | Reserved | MT6332_PMIC_RG_VAUXB32_VOSEL | Reserved | MT6332_PMIC_RG_VAUXB32_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_LDO_DEGTD_SEL | MT6332_PMIC_RG_VAUXB32_OCFB_EN | MT6332_PMIC_RG_VBIF28_OCFB_EN | MT6332_PMIC_RG_VUSB33_OCFB_EN | Reserved | MT6332_PMIC_RG_VSRAM_DVFS2_OCFB_EN | Reserved | |||||||||
| Type | W | W | W | W | - | W | - | |||||||||
| Reset | ? | ? | ? | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_QI_VAUXB32_OCFB_EN | MT6332_PMIC_QI_VBIF28_OCFB_EN | MT6332_PMIC_QI_VSRAM_DVFS2_OCFB_EN | MT6332_PMIC_QI_VUSB33_OCFB_EN | Reserved | |||||||||||
| Type | R | R | R | R | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_VDIG18_VOSEL_CTRL | MT6332_PMIC_RG_VDIG18_VOSEL | MT6332_PMIC_RG_VDIG18_SLEEP_VOSEL | MT6332_PMIC_RG_VDIG18_SRCLKEN_SEL | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_LDO_RSV0 | MT6332_PMIC_RG_LDO_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FQMTR_EN | Reserved | MT6332_PMIC_FQMTR_BUSY | MT6332_PMIC_FQMTR_TCKSEL | ||||||||||||
| Type | W | - | R | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FQMTR_WINSET | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FQMTR_DATA | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_IWLED_FRQ_COUNT | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_OC_DEG_EN | MT6332_PMIC_RG_IWLED_OVP_DEG_EN | MT6332_PMIC_RG_IWLED_SLP_DEG_EN | Reserved | MT6332_PMIC_RG_IWLED_OC_DEG_SEL | MT6332_PMIC_RG_IWLED_OVP_DEG_SEL | MT6332_PMIC_RG_IWLED_SLP_DEG_SEL | |||||||||
| Type | W | W | W | - | W | W | W | |||||||||
| Reset | ? | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_IWLED_OC_STATUS | MT6332_PMIC_IWLED_OVP_STATUS | MT6332_PMIC_IWLED_SLP_STATUS | Reserved | MT6332_PMIC_RG_IWLED0_STATUS | MT6332_PMIC_RG_IWLED1_STATUS | Reserved | |||||||||
| Type | R | R | R | - | W | W | - | |||||||||
| Reset | ? | ? | ? | - | ? | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_IWLED1_EN | MT6332_PMIC_RG_IWLED0_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_CL | MT6332_PMIC_RG_IWLED_CS | MT6332_PMIC_RG_IWLED_SLP | MT6332_PMIC_RG_IWLED_RC | MT6332_PMIC_RG_IWLED_CC | MT6332_PMIC_RG_IWLED_SR_NMOS | MT6332_PMIC_RG_IWLED_VRSEL | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_HW_SEL | MT6332_PMIC_RG_IWLED_SS | Reserved | MT6332_PMIC_RG_IWLED_VSL | MT6332_PMIC_RG_IWLED_OVP | MT6332_PMIC_RG_IWLED0_TM | MT6332_PMIC_RG_IWLED1_TM | MT6332_PMIC_RG_IWLED_BSTOFF | MT6332_PMIC_RG_IWLED_PWMDIM | |||||||
| Type | W | W | - | W | W | W | W | W | W | |||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_TRIM | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_TRIM_EN | Reserved | MT6332_PMIC_RG_IWLED_TRIM_SEL | MT6332_PMIC_RG_IWLED_TESTMODE3 | MT6332_PMIC_RG_IWLED_TESTMODE4 | MT6332_PMIC_RG_IWLED_TESTMODE5 | MT6332_PMIC_RG_IWLED_TESTMODE6 | MT6332_PMIC_RG_IWLED_TESTMODE7 | Reserved | |||||||
| Type | W | - | W | W | W | W | W | W | - | |||||||
| Reset | ? | - | ? | ? | ? | ? | ? | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_TESTMODE0 | MT6332_PMIC_RG_IWLED_TESTMODE1 | MT6332_PMIC_RG_IWLED_TESTMODE2 | Reserved | MT6332_PMIC_RG_IWLED_SYNC_CK_SW | MT6332_PMIC_RG_IWLED_CHOP_CK_SW | MT6332_PMIC_RG_IWLED_STEP_SW | |||||||||
| Type | W | W | W | - | W | W | W | |||||||||
| Reset | ? | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_IWLED_RSV | Reserved | MT6332_PMIC_IWLED_COUNT_VALID | |||||||||||||
| Type | W | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_NI_IWLED0_EN | MT6332_PMIC_NI_IWLED1_EN | MT6332_PMIC_NI_IWLED_SYNC_CK | MT6332_PMIC_NI_IWLED_CHOP_CK | MT6332_PMIC_IWLED_STOP | MT6332_PMIC_IWLED_DIV_ZERO | MT6332_PMIC_NI_IWLED_STEP | |||||||||
| Type | R | R | R | R | R | R | R | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_IWLED_COUNT_TOTAL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_IWLED_COUNT_HIGH | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_IWLED_COUNT_LIMITATION | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_IWLED_RSV | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPK_GAINL | Reserved | MT6332_PMIC_SPK_OUT_STAGE_SEL | MT6332_PMIC_SPK_THER_SHDN_L_EN | MT6332_PMIC_SPK_OC_SHDN_DL | Reserved | MT6332_PMIC_SPK_TRIM_EN_L | MT6332_PMIC_SPKMODE_L | Reserved | MT6332_PMIC_SPK_EN_L | |||||
| Type | - | W | - | W | W | W | - | W | W | - | W | |||||
| Reset | - | ? | - | ? | ? | ? | - | ? | ? | - | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SPK_TRIM_DONE_L | MT6332_PMIC_SPK_OFFSET_L_MODE | MT6332_PMIC_SPK_LEAD_L_SW | MT6332_PMIC_SPK_OFFSET_L_SW | MT6332_PMIC_SPK_OFFSET_L_OV | Reserved | ||||||||||
| Type | R | W | W | W | R | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPK_OC_EN_L | MT6332_PMIC_RG_SPKAB_OC_EN_L | MT6332_PMIC_RG_SPK_TEST_EN_L | MT6332_PMIC_RG_SPK_DRC_EN_L | MT6332_PMIC_RG_SPKRCV_EN_L | MT6332_PMIC_RG_SPKAB_OBIAS_L | MT6332_PMIC_RG_SPK_SLEW_L | MT6332_PMIC_RG_SPK_FORCE_EN_L | MT6332_PMIC_RG_SPK_INTG_RST_L | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPK_GAINR | Reserved | MT6332_PMIC_SPK_THER_SHDN_R_EN | MT6332_PMIC_SPK_OC_SHDN_DR | Reserved | MT6332_PMIC_SPK_TRIM_EN_R | MT6332_PMIC_SPKMODE_R | Reserved | MT6332_PMIC_SPK_EN_R | ||||||
| Type | - | W | - | W | W | - | W | W | - | W | ||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SPK_TRIM_DONE_R | MT6332_PMIC_SPK_OFFSET_R_MODE | MT6332_PMIC_SPK_LEAD_R_SW | MT6332_PMIC_SPK_OFFSET_R_SW | MT6332_PMIC_SPK_OFFSET_R_OV | Reserved | ||||||||||
| Type | R | W | W | W | R | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPKPGA_GAINR | MT6332_PMIC_RG_SPK_OC_EN_R | MT6332_PMIC_RG_SPKAB_OC_EN_R | MT6332_PMIC_RG_SPK_TEST_EN_R | MT6332_PMIC_RG_SPK_DRC_EN_R | MT6332_PMIC_RG_SPKRCV_EN_R | MT6332_PMIC_RG_SPKAB_OBIAS_R | MT6332_PMIC_RG_SPK_SLEW_R | MT6332_PMIC_RG_SPK_FORCE_EN_R | MT6332_PMIC_RG_SPK_INTG_RST_R | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SPK_AB_OC_L_DEG | MT6332_PMIC_SPK_D_OC_L_DEG | MT6332_PMIC_SPK_AB_OC_R_DEG | MT6332_PMIC_SPK_D_OC_R_DEG | MT6332_PMIC_SPK_OC_THD | MT6332_PMIC_SPK_OC_WND | Reserved | MT6332_PMIC_SPK_TRIM_THD | Reserved | MT6332_PMIC_SPK_TRIM_WND | ||||||
| Type | R | R | R | R | W | W | - | W | - | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_SPK_TRIM_DIV | MT6332_PMIC_SPK_TD3 | MT6332_PMIC_SPK_TD2 | MT6332_PMIC_SPK_TD1 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_RG_SPK_OCTH_D | MT6332_PMIC_RG_SPKAB_OVDRV | MT6332_PMIC_RG_SPK_FBRC_EN | MT6332_PMIC_RG_SPK_VCM_IBSEL | MT6332_PMIC_RG_SPK_VCM_SEL | MT6332_PMIC_RG_SPK_EN_VIEW_CLK | MT6332_PMIC_RG_SPK_EN_VIEW_VCM | MT6332_PMIC_RG_SPK_CCODE | MT6332_PMIC_RG_SPK_IBIAS_SEL | MT6332_PMIC_RG_BTL_SET | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SPK_TEST_MODE1 | MT6332_PMIC_SPK_TEST_MODE0 | MT6332_PMIC_SPK_VCM_FAST_EN | MT6332_PMIC_SPK_RSV0 | MT6332_PMIC_RG_SPKPGA_GAINL | Reserved | ||||||||||
| Type | W | W | W | W | W | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_SPK_TD_DONE | Reserved | MT6332_PMIC_SPK_TD_WAIT | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_SPK_TRIM_STOP_L_SW | MT6332_PMIC_SPK_TRIM_STOP_R_SW | MT6332_PMIC_SPK_TRIM_EN_L_SW | MT6332_PMIC_SPK_TRIM_EN_R_SW | MT6332_PMIC_SPK_OUTSTG_EN_L_SW | MT6332_PMIC_SPK_OUTSTG_EN_R_SW | MT6332_PMIC_SPK_EN_L_SW | MT6332_PMIC_SPK_EN_R_SW | MT6332_PMIC_SPK_DEPOP_EN_L_SW | MT6332_PMIC_SPK_DEPOP_EN_R_SW | MT6332_PMIC_SPKMODE_L_SW | MT6332_PMIC_SPKMODE_R_SW | MT6332_PMIC_SPK_RST_L_SW | MT6332_PMIC_SPK_RST_R_SW | MT6332_PMIC_SPK_VCM_FAST_SW | MT6332_PMIC_SPK_EN_MODE |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_ISENSE_EN | MT6332_PMIC_RG_SPK_ISENSE_PDRESET | MT6332_PMIC_RG_SPK_ISENSE_GAINSEL | MT6332_PMIC_RG_SPK_ISENSE_REFSEL | MT6332_PMIC_RG_SPK_ISENSE_TEST_EN | Reserved | ||||||||||
| Type | W | W | W | W | W | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_RSV0 | MT6332_PMIC_RG_SPK_RSV1 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_RSV2 | MT6332_PMIC_RG_SPK_ABD_CURSEN_SEL | MT6332_PMIC_RG_SPK_ABD_VOLSEN_EN | MT6332_PMIC_RG_SPK_ABD_VOLSEN_GAIN | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_TRIM1 | MT6332_PMIC_RG_SPK_TRIM2 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_RG_SPK_AB_CURSEN_EN | MT6332_PMIC_RG_SPK_AB_CURSEN_GAIN | MT6332_PMIC_RG_SPK_AB_CURSEN_RSETSEL | MT6332_PMIC_RG_SPK_D_CURSEN_EN | MT6332_PMIC_RG_SPK_D_CURSEN_GAIN | MT6332_PMIC_RG_SPK_D_CURSEN_RSETSEL | ||||||||||
| Type | W | W | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI4 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI5 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI6 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI0_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI1_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI2_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI3_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI4_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI5_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTI6_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTO0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTO1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTO0_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_TESTO1_SEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEBUG_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEBUG_MON | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_DEBUG_BIT_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_FG_GAIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CUR_HTH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | MT6332_PMIC_FG_CUR_LTH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_TOP_RST_STATUS_RSV | MT6332_PMIC_CHRWDT_REG_RSTB_STATUS | MT6332_PMIC_CHRDET_REG_RSTB_STATUS | MT6332_PMIC_UVLO_RSTB_STATUS | MT6332_PMIC_DDLO_RSTB_STATUS | MT6332_PMIC_VPWRIN_RSTB_STATUS | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | MT6332_PMIC_NI_VSRAM_DVFS2_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||