| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VCDT_HV_DET | PMIC_RGS_VCDT_LV_DET | PMIC_RGS_CHRDET | PMIC_RG_CHR_EN | PMIC_RG_CSDAC_EN | PMIC_RG_PCHR_AUTOMODE | PMIC_RGS_CHR_LDO_DET | PMIC_RG_VCDT_HV_EN | |||||||
| Type | - | R | R | R | W | W | W | R | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCDT_HV_VTH | PMIC_RG_VCDT_LV_VTH | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VBAT_CC_DET | PMIC_RGS_VBAT_CV_DET | PMIC_RGS_CS_DET | Reserved | PMIC_RG_CS_EN | PMIC_RG_VBAT_CC_EN | PMIC_RG_VBAT_CV_EN | Reserved | |||||||
| Type | - | R | R | R | - | W | W | W | - | |||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VBAT_CC_VTH | Reserved | PMIC_RG_VBAT_CV_VTH | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CS_VTH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_TOLTC | Reserved | PMIC_RG_PCHR_TOHTC | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VBAT_OV_DET | PMIC_RG_VBAT_OV_DEG | Reserved | PMIC_RG_VBAT_OV_VTH | PMIC_RG_VBAT_OV_EN | ||||||||||
| Type | - | R | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_BATON_UNDET | Reserved | PMIC_RG_BATON_HT_TRIM_SET | PMIC_RG_BATON_HT_TRIM | Reserved | PMIC_BATON_TDET_EN | PMIC_RG_BATON_HT_EN | PMIC_RG_BATON_EN | |||||||
| Type | - | R | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_DATA | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_FRC_CSVTH_USBDL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_OTG_BVALID_DET | PMIC_RG_OTG_BVALID_EN | PMIC_RG_PCHR_FLAG_EN | PMIC_RGS_PCHR_FLAG_OUT | |||||||||||
| Type | - | R | W | W | R | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_FLAG_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_FT_CTRL | Reserved | PMIC_RG_PCHR_RST | PMIC_RG_CSDAC_TESTMODE | PMIC_RG_PCHR_TESTMODE | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CHRWDT_WR | Reserved | PMIC_RG_CHRWDT_EN | PMIC_RG_CHRWDT_TD | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_RV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_CHRWDT_OUT | PMIC_RG_CHRWDT_FLAG_WR | PMIC_RG_CHRWDT_INT_EN | ||||||||||||
| Type | - | R | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ADCIN_VCHR_EN | PMIC_ADCIN_VSEN_EN | PMIC_ADCIN_VBAT_EN | PMIC_RG_ADCIN_VSEN_EXT_BATON_EN | PMIC_ADCIN_VSEN_MUX_EN | Reserved | PMIC_RG_USBDL_SET | PMIC_RG_USBDL_RST | PMIC_RG_UVLO_VTHL | ||||||
| Type | - | W | W | W | W | W | - | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_UNCHOP | PMIC_RG_BGR_UNCHOP_PH | Reserved | PMIC_RG_BGR_RSEL | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_BC11_CMP_OUT | Reserved | PMIC_RG_BC11_VSRC_EN | PMIC_RG_BC11_RST | PMIC_RG_BC11_BB_CTRL | ||||||||||
| Type | - | R | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BC11_BIAS_EN | PMIC_RG_BC11_IPU_EN | PMIC_RG_BC11_IPD_EN | PMIC_RG_BC11_CMP_EN | PMIC_RG_BC11_VREF_VTH | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_STP_DEC | Reserved | PMIC_RG_CSDAC_STP_INC | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_STP | Reserved | PMIC_RG_CSDAC_DLY | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CHRIND_DIMMING | PMIC_RG_CHRIND_ON | PMIC_RG_LOW_ICH_DB | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ULC_DET_EN | PMIC_RG_HWCV_EN | Reserved | PMIC_RG_TRACKING_EN | Reserved | PMIC_RG_CSDAC_MODE | PMIC_RG_VCDT_MODE | PMIC_RG_CV_MODE | |||||||
| Type | - | W | W | - | W | - | W | W | W | |||||||
| Reset | - | ? | ? | - | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ICHRG_TRIM | Reserved | PMIC_RG_BGR_TRIM_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OVP_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_TEST_RSTB | PMIC_RG_BGR_TEST_EN | PMIC_QI_BGR_EXT_BUF_EN | PMIC_RG_CHR_OSC_TRIM | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_DAC_USBDL_MAX | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_THRDET_SEL | PMIC_THR_HWPDN_EN | PMIC_RG_STRUP_THR_SEL | PMIC_RG_THR_TEMP_SEL | PMIC_RG_THR_TMODE | PMIC_THR_DET_DIS | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_STRUP_IREF_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VREF_BG | Reserved | PMIC_RG_RST_DRVSEL | PMIC_RG_EN_DRVSEL | Reserved | PMIC_RG_FCHR_PU_EN | PMIC_RG_FCHR_KEYDET_EN | PMIC_RG_USBDL_EN | |||||||
| Type | - | W | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PMU_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_PMU_THR_STATUS | Reserved | PMIC_PMU_THR_DEB | Reserved | PMIC_THR_TEST | ||||||||||
| Type | - | R | - | R | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_STRUP_DIG_IO_PG_FORCE | Reserved | PMIC_RTC_XOSC32_ENB_SEL | PMIC_RTC_XOSC32_ENB_SW | PMIC_BIAS_GEN_EN_SEL | PMIC_BIAS_GEN_EN | PMIC_STRUP_PWRON_SEL | PMIC_STRUP_PWRON | PMIC_BIAS_GEN_EN_FORCE | PMIC_STRUP_PWRON_FORCE | PMIC_STRUP_FT_CTRL | PMIC_STRUP_OSC_EN_SEL | PMIC_STRUP_OSC_EN | PMIC_PWRBB_DEB_EN | PMIC_DDUVLO_DEB_EN | |
| Type | W | - | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STRUP_CON6_RSV0 | PMIC_VSYS_PG_H2L_EN | PMIC_VPROC_PG_H2L_EN | PMIC_VGP2_PG_ENB | PMIC_VIO28_PG_ENB | PMIC_VA_PG_ENB | PMIC_VTCXO_PG_ENB | PMIC_VIO18_PG_ENB | PMIC_VM_PG_ENB | PMIC_VSYS_PG_ENB | PMIC_VPROC_PG_ENB | ||||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_OSC_EN | PMIC_JUST_PWRKEY_RST | Reserved | PMIC_UVLO_L2H_DEB_EN | PMIC_CLR_JUST_RST | Reserved | ||||||||||
| Type | R | R | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_EXT_PMIC_EN | PMIC_STRUP_CON8_RSV0 | Reserved | PMIC_STRUP_EXT_PMIC_SEL | PMIC_STRUP_EXT_PMIC_EN | |||||||||||
| Type | R | W | - | W | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STRUP_AUXADC_RSTB_SEL | PMIC_STRUP_AUXADC_START_SEL | PMIC_STRUP_AUXADC_RSTB_SW | PMIC_STRUP_AUXADC_START_SW | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STRUP_PWROFF_PREOFF_EN | PMIC_STRUP_PWROFF_SEQ_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_GAINL | Reserved | PMIC_SPK_THER_SHDN_L_EN | PMIC_SPK_OC_SHDN_DL | Reserved | PMIC_SPK_TRIM_EN_L | PMIC_SPKMODE_L | Reserved | PMIC_SPK_EN_L | ||||||
| Type | - | W | - | W | W | - | W | W | - | W | ||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TRIM_DONE_L | PMIC_SPK_OFFSET_L_MODE | PMIC_SPK_LEAD_L_SW | PMIC_SPK_OFFSET_L_SW | PMIC_SPK_OFFSET_L_OV | PMIC_NI_SPK_LEAD_L | PMIC_DA_SPK_LEAD_DGLH_L | PMIC_DA_SPK_OFFSET_L | ||||||||
| Type | R | W | W | W | R | R | R | R | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_OC_EN_L | PMIC_RG_SPKAB_OC_EN_L | PMIC_RG_SPK_TEST_EN_L | PMIC_RG_SPK_DRC_EN_L | PMIC_RG_SPKRCV_EN_L | PMIC_RG_SPKAB_OBIAS_L | PMIC_RG_SPK_SLEW_L | PMIC_RG_SPK_FORCE_EN_L | PMIC_RG_SPK_INTG_RST_L | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_AB_OC_L_DEG | PMIC_SPK_D_OC_L_DEG | Reserved | PMIC_SPK_OC_THD | PMIC_SPK_OC_WND | Reserved | PMIC_SPK_TRIM_THD | Reserved | PMIC_SPK_TRIM_WND | |||||||
| Type | R | R | - | W | W | - | W | - | W | |||||||
| Reset | ? | ? | - | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_SPK_TRIM_DIV | PMIC_SPK_TD3 | PMIC_SPK_TD2 | PMIC_SPK_TD1 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_OCTH_D | PMIC_RG_SPKAB_OVDRV | PMIC_RG_SPK_FBRC_EN | PMIC_RG_SPK_VCM_IBSEL | PMIC_RG_SPK_VCM_SEL | PMIC_RG_SPK_EN_VIEW_CLK | PMIC_RG_SPK_EN_VIEW_VCM | PMIC_RG_SPK_CCODE | PMIC_RG_SPK_IBIAS_SEL | PMIC_RG_BTL_SET | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TEST_MODE1 | PMIC_SPK_TEST_MODE0 | PMIC_SPK_VCM_FAST_EN | PMIC_SPK_RSV0 | PMIC_RG_SPKPGA_GAIN | PMIC_RG_SPK_RSV | ||||||||||
| Type | W | W | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_ISENSE_TEST_EN | PMIC_RG_SPK_ISENSE_EN | PMIC_RG_ISENSE_PD_RESET | Reserved | PMIC_RG_SPK_ISENSE_GAINSEL | Reserved | PMIC_RG_SPK_ISENSE_REFSEL | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_SPK_TD_DONE | Reserved | PMIC_SPK_TD_WAIT | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TRIM_STOP_L_SW | Reserved | PMIC_SPK_TRIM_EN_L_SW | Reserved | PMIC_SPK_OUTSTG_EN_L_SW | Reserved | PMIC_SPK_EN_L_SW | Reserved | PMIC_SPK_DEPOP_EN_L_SW | Reserved | PMIC_SPKMODE_L_SW | Reserved | PMIC_SPK_RST_L_SW | Reserved | PMIC_SPK_VCM_FAST_SW | PMIC_SPK_EN_MODE |
| Type | W | - | W | - | W | - | W | - | W | - | W | - | W | - | W | W |
| Reset | ? | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_CID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_BUCK32K_PDN | PMIC_RG_BUCK_ANA_CK_PDN | PMIC_RG_BUCK_CK_PDN | PMIC_RG_BUCK_1M_CK_PDN | PMIC_RG_DRV_32K_CK_PDN | PMIC_RG_INTRP_CK_PDN | PMIC_RG_LDOSTB_1M_CK_PDN | PMIC_RG_PCHR_32K_CK_PDN | PMIC_RG_RTC_32K_CK_PDN | PMIC_RG_RTC_75K_CK_PDN | PMIC_RG_RTC_75K_DIV4_CK_PDN | PMIC_RG_STRUP_32K_CK_PDN | PMIC_RG_STRUP_75K_CK_PDN | PMIC_RG_CLKSQ_EN_FQR | PMIC_RG_CLKSQ_EN_AUX | PMIC_RG_CLKSQ_EN_AUD |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUXADC_SDM_CK_WAKE_PDN | PMIC_RG_CLKSQ_EN_AUX_MD | PMIC_RG_RTC32K_1V8_PDN | PMIC_RG_EFUSE_CK_PDN | PMIC_RG_SMPS_CK_DIV_PDN | PMIC_RG_RTC_MCLK_PDN | PMIC_RG_ACCDET_CK_PDN | PMIC_RG_AUD_26M_PDN | PMIC_RG_DRV_1M_CK_PDN | PMIC_RG_DRV_2M_CK_PDN | PMIC_RG_FQMTR_PDN | PMIC_RG_PWMOC_CK_PDN | PMIC_RG_SPK_CK_PDN | PMIC_RG_SPK_DIV_PDN | PMIC_RG_SPK_PWM_DIV_PDN | PMIC_RG_STRUP_6M_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUD26M_DIV4_CK_PDN | PMIC_RG_AUXADC_32K_CK_PDN | PMIC_RG_AUXADC_CTL_CK_PDN | PMIC_RG_AUXADC_SDM_CK_PDN | PMIC_RG_ISINK3_CK_PDN | PMIC_RG_ISINK2_CK_PDN | PMIC_RG_ISINK1_CK_PDN | PMIC_RG_ISINK0_CK_PDN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_RST_CON_RSV_15_9 | PMIC_RG_FQMTR_RST | PMIC_RG_RTC_RST | PMIC_RG_DRIVER_RST | PMIC_RG_SPK_RST | PMIC_RG_ACCDET_RST | Reserved | PMIC_RG_AUDIO_RST | PMIC_RG_AUXADC_RST | PMIC_RG_EFUSE_MAN_RST | ||||||
| Type | W | W | W | W | W | W | - | W | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PWRKEY_RST_TD | PMIC_RG_PWRRST_TMR_DIS | PMIC_RG_PWRKEY_RST_EN | PMIC_RG_HOMEKEY_RST_EN | PMIC_RG_RST_PART_SEL | PMIC_RG_NEWLDO_RSTB_EN | PMIC_RG_STRUP_MAN_RST_EN | PMIC_RG_SYSRSTB_EN | PMIC_RG_AP_RST_DIS | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_BUCK_ANA_AUTOFF_DIS | Reserved | PMIC_RG_BUCK_1M_AUTOFF_DIS | PMIC_RG_SMPS_AUTOFF_DIS | PMIC_RG_AUXADC_SDM_CK_HW_MODE | PMIC_RG_OSC_HW_SRC_SEL | PMIC_RG_OSC_HW_MODE | PMIC_RG_SRCLKEN_HW_MODE | PMIC_RG_AUXADC_SDM_SEL_HW_MODE | PMIC_RG_OSC_SEL | Reserved | PMIC_RG_SRCLKEN_EN | ||||
| Type | W | - | W | W | W | W | W | W | W | W | - | W | ||||
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDIO_CK_SEL | PMIC_RG_AUXADC_SDM_CK_SEL | PMIC_RG_ISINK3_CK_SEL | PMIC_RG_ISINK2_CK_SEL | PMIC_RG_ISINK1_CK_SEL | PMIC_RG_ISINK0_CK_SEL | PMIC_RG_ACCDET_CKSEL | PMIC_RG_FQMTR_CKSEL | PMIC_RG_SPK_DIV_SEL | PMIC_RG_SPK_PWM_DIV_SEL | PMIC_RG_REGCK_SEL | |||||
| Type | W | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUD26M_TST_DIS | PMIC_RG_PMU75K_TST_DIS | PMIC_RG_SMPS_TST_DIS | PMIC_RG_SPK_TST_DIS | PMIC_RG_RTC32K_TST_DIS | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDIF_TSTSEL | PMIC_RG_AUD26M_DIV4_TSTSEL | PMIC_RG_AUXADC_SDM_TSTSEL | PMIC_RG_CLASSD_TSTSEL | PMIC_RG_FQMTR_TSTSEL | PMIC_RG_ISINK_TSTSEL | PMIC_RG_LDOSTB_TSTSEL | PMIC_RG_PWMOC_TSTSEL | PMIC_RG_RTCDET_TSTSEL | PMIC_RG_AUD26M_TSTSEL | PMIC_RG_PMU75K_TSTSEL | PMIC_RG_RTC32K_TSTSEL | PMIC_RG_SMPS_TSTSEL | PMIC_RG_SPK_TSTSEL | |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_CKTST2_RSV_15_8 | Reserved | PMIC_RG_BGR_TESTMODE | PMIC_RG_STRUP_75K_26M_SEL | PMIC_RG_PCHR_TEST_CK_SEL | PMIC_RG_BGR_TEST_CK_SEL | ||||||||||
| Type | W | - | W | W | W | W | ||||||||||
| Reset | ? | - | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_TEST_OUT | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_MON_GRP_SEL | PMIC_RG_MON_FLAG_SEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_TEST_SPK_PWM | PMIC_RG_TEST_SPK | PMIC_RG_TEST_STRUP | PMIC_RG_EFUSE_MODE | PMIC_RG_NANDTREE_MODE | PMIC_RG_TEST_AUXADC | Reserved | PMIC_RG_TEST_AUD | Reserved | PMIC_RG_TEST_CLASSD | PMIC_RG_TEST_DRIVER | Reserved | |||
| Type | - | W | W | W | W | W | W | - | W | - | W | W | - | |||
| Reset | - | ? | ? | ? | ? | ? | ? | - | ? | - | ? | ? | - | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_EN_STATUS_VGP3 | PMIC_EN_STATUS_VGP2 | PMIC_EN_STATUS_VGP1 | PMIC_EN_STATUS_VEMC_3V3 | PMIC_EN_STATUS_VCN_1V8 | PMIC_EN_STATUS_VCN33 | PMIC_EN_STATUS_VCN28 | PMIC_EN_STATUS_VCAM_IO | PMIC_EN_STATUS_VCAM_AF | PMIC_EN_STATUS_VCAMD | PMIC_EN_STATUS_VCAMA | PMIC_EN_STATUS_VA | PMIC_EN_STATUS_VRTC | PMIC_EN_STATUS_VPA | PMIC_EN_STATUS_VSYS | PMIC_EN_STATUS_VPROC |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EN_STATUS_VUSB | PMIC_EN_STATUS_VTCXO | PMIC_EN_STATUS_VSIM2 | PMIC_EN_STATUS_VSIM1 | PMIC_EN_STATUS_VRF18 | PMIC_EN_STATUS_VMCH | PMIC_EN_STATUS_VMC | PMIC_EN_STATUS_VM | PMIC_EN_STATUS_VIO28 | PMIC_EN_STATUS_VIO18 | PMIC_EN_STATUS_VIBR | ||||
| Type | - | R | R | R | R | R | R | R | R | R | R | R | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_OC_STATUS_VGP3 | PMIC_OC_STATUS_VGP2 | PMIC_OC_STATUS_VGP1 | PMIC_OC_STATUS_VEMC_3V3 | PMIC_OC_STATUS_VCN_1V8 | PMIC_OC_STATUS_VCN33 | PMIC_OC_STATUS_VCN28 | PMIC_OC_STATUS_VCAM_IO | PMIC_OC_STATUS_VCAM_AF | PMIC_OC_STATUS_VCAMD | PMIC_OC_STATUS_VCAMA | PMIC_OC_STATUS_VA | Reserved | PMIC_OC_STATUS_VPA | PMIC_OC_STATUS_VSYS | PMIC_OC_STATUS_VPROC |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | - | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_SPK_OC_DET_AB_L | PMIC_NI_SPK_OC_DET_D_L | PMIC_OC_STATUS_VUSB | PMIC_OC_STATUS_VTCXO | PMIC_OC_STATUS_VSIM2 | PMIC_OC_STATUS_VSIM1 | PMIC_OC_STATUS_VRF18 | PMIC_OC_STATUS_VMCH | PMIC_OC_STATUS_VMC | PMIC_OC_STATUS_VM | PMIC_OC_STATUS_VIO28 | PMIC_OC_STATUS_VIO18 | PMIC_OC_STATUS_VIBR | ||
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VGP2_PG_DEB | PMIC_VIO28_PG_DEB | PMIC_VA_PG_DEB | PMIC_VTCXO_PG_DEB | PMIC_VIO18_PG_DEB | PMIC_VM_PG_DEB | PMIC_VSYS_PG_DEB | PMIC_VPROC_PG_DEB | |||||||
| Type | - | R | R | R | R | R | R | R | R | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RTC_XTAL_DET_RSV | PMIC_XOSC32_ENB_DET | PMIC_RTC_XTAL_DET_DONE | PMIC_RO_BATON_UNDET | PMIC_PCHR_CHRDET | PMIC_VBAT_OV | PMIC_FCHRKEY_DEB | PMIC_PWRKEY_DEB | PMIC_PMU_TEST_MODE_SCAN | ||||||
| Type | - | W | R | R | R | R | R | R | R | R | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS_TDSEL | PMIC_RG_PMU_TDSEL | PMIC_RG_SPI_TDSEL | PMIC_RG_AUD_TDSEL | PMIC_RG_SIMAP_TDSEL | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS_RDSEL | PMIC_RG_PMU_RDSEL | PMIC_RG_SPI_RDSEL | PMIC_RG_AUD_RDSEL | PMIC_RG_SIMAP_RDSEL | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SMT_RTC_32K1V8 | PMIC_RG_SMT_SRCLKEN | PMIC_RG_SMT_INT | PMIC_RG_SMT_SYSRSTB | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SMT_SPI_MISO | PMIC_RG_SMT_SPI_MOSI | PMIC_RG_SMT_SPI_CSN | PMIC_RG_SMT_SPI_CLK | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SMT_AUD_MISO | PMIC_RG_SMT_AUD_MOSI | PMIC_RG_SMT_AUD_CLK | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SMT_SIMLS1_SRST | PMIC_RG_SMT_SIMLS1_SCLK | PMIC_RG_SMT_SIM1_AP_SRST | PMIC_RG_SMT_SIM1_AP_SCLK | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SMT_SIMLS2_SRST | PMIC_RG_SMT_SIMLS2_SCLK | PMIC_RG_SMT_SIM2_AP_SRST | PMIC_RG_SMT_SIM2_AP_SCLK | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OCTL_RTC_32K1V8 | PMIC_RG_OCTL_SRCLKEN | PMIC_RG_OCTL_INT | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SPI_MISO | PMIC_RG_OCTL_SPI_MOSI | PMIC_RG_OCTL_SPI_CSN | PMIC_RG_OCTL_SPI_CLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OCTL_AUD_MISO | PMIC_RG_OCTL_AUD_MOSI | PMIC_RG_OCTL_AUD_CLK | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SIMLS1_SRST | PMIC_RG_OCTL_SIMLS1_SCLK | PMIC_RG_OCTL_SIM1_AP_SRST | PMIC_RG_OCTL_SIM1_AP_SCLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SIMLS2_SRST | PMIC_RG_OCTL_SIMLS2_SCLK | PMIC_RG_OCTL_SIM2_AP_SRST | PMIC_RG_OCTL_SIM2_AP_SCLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS1_SRST_CONF | PMIC_RG_SIMLS1_SCLK_CONF | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS2_SRST_CONF | PMIC_RG_SIMLS2_SCLK_CONF | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_INT_EN_OV | PMIC_RG_INT_EN_CHRDET | PMIC_RG_INT_EN_BVALID_DET | PMIC_RG_INT_EN_VBATON_UNDET | PMIC_RG_INT_EN_THR_H | PMIC_RG_INT_EN_THR_L | PMIC_RG_INT_EN_PWRKEY | PMIC_RG_INT_EN_WATCHDOG | PMIC_RG_INT_EN_BAT_H | PMIC_RG_INT_EN_BAT_L | PMIC_RG_INT_EN_SPKL | PMIC_RG_INT_EN_SPKL_AB | |||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_INT_EN_VPA | PMIC_RG_INT_EN_VSYS | PMIC_RG_INT_EN_VPROC | PMIC_RG_INT_EN_RTC | PMIC_RG_INT_EN_AUDIO | PMIC_RG_INT_EN_ACCDET | PMIC_RG_INT_EN_FCHRKEY | PMIC_RG_INT_EN_LDO | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_IVGEN_EXT_EN | Reserved | PMIC_RG_PWRKEY_INT_SEL | PMIC_RG_FCHRKEY_INT_SEL | PMIC_POLARITY_BVALID_DET | PMIC_POLARITY_VBATON_UNDET | PMIC_POLARITY | ||||||||
| Type | - | W | - | W | W | W | W | W | ||||||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | |||||||||||||||
| Type | - | |||||||||||||||
| Reset | - | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_INT_STATUS_OV | PMIC_RG_INT_STATUS_CHRDET | PMIC_RG_INT_STATUS_BVALID_DET | PMIC_RG_INT_STATUS_VBATON_UNDET | PMIC_RG_INT_STATUS_THR_H | PMIC_RG_INT_STATUS_THR_L | PMIC_RG_INT_STATUS_PWRKEY | PMIC_RG_INT_STATUS_WATCHDOG | PMIC_RG_INT_STATUS_BAT_H | PMIC_RG_INT_STATUS_BAT_L | PMIC_RG_INT_STATUS_SPKL | PMIC_RG_INT_STATUS_SPKL_AB | |||
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_INT_STATUS_VPA | PMIC_RG_INT_STATUS_VSYS | PMIC_RG_INT_STATUS_VPROC | PMIC_RG_INT_STATUS_RTC | PMIC_RG_INT_STATUS_AUDIO | PMIC_RG_INT_STATUS_ACCDET | PMIC_RG_INT_STATUS_FCHRKEY | PMIC_RG_INT_STATUS_LDO | |||||||
| Type | - | R | R | R | R | R | R | R | R | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_OC_GEAR_BVALID_DET | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_OC_GEAR_VBATON_UNDET | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_OC_GEAR_LDO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_DEG_EN | PMIC_VPROC_OC_WND | PMIC_VPROC_OC_THD | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSYS_DEG_EN | PMIC_VSYS_OC_WND | PMIC_VSYS_OC_THD | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_DEG_EN | PMIC_VPA_OC_WND | PMIC_VPA_OC_THD | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_EN | Reserved | PMIC_FQMTR_BUSY | PMIC_FQMTR_TCKSEL | ||||||||||||
| Type | W | - | R | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_WINSET | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_DATA | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPI_CON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_DIO_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_DEW_READ_TEST | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_DEW_WRITE_TEST | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CRC_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CRC_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CRC_VAL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_DBG_MON_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_KEY_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_IV_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_RDY | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_MODE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_CIPHER_SWRST | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_RDDMY_NO | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DEW_RDATA_DLY_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SMPS_TESTMODE_B | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSYS_DIG_MON | PMIC_QI_VPROC_DIG_MON | |||||||||||||
| Type | - | R | R | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VSLEEP_SRC1 | Reserved | PMIC_VSLEEP_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_R2R_SRC1 | Reserved | PMIC_R2R_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SRCLKEN_DLY_SRC1 | Reserved | PMIC_BUCK_OSC_SEL_SRC0 | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_BUCK_CON5_RSV0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_ZXOS_TRIM | PMIC_RG_VPROC_CSM | PMIC_RG_VPROC_TRIMH | PMIC_RG_VPROC_TRIML | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPROC_ZX_OS | Reserved | PMIC_RG_VPROC_CSL | PMIC_RG_VPROC_CSR | PMIC_RG_VPROC_CC | Reserved | PMIC_RG_VPROC_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_NDIS_EN | PMIC_RG_VPROC_MODESET | Reserved | PMIC_RG_VPROC_AVP_EN | PMIC_RG_VPROC_AVP_OS | ||||||||||
| Type | - | W | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_VSLEEP | Reserved | PMIC_RG_VPROC_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_BURST_CTRL | PMIC_VPROC_DLC_CTRL | PMIC_VPROC_VOSEL_CTRL | PMIC_VPROC_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VPROC_OC_STATUS | Reserved | PMIC_QI_VPROC_EN | PMIC_QI_VPROC_STB | Reserved | PMIC_VPROC_EN | ||||||||||
| Type | R | - | R | R | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VPROC_SFCHG_REN | PMIC_VPROC_SFCHG_RRATE | PMIC_VPROC_SFCHG_FEN | PMIC_VPROC_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VPROC_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_BURST | Reserved | PMIC_VPROC_BURST_SLEEP | Reserved | PMIC_VPROC_BURST_ON | Reserved | PMIC_VPROC_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_DLC | Reserved | PMIC_VPROC_DLC_SLEEP | Reserved | PMIC_VPROC_DLC_ON | Reserved | PMIC_VPROC_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_DLC_N | Reserved | PMIC_VPROC_DLC_N_SLEEP | Reserved | PMIC_VPROC_DLC_N_ON | Reserved | PMIC_VPROC_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VPROC_VSLEEP_SEL | PMIC_NI_VPROC_R2R_PDN | Reserved | PMIC_VPROC_VSLEEP_SEL | PMIC_VPROC_R2R_PDN | Reserved | PMIC_VPROC_VSLEEP_EN | PMIC_NI_VPROC_VOSEL_TRANS | PMIC_VPROC_VOSEL_TRANS_ONCE | PMIC_VPROC_VOSEL_TRANS_EN | Reserved | PMIC_VPROC_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSYS_ZXOS_TRIM | PMIC_RG_VSYS_CSM | PMIC_RG_VSYS_TRIMH | PMIC_RG_VSYS_TRIML | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSYS_ZX_OS | Reserved | PMIC_RG_VSYS_CSL | PMIC_RG_VSYS_CSR | PMIC_RG_VSYS_CC | Reserved | PMIC_RG_VSYS_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSYS_NDIS_EN | PMIC_RG_VSYS_MODESET | Reserved | PMIC_RG_VSYS_AVP_EN | PMIC_RG_VSYS_AVP_OS | ||||||||||
| Type | - | W | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSYS_VSLEEP | Reserved | PMIC_RG_VSYS_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSYS_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSYS_BURST_CTRL | PMIC_VSYS_DLC_CTRL | PMIC_VSYS_VOSEL_CTRL | PMIC_VSYS_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VSYS_OC_STATUS | Reserved | PMIC_QI_VSYS_EN | PMIC_QI_VSYS_STB | Reserved | PMIC_VSYS_EN | ||||||||||
| Type | R | - | R | R | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VSYS_SFCHG_REN | PMIC_VSYS_SFCHG_RRATE | PMIC_VSYS_SFCHG_FEN | PMIC_VSYS_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSYS_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSYS_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSYS_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VSYS_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSYS_BURST | Reserved | PMIC_VSYS_BURST_SLEEP | Reserved | PMIC_VSYS_BURST_ON | Reserved | PMIC_VSYS_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSYS_DLC | Reserved | PMIC_VSYS_DLC_SLEEP | Reserved | PMIC_VSYS_DLC_ON | Reserved | PMIC_VSYS_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSYS_DLC_N | Reserved | PMIC_VSYS_DLC_N_SLEEP | Reserved | PMIC_VSYS_DLC_N_ON | Reserved | PMIC_VSYS_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VSYS_VSLEEP_SEL | PMIC_NI_VSYS_R2R_PDN | Reserved | PMIC_VSYS_VSLEEP_SEL | PMIC_VSYS_R2R_PDN | Reserved | PMIC_VSYS_VSLEEP_EN | PMIC_NI_VSYS_VOSEL_TRANS | PMIC_VSYS_VOSEL_TRANS_ONCE | PMIC_VSYS_VOSEL_TRANS_EN | Reserved | PMIC_VSYS_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPA_TRIMH | PMIC_RG_VPA_TRIML | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_ZX_OS | PMIC_RG_VPA_SLEW | PMIC_RG_VPA_SLEW_NMOS | PMIC_RG_VPA_CSL | PMIC_RG_VPA_CSR | PMIC_RG_VPA_CC | Reserved | PMIC_RG_VPA_RZSEL | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_VBAT_DEL | PMIC_RG_VPA_CSMIR | Reserved | PMIC_RG_VPA_NDIS_EN | PMIC_RG_VPA_MODESET | Reserved | ||||||||||
| Type | W | W | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPA_GPU_EN | Reserved | PMIC_RG_VPA_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_RSV | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_BURST_CTRL | PMIC_VPA_DLC_CTRL | PMIC_VPA_VOSEL_CTRL | PMIC_VPA_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VPA_OC_STATUS | Reserved | PMIC_QI_VPA_EN | PMIC_QI_VPA_STB | Reserved | PMIC_VPA_EN | ||||||||||
| Type | R | - | R | R | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VPA_SFCHG_REN | PMIC_VPA_SFCHG_RRATE | PMIC_VPA_SFCHG_FEN | PMIC_VPA_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VPA_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_DLC | Reserved | PMIC_VPA_DLC_SLEEP | Reserved | PMIC_VPA_DLC_ON | Reserved | PMIC_VPA_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_BURSTH | Reserved | PMIC_VPA_BURSTH_SLEEP | Reserved | PMIC_VPA_BURSTH_ON | Reserved | PMIC_VPA_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_BURSTL | Reserved | PMIC_VPA_BURSTL_SLEEP | Reserved | PMIC_VPA_BURSTL_ON | Reserved | PMIC_VPA_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VPA_DVS_BW | PMIC_VPA_VOSEL_TRANS_ONCE | PMIC_VPA_VOSEL_TRANS_EN | Reserved | PMIC_VPA_TRANSTD | ||||||||||
| Type | - | R | W | W | - | W | ||||||||||
| Reset | - | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_DLC001 | Reserved | PMIC_VPA_DLC_MAP_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_DLC111 | Reserved | PMIC_VPA_VOSEL_DLC011 | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_K_INV | PMIC_K_AUTO_EN | PMIC_K_SRC_SEL | PMIC_K_START_MANUAL | PMIC_K_ONCE | PMIC_K_ONCE_EN | PMIC_K_MAP_SEL | PMIC_K_RST_DONE | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_K_CONTROL_SMPS | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_SMPS_OSC_CAL | PMIC_K_CONTROL | Reserved | PMIC_K_DONE | PMIC_K_RESULT | ||||||||||
| Type | - | R | R | - | R | R | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK0_RSV0 | PMIC_ISINK_DIM0_DUTY | PMIC_ISINK0_RSV1 | PMIC_ISINK_CH0_MODE | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_DIM0_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_CH0_STEP | Reserved | PMIC_ISINK_SFSTR0_TC | PMIC_ISINK_SFSTR0_EN | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_BREATH0_TRF_SEL | PMIC_ISINK_BREATH0_TON_SEL | Reserved | PMIC_ISINK_BREATH0_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK1_RSV0 | PMIC_ISINK_DIM1_DUTY | PMIC_ISINK1_RSV1 | PMIC_ISINK_CH1_MODE | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_DIM1_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_CH1_STEP | Reserved | PMIC_ISINK_SFSTR1_TC | PMIC_ISINK_SFSTR1_EN | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_BREATH1_TRF_SEL | PMIC_ISINK_BREATH1_TON_SEL | Reserved | PMIC_ISINK_BREATH1_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK2_RSV0 | PMIC_ISINK_DIM2_DUTY | PMIC_ISINK2_RSV1 | PMIC_ISINK_CH2_MODE | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_DIM2_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_CH2_STEP | Reserved | PMIC_ISINK_SFSTR2_TC | PMIC_ISINK_SFSTR2_EN | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_BREATH2_TRF_SEL | PMIC_ISINK_BREATH2_TON_SEL | Reserved | PMIC_ISINK_BREATH2_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK3_RSV0 | PMIC_ISINK_DIM3_DUTY | PMIC_ISINK3_RSV1 | PMIC_ISINK_CH3_MODE | Reserved | |||||||||||
| Type | W | W | W | W | - | |||||||||||
| Reset | ? | ? | ? | ? | - | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_DIM3_FSEL | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_CH3_STEP | Reserved | PMIC_ISINK_SFSTR3_TC | PMIC_ISINK_SFSTR3_EN | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_BREATH3_TRF_SEL | PMIC_ISINK_BREATH3_TON_SEL | Reserved | PMIC_ISINK_BREATH3_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TRIM_EN | PMIC_RG_TRIM_SEL | PMIC_RG_ISINK0_DOUBLE_EN | PMIC_RG_ISINK1_DOUBLE_EN | PMIC_RG_ISINK2_DOUBLE_EN | PMIC_RG_ISINK3_DOUBLE_EN | PMIC_RG_ISINKS_RSV | |||||||||
| Type | W | W | W | W | W | W | W | |||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_ISINK0_STATUS | PMIC_NI_ISINK1_STATUS | PMIC_NI_ISINK2_STATUS | PMIC_NI_ISINK3_STATUS | |||||||||||
| Type | - | R | R | R | R | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_PHASE_DLY_TC | PMIC_ISINK_PHASE3_DLY_EN | PMIC_ISINK_PHASE2_DLY_EN | PMIC_ISINK_PHASE1_DLY_EN | PMIC_ISINK_PHASE0_DLY_EN | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINK_CHOP3_EN | PMIC_ISINK_CHOP2_EN | PMIC_ISINK_CHOP1_EN | PMIC_ISINK_CHOP0_EN | PMIC_ISINK_CH3_EN | PMIC_ISINK_CH2_EN | PMIC_ISINK_CH1_EN | PMIC_ISINK_CH0_EN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ANALDORSV1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VTCXO_EN | Reserved | PMIC_VTCXO_ON_CTRL | PMIC_RG_VTCXO_EN | PMIC_RG_VTCXO_STBTD | PMIC_QI_VTCXO_MODE | Reserved | PMIC_VTCXO_LP_SET | PMIC_VTCXO_LP_SEL | |||||||
| Type | R | - | W | W | W | R | - | W | W | |||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VA_EN | PMIC_RG_VA_EN | PMIC_RG_VA_STBTD | Reserved | PMIC_RG_VA_SENSE_SEL | PMIC_QI_VA_MODE | Reserved | PMIC_VA_LP_SET | PMIC_VA_LP_SEL | |||||||
| Type | R | W | W | - | W | R | - | W | W | |||||||
| Reset | ? | ? | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ANALDORSV2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VCAMA_EN | Reserved | PMIC_RG_VCAMA_STBTD | Reserved | ||||||||||||
| Type | W | - | W | - | ||||||||||||
| Reset | ? | - | ? | - | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VTCXO_OC_STATUS | Reserved | PMIC_QI_VA_OC_STATUS | Reserved | PMIC_QI_VCAMA_OC_STATUS | Reserved | PMIC_RG_VTCXO_BIST_EN | Reserved | PMIC_RG_VA_BIST_EN | Reserved | PMIC_RG_VCAMA_BIST_EN | ||||
| Type | - | R | - | R | - | R | - | W | - | W | - | W | ||||
| Reset | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ANALDORSV3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VTCXO_CAL | Reserved | PMIC_RG_VTCXO_OCFB | Reserved | PMIC_RG_VTCXO_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VA_CAL | Reserved | PMIC_RG_VA_VOSEL | Reserved | PMIC_RG_VA_OCFB | Reserved | PMIC_RG_VA_NDIS_EN | Reserved | |||||||
| Type | - | W | - | W | - | W | - | W | - | |||||||
| Reset | - | ? | - | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCAMA_CAL | PMIC_VCAMA_ON_CTRL | PMIC_RG_VCAMA_VOSEL | PMIC_RG_VCAMA_STB_SEL | PMIC_RG_VCAMA_OCFB | PMIC_RG_VCAMA_NDIS_EN | PMIC_RG_VCAMA_FBSEL | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ALDO_RESERVE | Reserved | PMIC_RG_RESERVE_STB_SEL | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCN33_CAL | Reserved | PMIC_RG_VCN33_EN_BT | PMIC_RG_VCN33_OCFB | PMIC_VCN33_ON_CTRL_BT | PMIC_RG_VCN33_NDIS_EN | PMIC_RG_VCN33_VOSEL | Reserved | |||||||
| Type | - | W | - | W | W | W | W | W | - | |||||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCN33_EN | PMIC_VCN33_ON_CTRL_WIFI | Reserved | PMIC_RG_VCN33_EN_WIFI | Reserved | PMIC_RG_VCN33_STBTD | Reserved | |||||||||
| Type | R | W | - | W | - | W | - | |||||||||
| Reset | ? | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCN28_CAL | Reserved | PMIC_RG_VCN28_VOSEL | Reserved | PMIC_RG_VCN28_OCFB | Reserved | PMIC_RG_VCN28_NDIS_EN | PMIC_RG_VCN28_BIST_EN | Reserved | ||||||
| Type | - | W | - | W | - | W | - | W | W | - | ||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ? | - | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCN28_EN | PMIC_VCN28_ON_CTRL | Reserved | PMIC_RG_VCN28_EN | Reserved | PMIC_RG_VCN28_STBTD | Reserved | |||||||||
| Type | R | W | - | W | - | W | - | |||||||||
| Reset | ? | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCN28_OC_STATUS | Reserved | PMIC_QI_VCN28_MODE | Reserved | PMIC_VCN28_LP_SET | PMIC_VCN28_LP_SEL | ||||||||||
| Type | R | - | R | - | W | W | ||||||||||
| Reset | ? | - | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCN33_OC_STATUS | PMIC_RG_VCN33_BIST_EN | Reserved | PMIC_RG_VCN33_EN | Reserved | PMIC_QI_VCN33_MODE | Reserved | PMIC_VCN33_LP_SET | PMIC_VCN33_LP_SEL | |||||||
| Type | R | W | - | W | - | R | - | W | W | |||||||
| Reset | ? | ? | - | ? | - | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO28_EN | PMIC_VIO28_EN | PMIC_RG_VIO28_STBTD | Reserved | PMIC_QI_VIO28_MODE | Reserved | PMIC_VIO28_LP_MODE_SET | PMIC_VIO28_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VUSB_EN | PMIC_RG_VUSB_EN | PMIC_RG_VUSB_STBTD | Reserved | PMIC_QI_VUSB_MODE | Reserved | PMIC_VUSB_LP_MODE_SET | PMIC_VUSB_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VMC_EN | PMIC_RG_VMC_INT_DIS_SEL | Reserved | PMIC_RG_VMC_EN | Reserved | PMIC_RG_VMC_STBTD | PMIC_QI_VMC_MODE | Reserved | PMIC_RG_STB_SEL | PMIC_VMC_LP_MODE_SET | PMIC_VMC_LP_SEL | |||||
| Type | R | W | - | W | - | W | R | - | W | W | W | |||||
| Reset | ? | ? | - | ? | - | ? | ? | - | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VMCH_EN | PMIC_RG_VMCH_EN | PMIC_RG_VMCH_STBTD | Reserved | PMIC_QI_VMCH_MODE | Reserved | PMIC_VMCH_LP_MODE_SET | PMIC_VMCH_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VEMC_3V3_EN | PMIC_RG_VEMC_3V3_EN | PMIC_RG_VEMC_3V3_STBTD | Reserved | PMIC_QI_VEMC_3V3_MODE | Reserved | PMIC_VEMC_3V3_LP_MODE_SET | PMIC_VEMC_3V3_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP1_EN | Reserved | PMIC_RG_VGP1_STBTD | Reserved | PMIC_QI_VGP1_MODE | Reserved | PMIC_VGP1_LP_MODE_SET | PMIC_VGP1_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP2_EN | Reserved | PMIC_RG_VGP2_STBTD | Reserved | PMIC_QI_VGP2_MODE | Reserved | PMIC_VGP2_LP_MODE_SET | PMIC_VGP2_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP3_EN | Reserved | PMIC_RG_VGP3_STBTD | Reserved | PMIC_QI_VGP3_MODE | Reserved | PMIC_VGP3_LP_MODE_SET | PMIC_VGP3_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCN_1V8_CAL | Reserved | PMIC_RG_VCN_1V8_STB_SEL | Reserved | PMIC_RG_VCN_1V8_OCFB | PMIC_VCN_1V8_ON_CTRL | PMIC_RG_VCN_1V8_NDIS_EN | ||||||||
| Type | - | W | - | W | - | W | W | W | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCN_1V8_EN | PMIC_RG_VCN_1V8_EN | PMIC_RG_VCN_1V8_STBTD | Reserved | PMIC_QI_VCN_1V8_MODE | Reserved | PMIC_VCN_1V8_LP_MODE_SET | PMIC_VCN_1V8_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RE_DIGLDORSV1 | PMIC_RG_STB_SIM1_SIO | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSIM1_EN | Reserved | PMIC_RG_VSIM1_STBTD | Reserved | PMIC_QI_VSIM1_MODE | Reserved | PMIC_VSIM1_LP_MODE_SET | PMIC_VSIM1_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSIM2_EN | Reserved | PMIC_RG_VSIM2_STBTD | Reserved | PMIC_QI_VSIM2_MODE | Reserved | PMIC_VSIM2_THER_SHDN_EN | PMIC_VSIM2_LP_MODE_SET | PMIC_VSIM2_LP_SEL | |||||||
| Type | W | - | W | - | R | - | W | W | W | |||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRTC_EN | Reserved | PMIC_VRTC_EN | Reserved | PMIC_RG_VRTC_FORCE_ON | |||||||||||
| Type | R | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VIO28_BIST_EN | Reserved | PMIC_RG_VUSB_BIST_EN | PMIC_RG_VMC_BIST_EN | Reserved | PMIC_RG_VMCH_BIST_EN | Reserved | PMIC_RG_VEMC_3V3_BIST_EN | Reserved | |||||||
| Type | W | - | W | W | - | W | - | W | - | |||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP1_BIST_EN | PMIC_RG_VGP2_BIST_EN | Reserved | PMIC_RG_VGP3_BIST_EN | Reserved | PMIC_RG_VIBR_BIST_EN | Reserved | PMIC_RG_VSIM1_BIST_EN | PMIC_RG_VSIM2_BIST_EN | Reserved | PMIC_RG_VRTC_BIST_EN | |||||
| Type | W | W | - | W | - | W | - | W | W | - | W | |||||
| Reset | ? | ? | - | ? | - | ? | - | ? | ? | - | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO28_OC_STATUS | Reserved | PMIC_QI_VUSB_OC_STATUS | PMIC_QI_VMC_OC_STATUS | Reserved | PMIC_QI_VMCH_OC_STATUS | Reserved | PMIC_QI_VEMC_3V3_OC_STATUS | Reserved | |||||||
| Type | R | - | R | R | - | R | - | R | - | |||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VGP1_OC_STATUS | PMIC_QI_VGP2_OC_STATUS | Reserved | PMIC_QI_VGP3_OC_STATUS | Reserved | PMIC_QI_VIBR_OC_STATUS | Reserved | PMIC_QI_VSIM1_OC_STATUS | PMIC_QI_VSIM2_OC_STATUS | Reserved | ||||||
| Type | R | R | - | R | - | R | - | R | R | - | ||||||
| Reset | ? | ? | - | ? | - | ? | - | ? | ? | - | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RE_DIGLDORSV2 | PMIC_RG_STB_SIM2_SIO | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO28_CAL | Reserved | PMIC_RG_VIO28_OCFB | Reserved | PMIC_RG_VIO28_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VUSB_CAL | Reserved | PMIC_RG_VUSB_OCFB | Reserved | PMIC_RG_VUSB_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VMC_CAL | PMIC_RG_VMC_STB_SEL_CAL | PMIC_RG_VMC_STB_SEL | Reserved | PMIC_RG_VMC_VOSEL | Reserved | PMIC_RG_VMC_OCFB | PMIC_VMC_ON_CTRL | PMIC_RG_VMC_NDIS_EN | ||||||
| Type | - | W | W | W | - | W | - | W | W | W | ||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VMCH_CAL | PMIC_RG_VMCH_STB_SEL_CAL | PMIC_RG_VMCH_VOSEL | PMIC_RG_VMCH_STB_SEL | Reserved | PMIC_RG_VMCH_DB_EN | Reserved | PMIC_RG_VMCH_OCFB | PMIC_VMCH_ON_CTRL | PMIC_RG_VMCH_NDIS_EN | |||||
| Type | - | W | W | W | W | - | W | - | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | - | ? | - | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VEMC_3V3_CAL | PMIC_RG_VEMC_3V3_STB_SEL_CAL | PMIC_RG_VEMC_3V3_VOSEL | PMIC_RG_VEMC_3V3_STB_SEL | Reserved | PMIC_RG_VEMC_3V3_DB_EN | PMIC_RG_VEMC_3V3_DL_EN | PMIC_RG_VEMC_3V3_OCFB | PMIC_VEMC_3V3_ON_CTRL | PMIC_RG_VEMC_3V3_NDIS_EN | |||||
| Type | - | W | W | W | W | - | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP1_CAL | PMIC_RG_VGP1_VOSEL | PMIC_RG_VGP1_STB_SEL | Reserved | PMIC_RG_VGP1_OCFB | Reserved | PMIC_RG_VGP1_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP2_CAL | PMIC_RG_VGP2_VOSEL | PMIC_RG_VGP2_STB_SEL | Reserved | PMIC_RG_VGP2_OCFB | Reserved | PMIC_RG_VGP2_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP3_CAL | Reserved | PMIC_RG_VGP3_VOSEL | PMIC_RG_VGP3_STB_SEL | Reserved | PMIC_RG_VGP3_OCFB | Reserved | PMIC_RG_VGP3_NDIS_EN | |||||||
| Type | - | W | - | W | W | - | W | - | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VCAM_AF_EN | Reserved | PMIC_RG_VCAM_AF_STBTD | Reserved | PMIC_QI_VCAM_AF_MODE | Reserved | PMIC_VCAM_AF_LP_MODE_SET | PMIC_VCAM_AF_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCAM_AF_CAL | Reserved | PMIC_RG_VCAM_AF_VOSEL | PMIC_RG_VCAM_AF_STB_SEL | PMIC_VCAM_AF_ON_CTRL | PMIC_RG_VCAM_AF_OCFB | Reserved | PMIC_RG_VCAM_AF_NDIS_EN | |||||||
| Type | - | W | - | W | W | W | W | - | W | |||||||
| Reset | - | ? | - | ? | ? | ? | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RE_DIGLDORSV3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSIM1_CAL | Reserved | PMIC_RG_VSIM1_VOSEL | PMIC_RG_VSIM1_STB_SEL | Reserved | PMIC_RG_VSIM1_OCFB | Reserved | PMIC_RG_VSIM1_NDIS_EN | |||||||
| Type | - | W | - | W | W | - | W | - | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSIM2_CAL | Reserved | PMIC_RG_VSIM2_VOSEL | PMIC_RG_VSIM2_STB_SEL | Reserved | PMIC_RG_VSIM2_OCFB | Reserved | PMIC_RG_VSIM2_NDIS_EN | |||||||
| Type | - | W | - | W | W | - | W | - | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSYSLDO_RESERVE | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VIBR_EN | Reserved | PMIC_RG_VIBR_STBTD | Reserved | PMIC_QI_VIBR_MODE | Reserved | PMIC_VIBR_THER_SHEN_EN | PMIC_VIBR_LP_MODE_SET | PMIC_VIBR_LP_SEL | |||||||
| Type | W | - | W | - | R | - | W | W | W | |||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIBR_CAL | PMIC_RG_VIBR_STB_SEL_CAL | PMIC_RG_VIBR_VOSEL | PMIC_RG_VIBR_STB_SEL | Reserved | PMIC_RG_VIBR_OCFB | Reserved | PMIC_RG_VIBR_NDIS_EN | |||||||
| Type | - | W | W | W | W | - | W | - | W | |||||||
| Reset | - | ? | ? | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LDO_FT | Reserved | PMIC_DIGLDO_RSV0 | PMIC_DIGLDO_RSV1 | ||||||||||||
| Type | W | - | W | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCAM_AF_OC_STATUS | Reserved | PMIC_QI_VM_OC_STATUS | Reserved | PMIC_QI_VRF18_OC_STATUS | Reserved | PMIC_QI_VIO18_OC_STATUS | Reserved | PMIC_QI_VCN_1V8_OC_STATUS | Reserved | PMIC_QI_VCAMD_OC_STATUS | Reserved | PMIC_QI_VCAM_IO_OC_STATUS | Reserved | ||
| Type | R | - | R | - | R | - | R | - | R | - | R | - | R | - | ||
| Reset | ? | - | ? | - | ? | - | ? | - | ? | - | ? | - | ? | - | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VRF18_BIST_EN | Reserved | PMIC_RG_VM_BIST_EN | PMIC_RG_VIO18_BIST_EN | Reserved | PMIC_RG_VCAMD_BIST_EN | Reserved | PMIC_RG_VCN_1V8_BIST_EN | PMIC_RG_VCAMD_IO_BIST_EN | PMIC_RG_VCAM_AF_BIST_EN | Reserved | |||||
| Type | W | - | W | W | - | W | - | W | W | W | - | |||||
| Reset | ? | - | ? | ? | - | ? | - | ? | ? | ? | - | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VGP1_ON_CTRL | PMIC_VGP2_ON_CTRL | PMIC_VGP3_ON_CTRL | Reserved | PMIC_VSIM1_ON_CTRL | PMIC_VSIM2_ON_CTRL | PMIC_VIBR_ON_CTRL | Reserved | ||||||||
| Type | W | W | W | - | W | W | W | - | ||||||||
| Reset | ? | ? | ? | - | ? | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VRF18_EN | Reserved | PMIC_RG_VRF18_STBTD | Reserved | PMIC_QI_VRF18_MODE | Reserved | PMIC_VRF18_LP_MODE_SET | PMIC_VRF18_LP_SEL | ||||||||
| Type | W | - | W | - | R | - | W | W | ||||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_CAL | Reserved | PMIC_RG_VRF18_STB_SEL | Reserved | PMIC_RG_VRF18_OCFB | PMIC_VRF18_ON_CTRL | PMIC_RG_VRF18_NDIS_EN | ||||||||
| Type | - | W | - | W | - | W | W | W | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VM_EN | PMIC_RG_VM_EN | PMIC_RG_VM_STBTD | Reserved | PMIC_QI_VM_MODE | Reserved | PMIC_VM_LP_MODE_SET | PMIC_VM_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VM_CAL | Reserved | PMIC_RG_VM_OCFB | PMIC_RG_VM_VOSEL | PMIC_RG_VM_PLCUR_CAL | PMIC_RG_VM_PLCUR_EN | PMIC_RG_VM_NDIS_EN | ||||||||
| Type | - | W | - | W | W | W | W | W | ||||||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO18_EN | PMIC_RG_VIO18_EN | PMIC_RG_VIO18_STBTD | Reserved | PMIC_QI_VIO18_MODE | Reserved | PMIC_VIO18_LP_MODE_SET | PMIC_VIO18_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO18_CAL | Reserved | PMIC_RG_VIO18_STB_SEL | Reserved | PMIC_RG_VIO18_OCFB | PMIC_VIO18_ON_CTRL | PMIC_RG_VIO18_NDIS_EN | ||||||||
| Type | - | W | - | W | - | W | W | W | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCAMD_EN | PMIC_RG_VCAMD_EN | PMIC_RG_VCAMD_STBTD | Reserved | PMIC_QI_VCAMD_MODE | Reserved | PMIC_VCAMD_LP_MODE_SET | PMIC_VCAMD_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCAMD_CAL | Reserved | PMIC_RG_VCAMD_VOSEL | PMIC_RG_VCAMD_STB_SEL | Reserved | PMIC_RG_VCAMD_OCFB | PMIC_VCAMD_ON_CTRL | PMIC_RG_VCAMD_NDIS_EN | |||||||
| Type | - | W | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCAM_IO_EN | PMIC_RG_VCAM_IO_EN | PMIC_RG_VCAM_IO_STBTD | Reserved | PMIC_QI_VCAM_IO_MODE | Reserved | PMIC_VCAM_IO_LP_MODE_SET | PMIC_VCAM_IO_LP_SEL | ||||||||
| Type | R | W | W | - | R | - | W | W | ||||||||
| Reset | ? | ? | ? | - | ? | - | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCAM_IO_CAL | Reserved | PMIC_RG_VCAM_IO_STB_SEL | Reserved | PMIC_RG_VCAM_IO_OCFB | PMIC_VCAM_IO_ON_CTRL | PMIC_RG_VCAM_IO_NDIS_EN | ||||||||
| Type | - | W | - | W | - | W | W | W | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_ADDR | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_PROG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_RD_TRIG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_RD_RDY_BYPASS | Reserved | PMIC_RG_SKIP_EFUSE_OUT | Reserved | PMIC_RG_EFUSE_PROG_SRC | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_BUSY | Reserved | PMIC_RG_EFUSE_RD_ACK | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_0_15 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_16_31 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_32_47 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_48_63 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_64_79 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_80_95 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_96_111 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_112_127 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_128_143 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_144_159 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_160_175 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_176_191 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_0_15 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_16_31 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_32_47 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_48_63 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_64_79 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_80_95 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_96_111 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_112_127 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_128_143 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_144_159 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_160_175 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_176_191 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OTP_PA | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OTP_PDIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OTP_PTM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STMP_MODE | PMIC_MIX_XOSC32_STP_CALI | PMIC_MIX_XOSC32_STP_LPDRST | PMIC_MIX_XOSC32_STP_LPDEN | PMIC_MIX_XOSC32_STP_LPDTB | PMIC_MIX_XOSC32_STP_PWDB | PMIC_MIX_XOSC32_STP_CPDTB | PMIC_MIX_EOSC32_OPT | |||||||
| Type | - | W | W | W | W | R | W | R | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_MIX_EFUSE_XOSC32_ENB_OPT | PMIC_MIX_RTC_XOSC32_ENB | PMIC_MIX_STP_RTC_DDLO | PMIC_MIX_STP_BBWAKEUP | PMIC_MIX_EOSC32_VCT_EN | PMIC_MIX_EOSC32_STP_RSV | PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE | PMIC_MIX_RTC_STP_XOSC32_ENB | PMIC_MIX_PMU_STP_DDLO_VRTC_EN | PMIC_MIX_PMU_STP_DDLO_VRTC | PMIC_MIX_DCXO_STP_LVSH_EN | PMIC_MIX_EOSC32_STP_CHOP_EN | |||
| Type | - | W | R | R | W | W | W | W | W | W | W | W | W | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDULL_CHS_EN | PMIC_RG_AUDULL_VCMSEL | PMIC_RG_AUDULL_VCM14_EN | PMIC_RG_AUDULL_VREF24_EN | PMIC_RG_AUDULL_VADC_DVREF_CAL | PMIC_RG_AUDULL_VADC_DENB | PMIC_RG_AUDULL_VPWDB_ADC | PMIC_RG_AUDULL_VPWDB_PGA | PMIC_RG_AUDULL_VUPG | PMIC_RG_AUDULL_VCFG | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDULR_VUPG | PMIC_RG_AUDULR_VCFG | Reserved | PMIC_RG_AUDULL_VCALI | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDULR_CHS_EN | PMIC_RG_AUDULR_VCMSEL | PMIC_RG_AUDULR_VCM14_EN | PMIC_RG_AUDULR_VREF24_EN | PMIC_RG_AUDULR_VADC_DVREF_CAL | PMIC_RG_AUDULR_VADC_DENB | PMIC_RG_AUDULR_VPWDB_ADC | PMIC_RG_AUDULR_VPWDB_PGA | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUD_RSV | Reserved | PMIC_RG_AUD_IGBIAS_CALI | Reserved | PMIC_RG_AUDULR_VCALI | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AOUTR_PWDB | PMIC_RG_AOUTL_PWDB | PMIC_RG_ABIAS_PWDB | PMIC_RG_ADACR_PWDB | PMIC_RG_ADACL_PWDB | PMIC_RG_AMUTEL | PMIC_RG_AMUTER | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_APGL | Reserved | PMIC_RG_APGR | Reserved | PMIC_RG_ACALI | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDDL_VREF24_EN | PMIC_RG_AVCMGEN_EN | PMIC_RG_CHARGEOPTION_DEPOP | PMIC_RG_DEPOP_CURSEL | PMIC_RG_DEPOP_VCMSEL | PMIC_RG_DEPOP_VCM_EN | PMIC_RG_ADEPOPX | PMIC_RG_ADEPOPX_EN | PMIC_RG_DACREF | PMIC_RG_ADACCK_EN | PMIC_RG_AHFMODE | PMIC_RG_ABUF_INSHORT | PMIC_RG_ABUF_BIAS | |||
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | |||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_HSOUTSTBENH | PMIC_RG_V2SPK | PMIC_RG_VDEPOP | PMIC_RG_VBUF_BIAS | PMIC_RG_VBUF_PWDB | PMIC_RG_VDPG | Reserved | PMIC_RG_VBUF_FLOAT | PMIC_RG_ABIRSV | ||||||
| Type | - | W | W | W | W | W | W | - | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDSPAREVMIC | PMIC_RG_AUDMICBIASVREF | PMIC_RG_AUDDIGMICBIAS | PMIC_RG_AUDDIGMICNDUTY | PMIC_RG_AUDDIGMICPDUTY | PMIC_RG_AUDPWDBMICBIAS | PMIC_RG_AUDDIGMICEN | PMIC_RG_CLKSQ_MONEN | PMIC_AUDTOP_CON8_RSV_0 | |||||||
| Type | W | W | W | W | W | W | W | W | W | |||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VBIRX_ZCD_STATUS | PMIC_RG_VBIRX_ZCD_HYS_ENB | PMIC_RG_VBIRX_ZCD_CALI | PMIC_RG_VBIRX_ZCD_EN | |||||||||||
| Type | - | R | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_BATSNS | PMIC_RG_ADC_OUT_BATSNS | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_ISENSE | PMIC_RG_ADC_OUT_ISENSE | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_VCDT | PMIC_RG_ADC_OUT_VCDT | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_BATON1 | PMIC_RG_ADC_OUT_BATON1 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_THR_SENSE1 | PMIC_RG_ADC_OUT_THR_SENSE1 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_THR_SENSE2 | PMIC_RG_ADC_OUT_THR_SENSE2 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_BATON2 | PMIC_RG_ADC_OUT_BATON2 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_CH5 | PMIC_RG_ADC_OUT_CH5 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_WAKEUP_PCHR | PMIC_RG_ADC_OUT_WAKEUP_PCHR | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_WAKEUP_SWCHR | PMIC_RG_ADC_OUT_WAKEUP_SWCHR | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_LBAT | Reserved | PMIC_RG_ADC_OUT_LBAT | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_CH6 | PMIC_RG_ADC_OUT_CH6 | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_GPS | Reserved | ||||||||||||||
| Type | R | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_GPS | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_GPS_LSB | Reserved | ||||||||||||||
| Type | R | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_MD | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_MD | Reserved | PMIC_RG_ADC_OUT_MD_LSB | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_INT | PMIC_RG_ADC_OUT_INT | ||||||||||||||
| Type | R | R | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_RSV1 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_RSV2 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_OUT_RSV3 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SW_GAIN_TRIM | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SW_OFFSET_TRIM | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_FILTER_ORDER | PMIC_RG_ADC_LATCH_EDGE | PMIC_RG_ADC_AUTORST_EN | PMIC_RG_ADC_AUTORST_RANGE | PMIC_RG_ADC_CALI_FORCE | PMIC_RG_ADC_CALI_EN | PMIC_RG_ADC_CALI_RATE | Reserved | PMIC_RG_ADC_PWDB_SWCTRL | Reserved | PMIC_RG_ADC_PWDB | ||||
| Type | - | W | W | W | W | W | W | W | - | W | - | W | ||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | - | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUXADC_CHSEL | Reserved | PMIC_RG_ADCIN_CHR_EN | PMIC_RG_ADCIN_VBAT_EN | Reserved | PMIC_RG_ADCIN_VSEN_MUX_EN | PMIC_RG_ADCIN_VSEN_EN | PMIC_RG_ADC_SWCTRL_EN | ||||||||
| Type | W | - | W | W | - | W | W | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_DEBT_MIN | PMIC_RG_LBAT_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_MAX_IRQ_B | Reserved | PMIC_RG_LBAT_EN_MAX | PMIC_RG_LBAT_IRQ_EN_MAX | PMIC_RG_LBAT_VOLT_MAX | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_MIN_IRQ_B | Reserved | PMIC_RG_LBAT_EN_MIN | PMIC_RG_LBAT_IRQ_EN_MIN | PMIC_RG_LBAT_VOLT_MIN | |||||||||||
| Type | R | - | W | W | W | |||||||||||
| Reset | ? | - | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OSR_GPS | PMIC_RG_OSR | Reserved | PMIC_RG_AUXADC_BIST_ENB | PMIC_RG_DATA_REUSE_SEL | Reserved | ||||||||||
| Type | W | W | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_TRIM_CH0_SEL | Reserved | PMIC_RG_ADC_TRIM_CH2_SEL | PMIC_RG_ADC_TRIM_CH3_SEL | PMIC_RG_ADC_TRIM_CH4_SEL | PMIC_RG_ADC_TRIM_CH5_SEL | PMIC_RG_ADC_TRIM_CH6_SEL | PMIC_RG_ADC_TRIM_CH7_SEL | ||||||||
| Type | W | - | W | W | W | W | W | W | ||||||||
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SOURCE_LBAT_SEL | Reserved | PMIC_RG_VBUF_EN | Reserved | PMIC_RG_VBUF_BYP | PMIC_RG_VBUF_EXTEN | PMIC_RG_VBUF_CALEN | |||||||||
| Type | W | - | W | - | W | W | W | |||||||||
| Reset | ? | - | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EFUSE_GAIN_CH0_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EFUSE_OFFSET_CH0_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EFUSE_GAIN_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EFUSE_OFFSET_CH4_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_EFUSE_GAIN_CH7_TRIM | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_EFUSE_OFFSET_CH7_TRIM | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_DENB | PMIC_RG_ADC_DVREF_CAL | Reserved | PMIC_RG_ADC_CHS_SEL | PMIC_RG_VREF18_EN | PMIC_RG_VPWDB_ADC | PMIC_RG_ADC_CHOPPER_EN | PMIC_RG_ADC_INPUT_SHORT | PMIC_RG_ADC_LP_EN | PMIC_RG_ADC_RST | PMIC_RG_ADC_IBIAS | |||||
| Type | W | W | - | W | W | W | W | W | W | W | W | |||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_DECI_GDLY | Reserved | PMIC_RG_ADC_DECI_FORCE | Reserved | PMIC_RG_ADC_CLK_AON | Reserved | PMIC_RG_DECI_BYPASS_EN | PMIC_RG_ADC_TEST_OUT_SEL | PMIC_RG_ADC_TEST_MODE_EN | PMIC_RG_ADC_RSV_BIT | PMIC_RG_ADC_GPS_STATUS | PMIC_RG_ADC_SLEEP_MODE_EN | ||||
| Type | R/W | - | W | - | W | - | W | W | W | W | W | W | ||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ? | ? | ? | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_MD_RQST | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_GPS_RQST | Reserved | ||||||||||||||
| Type | W | - | ||||||||||||||
| Reset | ? | - | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AP_RQST | Reserved | PMIC_RG_AP_RQST_LIST | |||||||||||||
| Type | W | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AP_RQST_LIST_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_DATA_SKIP_NUM | PMIC_RG_DATA_SKIP_ENB | PMIC_RG_CIC_OUT_RAW | PMIC_RG_ADC_2S_COMP_ENB | PMIC_RG_ADC_TRIM_COMP | PMIC_RG_ADC_OUT_TRIM_ENB | Reserved | ||||||||
| Type | - | W | W | W | W | W | W | - | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_REV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VREF18_ENB | PMIC_RG_ADC_RSV1 | PMIC_RG_DECI_GDLY_VREF18_SELB | PMIC_RG_DECI_GDLY_SEL_MODE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VREF18_ENB_MD | PMIC_RG_ADC_RSV2 | PMIC_RG_ADC_MD_STATUS | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDACCDETRSV | PMIC_AUDACCDETAUXADCSWCTRL_SEL | PMIC_AUDACCDETAUXADCSWCTRL | PMIC_RG_AUDACCDETVIN1PULLLOW | PMIC_RG_AUDACCDETTVDET | Reserved | PMIC_RG_AUDACCDETSWCTRL | Reserved | PMIC_RG_AUDACCDETVTHCAL | |||||||
| Type | W | W | W | W | W | - | W | - | W | |||||||
| Reset | ? | ? | ? | ? | ? | - | ? | - | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_SEQ_INIT | PMIC_ACCDET_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_MBIAS_PWM_IDLE | PMIC_ACCDET_VTH_PWM_IDLE | PMIC_ACCDET_CMP_PWM_IDLE | Reserved | PMIC_ACCDET_MBIAS_PWM_EN | PMIC_ACCDET_VTH_PWM_EN | PMIC_ACCDET_CMP_PWM_EN | ||||||||
| Type | - | W | W | W | - | W | W | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_WIDTH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_THRESH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_FALL_DELAY | PMIC_ACCDET_RISE_DELAY | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_IVAL_SEL | Reserved | PMIC_ACCDET_IVAL_MEM_IN | Reserved | PMIC_ACCDET_IVAL_SAM_IN | Reserved | PMIC_ACCDET_IVAL_CUR_IN | |||||||||
| Type | W | - | W | - | W | - | W | |||||||||
| Reset | ? | - | ? | - | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_IRQ_CLR | Reserved | PMIC_ACCDET_IRQ | ||||||||||||
| Type | - | W | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_EN_SW | PMIC_ACCDET_MBIAS_EN_SW | PMIC_ACCDET_VTH_EN_SW | PMIC_ACCDET_CMP_EN_SW | Reserved | PMIC_ACCDET_IN_SW | PMIC_ACCDET_PWM_SEL | PMIC_ACCDET_TEST_MODE5 | PMIC_ACCDET_TEST_MODE4 | PMIC_ACCDET_TEST_MODE3 | PMIC_ACCDET_TEST_MODE2 | PMIC_ACCDET_TEST_MODE1 | PMIC_ACCDET_TEST_MODE0 | |||
| Type | W | W | W | W | - | W | W | W | W | W | W | W | W | |||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_DA_AUDACCDETAUXADCSWCTRL | PMIC_ACCDET_CMP_CLK | PMIC_ACCDET_VTH_CLK | PMIC_ACCDET_MBIAS_CLK | Reserved | PMIC_ACCDET_STATE | PMIC_ACCDET_MEM_IN | PMIC_ACCDET_SAM_IN | PMIC_ACCDET_CUR_IN | PMIC_ACCDET_IN | ||||||
| Type | R | R | R | R | - | R | R | R | R | R | ||||||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_CUR_DEB | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_RSV_CON0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_RSV_CON1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||