| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VCDT_HV_DET | PMIC_RGS_VCDT_LV_DET | PMIC_RGS_CHRDET | PMIC_RG_CHR_EN | PMIC_RG_CSDAC_EN | PMIC_RG_PCHR_AUTOMODE | PMIC_RGS_CHR_LDO_DET | PMIC_RG_VCDT_HV_EN | |||||||
| Type | - | R | R | R | W | W | W | R | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCDT_HV_VTH | PMIC_RG_VCDT_LV_VTH | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VBAT_CC_DET | PMIC_RGS_VBAT_CV_DET | PMIC_RGS_CS_DET | Reserved | PMIC_RG_CS_EN | PMIC_RG_VBAT_CC_EN | PMIC_RG_VBAT_CV_EN | Reserved | |||||||
| Type | - | R | R | R | - | W | W | W | - | |||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VBAT_CC_VTH | Reserved | PMIC_RG_VBAT_CV_VTH | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CS_VTH | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_TOLTC | Reserved | PMIC_RG_PCHR_TOHTC | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_VBAT_OV_DET | PMIC_RG_VBAT_OV_DEG | Reserved | PMIC_RG_VBAT_OV_VTH | PMIC_RG_VBAT_OV_EN | ||||||||||
| Type | - | R | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_BATON_UNDET | Reserved | PMIC_RG_BATON_HT_TRIM_SET | PMIC_RG_BATON_HT_TRIM | Reserved | PMIC_BATON_TDET_EN | PMIC_RG_BATON_HT_EN | PMIC_RG_BATON_EN | |||||||
| Type | - | R | - | W | W | - | W | W | W | |||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_DATA | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_FRC_CSVTH_USBDL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_OTG_BVALID_DET | PMIC_RG_OTG_BVALID_EN | PMIC_RG_PCHR_FLAG_EN | PMIC_RGS_PCHR_FLAG_OUT | |||||||||||
| Type | - | R | W | W | R | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_FLAG_SEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_FT_CTRL | Reserved | PMIC_RG_PCHR_RST | PMIC_RG_CSDAC_TESTMODE | PMIC_RG_PCHR_TESTMODE | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CHRWDT_WR | Reserved | PMIC_RG_CHRWDT_EN | PMIC_RG_CHRWDT_TD | |||||||||||
| Type | - | W | - | W | W | |||||||||||
| Reset | - | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_RV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_CHRWDT_OUT | PMIC_RG_CHRWDT_FLAG_WR | PMIC_RG_CHRWDT_INT_EN | ||||||||||||
| Type | - | R | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ADCIN_VCHR_EN | PMIC_ADCIN_VSEN_EN | PMIC_ADCIN_VBAT_EN | PMIC_RG_ADCIN_VSEN_EXT_BATON_EN | PMIC_ADCIN_VSEN_MUX_EN | Reserved | PMIC_RG_USBDL_SET | PMIC_RG_USBDL_RST | PMIC_RG_UVLO_VTHL | ||||||
| Type | - | W | W | W | W | W | - | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_UNCHOP | PMIC_RG_BGR_UNCHOP_PH | Reserved | PMIC_RG_BGR_RSEL | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RGS_BC11_CMP_OUT | Reserved | PMIC_RG_BC11_VSRC_EN | PMIC_RG_BC11_RST | PMIC_RG_BC11_BB_CTRL | ||||||||||
| Type | - | R | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BC11_BIAS_EN | PMIC_RG_BC11_IPU_EN | PMIC_RG_BC11_IPD_EN | PMIC_RG_BC11_CMP_EN | PMIC_RG_BC11_VREF_VTH | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_STP_DEC | Reserved | PMIC_RG_CSDAC_STP_INC | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CSDAC_STP | Reserved | PMIC_RG_CSDAC_DLY | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CHRIND_DIMMING | PMIC_RG_CHRIND_ON | PMIC_RG_LOW_ICH_DB | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ULC_DET_EN | PMIC_RG_HWCV_EN | Reserved | PMIC_RG_TRACKING_EN | Reserved | PMIC_RG_CSDAC_MODE | PMIC_RG_VCDT_MODE | PMIC_RG_CV_MODE | |||||||
| Type | - | W | W | - | W | - | W | W | W | |||||||
| Reset | - | ? | ? | - | ? | - | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ICHRG_TRIM | Reserved | PMIC_RG_BGR_TRIM_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OVP_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_BGR_TEST_RSTB | PMIC_RG_BGR_TEST_EN | PMIC_QI_BGR_EXT_BUF_EN | PMIC_CHR_OSC_TRIM | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_DAC_USBDL_MAX | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PCHR_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_CID | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_STRUP_6M_PDN | PMIC_RG_ACCDET_CK_PDN | PMIC_RG_AUXADC_CK_PDN | PMIC_RG_SMPS_CK_DIV_PDN | PMIC_RG_SMPS_CK_DIV2_PDN | PMIC_RG_SPK_DIV_PDN | PMIC_RG_SPK_PWM_DIV_PDN | PMIC_RG_RTC_MCLK_PDN | PMIC_RG_BST_DRV_1M_CK_PDN | PMIC_RG_FGADC_ANA_CK_PDN | PMIC_RG_FGADC_CK_PDN | PMIC_RG_EFUSE_CK_PDN | PMIC_RG_PWMOC_CK_PDN | PMIC_RG_SPK_CK_PDN | PMIC_RG_AUD_13M_PDN | PMIC_RG_AUD_26M_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_CKPDN2_RSV_15 | PMIC_RG_RTC_75K_CK_PDN | PMIC_RG_STRUP_32K_CK_PDN | PMIC_RG_BUCK_1M_CK_PDN | PMIC_RG_BUCK32K_PDN | PMIC_RG_BUCK_ANA_CK_PDN | PMIC_RG_BUCK_CK_PDN | PMIC_RG_CHR1M_CK_PDN | PMIC_RG_DRV_32K_CK_PDN | PMIC_RG_INTRP_CK_PDN | PMIC_RG_LDOSTB_1M_CK_PDN | PMIC_RG_PCHR_32K_CK_PDN | PMIC_RG_RTC_32K_CK_PDN | PMIC_RG_STRUP_75K_CK_PDN | PMIC_RG_FQMTR_PDN | PMIC_RG_RTC32K_1V8_PDN |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_GPIO_CKPDN_RSV_15_14 | PMIC_RG_GPIO32K_PDN | PMIC_RG_GPIO26M_PDN | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_RST_CON_RSV_15_9 | PMIC_RG_FQMTR_RST | PMIC_RG_RTC_RST | PMIC_RG_DRIVER_RST | PMIC_RG_SPK_RST | PMIC_RG_ACCDET_RST | PMIC_RG_FGADC_RST | PMIC_RG_AUDIO_RST | PMIC_RG_AUXADC_RST | PMIC_RG_EFUSE_MAN_RST | ||||||
| Type | W | W | W | W | W | W | W | W | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_WRP_PDN | PMIC_RG_WRP_32K_PDN | PMIC_RG_WRP_EINT_PDN | PMIC_RG_WRP_KP_PDN | PMIC_RG_WRP_PWM_PDN | PMIC_RG_WRP_I2C2_PDN | PMIC_RG_WRP_I2C1_PDN | PMIC_RG_WRP_I2C0_PDN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_WRP_RST | PMIC_RG_EINT_RST | PMIC_RG_KP_RST | PMIC_RG_PWM_RST | PMIC_RG_I2C2_RST | PMIC_RG_I2C1_RST | PMIC_RG_I2C0_RST | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PWRKEY_RST_TD | PMIC_RG_PWRRST_TMR_DIS | PMIC_RG_PWRKEY_RST_EN | PMIC_RG_HOMEKEY_RST_EN | PMIC_RG_RST_PART_SEL | PMIC_RG_TOP_RST_MISC_RSV_3 | PMIC_RG_STRUP_MAN_RST_EN | PMIC_RG_SYSRSTB_EN | PMIC_RG_AP_RST_DIS | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OSC_SEL_ALIGN_DIS | Reserved | PMIC_RG_OSC_HW_SEL | PMIC_RG_CLKSQ_HW_AUTO_EN | PMIC_RG_SRCLKPERI_HW_AUTO_EN | PMIC_RG_SRCLKMD2_HW_AUTO_EN | PMIC_RG_SRCVOLT_HW_AUTO_EN | PMIC_RG_OSC_SEL_AUTO | PMIC_RG_TOP_CKCON1_RSV_07 | PMIC_RG_SMPS_DIV2_SRC_AUTOFF_DIS | PMIC_RG_SMPS_AUTOFF_DIS | PMIC_RG_CLKSQ_EN | PMIC_RG_SRCLKPERI_EN | PMIC_RG_SRCLKMD2_EN | PMIC_RG_SRCVOLT_EN | PMIC_RG_OSC_SEL |
| Type | W | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_FQMTR_CKSEL | PMIC_RG_ACCDET_CKSEL | PMIC_RG_FG_ANA_CKSEL | PMIC_RG_REGCK_SEL | PMIC_RG_BUCK_2M_SEL_EN | PMIC_VPROC_6M_SEL | PMIC_VCORE_6M_SEL | PMIC_RG_SPK_DIV_SEL | PMIC_RG_SPK_PWM_DIV_SEL | PMIC_RG_AUXADC_DIV_SEL | ||||||
| Type | W | W | W | W | W | W | W | W | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_AUXADC_TSTSEL | PMIC_PMU75K_TST_DIS | PMIC_SMPS_TST_DIS | PMIC_CHR1M_TST_DIS | PMIC_AUD26M_TST_DIS | PMIC_RTC32K_TST_DIS | PMIC_FG_TST_DIS | PMIC_SPK_TST_DIS | PMIC_CHR1M_TSTSEL | PMIC_SMPS_TSTSEL | PMIC_PMU75K_TSTSEL | PMIC_AUD26M_TSTSEL | PMIC_RTC32K_TSTSEL | PMIC_FG_TSTSEL | PMIC_SPK_TSTSEL | |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_TOP_CKTST2_RSV_15_8 | PMIC_OSC32_CKSEL | PMIC_XOSC32_TSTSEL | PMIC_XOSC32_TST_DIS | PMIC_RG_PCHR_TEST_CK_SEL | PMIC_RG_STRUP_75K_26M_SEL | PMIC_ACCDET_TSTSEL | PMIC_CK1M2M_TSTSEL | PMIC_BGR_TEST_CK_EN | |||||||
| Type | W | W | W | W | W | W | W | W | W | |||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_DEG_EN | PMIC_VRF18_DEG_EN | PMIC_VPA_DEG_EN | PMIC_VIO18_DEG_EN | PMIC_VM_DEG_EN | PMIC_VCORE_DEG_EN | PMIC_VSRAM_DEG_EN | PMIC_VPROC_DEG_EN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_OC_GEAR_BVALID_DET | PMIC_OC_GEAR_VBATON_UNDET | Reserved | PMIC_OC_GEAR_LDO | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VM_OC_WND | PMIC_VM_OC_THD | PMIC_VCORE_OC_WND | PMIC_VCORE_OC_THD | PMIC_VSRAM_OC_WND | PMIC_VSRAM_OC_THD | PMIC_VPROC_OC_WND | PMIC_VPROC_OC_THD | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VRF18_2_OC_WND | PMIC_VRF18_2_OC_THD | PMIC_VRF18_OC_WND | PMIC_VRF18_OC_THD | PMIC_VPA_OC_WND | PMIC_VPA_OC_THD | PMIC_VIO18_OC_WND | PMIC_VIO18_OC_THD | ||||||||
| Type | W | W | W | W | W | W | W | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_INT_RSV_15_8 | PMIC_IVGEN_EXT_EN | Reserved | PMIC_RG_PWRKEY_INT_SEL | PMIC_RG_HOMEKEY_INT_SEL | PMIC_POLARITY_BVALID_DET | PMIC_POLARITY_VBATON_UNDET | PMIC_POLARITY | ||||||||
| Type | W | W | - | W | W | W | W | W | ||||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_MON_GRP_SEL | PMIC_RG_MON_FLAG_SEL | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_TEST_SPK_PWM | PMIC_RG_TEST_SPK | PMIC_RG_TEST_STRUP | PMIC_RG_EFUSE_MODE | PMIC_RG_NANDTREE_MODE | PMIC_RG_TEST_AUXADC | PMIC_RG_TEST_FGPLL | PMIC_RG_TEST_FG | PMIC_RG_TEST_AUD | PMIC_RG_TEST_WRAP | PMIC_RG_TEST_IO_FG_SEL | PMIC_RG_TEST_CLASSD | PMIC_RG_TEST_DRIVER | PMIC_RG_TEST_BOOST | |
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | W | |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VRTC_STATUS | PMIC_STATUS_VRF28_2_EN | PMIC_STATUS_VRF28_EN | PMIC_STATUS_VSIM1_EN | PMIC_STATUS_VSIM2_EN | PMIC_STATUS_VTCXO_2_EN | PMIC_STATUS_VTCXO_EN | PMIC_STATUS_VUSB_EN | PMIC_STATUS_VRF18_2_EN | PMIC_STATUS_VRF18_EN | PMIC_STATUS_VPA_EN | PMIC_STATUS_VIO18_EN | PMIC_STATUS_VM_EN | PMIC_STATUS_VCORE_EN | PMIC_STATUS_VSRAM_EN | PMIC_STATUS_VPROC_EN |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_STATUS_VA28_EN | PMIC_STATUS_VAST_EN | PMIC_STATUS_VA_EN | PMIC_STATUS_VCAMA_EN | PMIC_STATUS_VEMC_1V8_EN | PMIC_STATUS_VEMC_3V3_EN | PMIC_STATUS_VGP1_EN | PMIC_STATUS_VGP2_EN | PMIC_STATUS_VGP3_EN | PMIC_STATUS_VGP4_EN | PMIC_STATUS_VGP5_EN | PMIC_STATUS_VGP6_EN | PMIC_STATUS_VIBR_EN | PMIC_STATUS_VIO28_EN | PMIC_STATUS_VMC1_EN | PMIC_STATUS_VMCH1_EN |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO28_PG_DEB | PMIC_VA28_PG_DEB | PMIC_VA_PG_DEB | PMIC_VTCXO_PG_DEB | PMIC_VIO18_PG_DEB | PMIC_VM_PG_DEB | PMIC_VCORE_PG_DEB | PMIC_VSRAM_PG_DEB | PMIC_VPROC_PG_DEB | ||||||
| Type | - | R | R | R | R | R | R | R | R | R | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RO_BATON_UNDET | PMIC_PCHR_CHRDET | PMIC_VBAT_OV | PMIC_PWRKEY_DEB | PMIC_USBDL | Reserved | PMIC_PMU_TEST_MODE_SCAN | ||||||||
| Type | - | R | R | R | R | R | - | R | ||||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_OC_STATUS_VRF28_2 | PMIC_OC_STATUS_VRF28 | PMIC_OC_STATUS_VSIM1 | PMIC_OC_STATUS_VSIM2 | PMIC_OC_STATUS_VTCXO_2 | PMIC_OC_STATUS_VTCXO | PMIC_OC_STATUS_VUSB | PMIC_OC_STATUS_VRF18_2 | PMIC_OC_STATUS_VRF18 | PMIC_OC_STATUS_VPA | PMIC_OC_STATUS_VIO18 | PMIC_OC_STATUS_VM | PMIC_OC_STATUS_VCORE | PMIC_OC_STATUS_VSRAM | PMIC_OC_STATUS_VPROC |
| Type | - | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_OC_STATUS_VA28 | PMIC_OC_STATUS_VAST | PMIC_OC_STATUS_VA | PMIC_OC_STATUS_VCAMA | PMIC_OC_STATUS_VEMC_1V8 | PMIC_OC_STATUS_VEMC_3V3 | PMIC_OC_STATUS_VGP1 | PMIC_OC_STATUS_VGP2 | PMIC_OC_STATUS_VGP3 | PMIC_OC_STATUS_VGP4 | PMIC_OC_STATUS_VGP5 | PMIC_OC_STATUS_VGP6 | PMIC_OC_STATUS_VIBR | PMIC_OC_STATUS_VIO28 | PMIC_OC_STATUS_VMC1 | PMIC_OC_STATUS_VMCH1 |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_HOMEKEY_DEB | PMIC_NI_SPK_OC_DET_D_R | PMIC_NI_SPK_OC_DET_D_L | PMIC_NI_SPK_OC_DET_AB_R | PMIC_NI_SPK_OC_DET_AB_L | ||||||||||
| Type | - | R | R | R | R | R | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SIMLS2_SRST_CONF | PMIC_RG_SIMLS2_SCLK_CONF | PMIC_RG_SIMLS1_SRST_CONF | PMIC_RG_SIMLS1_SCLK_CONF | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_TEST_OUT_L | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_TEST_OUT_H | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS_TDSEL | PMIC_RG_PMU_TDSEL | PMIC_RG_SPI_TDSEL | PMIC_RG_I2S_TDSEL | PMIC_RG_KP_TDSEL | PMIC_RG_PWM_TDSEL | PMIC_RG_I2C_TDSEL | PMIC_RG_SIMAP_TDSEL | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SIMLS_RDSEL | PMIC_RG_PMU_RDSEL | PMIC_RG_SPI_RDSEL | PMIC_RG_I2S_RDSEL | PMIC_RG_KP_RDSEL | PMIC_RG_PWM_RDSEL | PMIC_RG_I2C_RDSEL | PMIC_RG_SIMAP_RDSEL | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SMT15 | PMIC_RG_SMT14 | PMIC_RG_SMT13 | PMIC_RG_SMT12 | PMIC_RG_SMT11 | PMIC_RG_SMT10 | PMIC_RG_SMT9 | PMIC_RG_SMT8 | PMIC_RG_SMT7 | PMIC_RG_SMT6 | PMIC_RG_SMT5 | PMIC_RG_SMT4 | PMIC_RG_SMT3 | PMIC_RG_SMT2 | PMIC_RG_SMT1 | PMIC_RG_SMT0 |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SMT31 | PMIC_RG_SMT30 | PMIC_RG_SMT29 | PMIC_RG_SMT28 | PMIC_RG_SMT27 | PMIC_RG_SMT26 | PMIC_RG_SMT25 | PMIC_RG_SMT24 | PMIC_RG_SMT23 | PMIC_RG_SMT22 | PMIC_RG_SMT21 | PMIC_RG_SMT20 | PMIC_RG_SMT19 | PMIC_RG_SMT18 | PMIC_RG_SMT17 | PMIC_RG_SMT16 |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SMT47 | PMIC_RG_SMT46 | PMIC_RG_SMT45 | PMIC_RG_SMT44 | PMIC_RG_SMT43 | PMIC_RG_SMT42 | PMIC_RG_SMT41 | PMIC_RG_SMT40 | PMIC_RG_SMT39 | PMIC_RG_SMT38 | PMIC_RG_SMT37 | PMIC_RG_SMT36 | PMIC_RG_SMT35 | PMIC_RG_SMT34 | PMIC_RG_SMT33 | PMIC_RG_SMT32 |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_HOMEKEY_PDEN | PMIC_RG_HOMEKEY_PUEN | Reserved | PMIC_RG_SMT50 | PMIC_RG_SMT49 | PMIC_RG_SMT48 | |||||||||
| Type | - | W | W | - | W | W | W | |||||||||
| Reset | - | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SRCLKEN_PERI | PMIC_RG_OCTL_SRCVOLTEN | PMIC_RG_OCTL_INT | PMIC_RG_OCTL_HOMEKEY | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SPI_CLK | PMIC_RG_OCTL_WRAP_EVENT | PMIC_RG_OCTL_RTC_32K1V8 | PMIC_RG_OCTL_SRCLKEN_MD2 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_ADC_CK | PMIC_RG_OCTL_SPI_MISO | PMIC_RG_OCTL_SPI_MOSI | PMIC_RG_OCTL_SPI_CSN | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_DAC_WS | PMIC_RG_OCTL_DAC_CK | PMIC_RG_OCTL_ADC_DAT | PMIC_RG_OCTL_ADC_WS | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_COL2 | PMIC_RG_OCTL_COL1 | PMIC_RG_OCTL_COL0 | PMIC_RG_OCTL_DAC_DAT | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_COL6 | PMIC_RG_OCTL_COL5 | PMIC_RG_OCTL_COL4 | PMIC_RG_OCTL_COL3 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_ROW2 | PMIC_RG_OCTL_ROW1 | PMIC_RG_OCTL_ROW0 | PMIC_RG_OCTL_COL7 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_ROW6 | PMIC_RG_OCTL_ROW5 | PMIC_RG_OCTL_ROW4 | PMIC_RG_OCTL_ROW3 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_PWM | PMIC_RG_OCTL_VMSEL2 | PMIC_RG_OCTL_VMSEL1 | PMIC_RG_OCTL_ROW7 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SDA1 | PMIC_RG_OCTL_SCL1 | PMIC_RG_OCTL_SDA0 | PMIC_RG_OCTL_SCL0 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SIM1_AP_SRST | PMIC_RG_OCTL_SIM1_AP_SCLK | PMIC_RG_OCTL_SDA2 | PMIC_RG_OCTL_SCL2 | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_OCTL_SIMLS1_SRST | PMIC_RG_OCTL_SIMLS1_SCLK | PMIC_RG_OCTL_SIM2_AP_SRST | PMIC_RG_OCTL_SIM2_AP_SCLK | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_OCTL_SIMLS2_SRST | PMIC_RG_OCTL_SIMLS2_SCLK | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_INT_EN_OV | PMIC_RG_INT_EN_CHRDET | PMIC_RG_INT_EN_BVALID_DET | PMIC_RG_INT_EN_VBATON_UNDET | PMIC_RG_INT_EN_THR_H | PMIC_RG_INT_EN_THR_L | PMIC_RG_INT_EN_PWRKEY | PMIC_RG_INT_EN_WATCHDOG | PMIC_RG_INT_EN_FG_BAT_H | PMIC_RG_INT_EN_FG_BAT_L | PMIC_RG_INT_EN_BAT_H | PMIC_RG_INT_EN_BAT_L | PMIC_RG_INT_EN_SPKR | PMIC_RG_INT_EN_SPKL | PMIC_RG_INT_EN_SPKR_AB | PMIC_RG_INT_EN_SPKL_AB |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_INT_EN_VRF18_2 | PMIC_RG_INT_EN_VRF18 | PMIC_RG_INT_EN_VPA | PMIC_RG_INT_EN_VIO18 | PMIC_RG_INT_EN_VM | PMIC_RG_INT_EN_VCORE | PMIC_RG_INT_EN_VSRAM | PMIC_RG_INT_EN_VPROC | Reserved | PMIC_RG_INT_EN_RTC | PMIC_RG_INT_EN_AUDIO | PMIC_RG_INT_EN_ACCDET | PMIC_RG_INT_EN_HOMEKEY | PMIC_RG_INT_EN_LDO | ||
| Type | W | W | W | W | W | W | W | W | - | W | W | W | W | W | ||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_INT_STATUS_OV | PMIC_RG_INT_STATUS_CHRDET | PMIC_RG_INT_STATUS_BVALID_DET | PMIC_RG_INT_STATUS_VBATON_UNDET | PMIC_RG_INT_STATUS_THR_H | PMIC_RG_INT_STATUS_THR_L | PMIC_RG_INT_STATUS_PWRKEY | PMIC_RG_INT_STATUS_WATCHDOG | PMIC_RG_INT_STATUS_FG_BAT_H | PMIC_RG_INT_STATUS_FG_BAT_L | PMIC_RG_INT_STATUS_BAT_H | PMIC_RG_INT_STATUS_BAT_L | PMIC_RG_INT_STATUS_SPKR | PMIC_RG_INT_STATUS_SPKL | PMIC_RG_INT_STATUS_SPKR_AB | PMIC_RG_INT_STATUS_SPKL_AB |
| Type | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R | R |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_INT_STATUS_VRF18_2 | PMIC_RG_INT_STATUS_VRF18 | PMIC_RG_INT_STATUS_VPA | PMIC_RG_INT_STATUS_VIO18 | PMIC_RG_INT_STATUS_VM | PMIC_RG_INT_STATUS_VCORE | PMIC_RG_INT_STATUS_VSRAM | PMIC_RG_INT_STATUS_VPROC | Reserved | PMIC_RG_INT_STATUS_RTC | PMIC_RG_INT_STATUS_AUDIO | PMIC_RG_INT_STATUS_ACCDET | PMIC_RG_INT_STATUS_HOMEKEY | PMIC_RG_INT_STATUS_LDO | ||
| Type | R | R | R | R | R | R | R | R | - | R | R | R | R | R | ||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_EN | PMIC_FQMTR_RST | Reserved | PMIC_FQMTR_BUSY | PMIC_FQMTR_TCKSEL | |||||||||||
| Type | W | W | - | R | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_WINSET | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FQMTR_DATA | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_ADDR | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_PROG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_EN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_PKEY | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_RD_TRIG | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_RD_RDY_BYPASS | Reserved | PMIC_RG_SKIP_EFUSE_OUT | Reserved | PMIC_RG_EFUSE_PROG_SRC | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_EFUSE_BUSY | Reserved | PMIC_RG_EFUSE_RD_ACK | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_0_15 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_16_31 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_32_47 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_48_63 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_64_79 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_80_95 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_96_111 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_112_127 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_128_143 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_144_159 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_160_175 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_VAL_176_191 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_0_15 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_16_31 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_32_47 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_48_63 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_64_79 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_80_95 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_96_111 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_112_127 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_128_143 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_144_159 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_160_175 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_EFUSE_DOUT_176_191 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_SPI_CON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_SMPS_TESTMODE_B | PMIC_RG_SMPS_TESTMODE_A | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VM_DIG_MON | PMIC_QI_VCORE_DIG_MON | PMIC_QI_VSRAM_DIG_MON | PMIC_QI_VPROC_DIG_MON | ||||||||||||
| Type | R | R | R | R | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_BUCK_RSV | PMIC_VCORE_PG_H2L_EN | PMIC_VSRAM_PG_H2L_EN | PMIC_VPROC_PG_H2L_EN | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_TRIMH | Reserved | PMIC_RG_VPROC_TRIML | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPROC_ZX_OS | Reserved | PMIC_RG_VPROC_CSL | PMIC_RG_VPROC_CSR | PMIC_RG_VPROC_CC | Reserved | PMIC_RG_VPROC_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_NDIS_EN | PMIC_RG_VPROC_MODESET | Reserved | PMIC_RG_VPROC_CSM | PMIC_RG_VPROC_AVP_EN | PMIC_RG_VPROC_AVP_OS | |||||||||
| Type | - | W | W | - | W | W | W | |||||||||
| Reset | - | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_VSLEEP | Reserved | PMIC_RG_VPROC_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPROC_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_TRACK_ON_CTRL | PMIC_VPROC_BURST_CTRL | PMIC_VPROC_DLC_CTRL | PMIC_VPROC_VOSEL_CTRL | PMIC_VPROC_EN_CTRL | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_BURST_SEL | Reserved | PMIC_VPROC_DLC_SEL | Reserved | PMIC_VPROC_VOSEL_SEL | Reserved | PMIC_VPROC_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VPROC_OC_STATUS | PMIC_QI_VPROC_MODE | PMIC_QI_VPROC_EN | PMIC_QI_VPROC_STB | Reserved | PMIC_VPROC_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VPROC_SFCHG_REN | PMIC_VPROC_SFCHG_RRATE | PMIC_VPROC_SFCHG_FEN | PMIC_VPROC_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPROC_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VPROC_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_BURST | Reserved | PMIC_VPROC_BURST_SLEEP | Reserved | PMIC_VPROC_BURST_ON | Reserved | PMIC_VPROC_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_DLC | Reserved | PMIC_VPROC_DLC_SLEEP | Reserved | PMIC_VPROC_DLC_ON | Reserved | PMIC_VPROC_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_DLC_N | Reserved | PMIC_VPROC_DLC_N_SLEEP | Reserved | PMIC_VPROC_DLC_N_ON | Reserved | PMIC_VPROC_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_BURSTH | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPROC_BURSTL | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VPROC_VSLEEP_SEL | PMIC_NI_VPROC_R2R_PDN | Reserved | PMIC_VPROC_VSLEEP_SEL | PMIC_VPROC_R2R_PDN | Reserved | PMIC_VPROC_VSLEEP_EN | PMIC_NI_VPROC_VOSEL_TRANS | PMIC_VPROC_VOSEL_TRANS_ONCE | PMIC_VPROC_VOSEL_TRANS_EN | Reserved | PMIC_VPROC_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSRAM_TRIMH | Reserved | PMIC_RG_VSRAM_TRIML | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSRAM_ZX_OS | Reserved | PMIC_RG_VSRAM_CSL | PMIC_RG_VSRAM_CSR | PMIC_RG_VSRAM_CC | Reserved | PMIC_RG_VSRAM_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSRAM_NDIS_EN | PMIC_RG_VSRAM_MODESET | Reserved | PMIC_RG_VSRAM_CSM | Reserved | ||||||||||
| Type | - | W | W | - | W | - | ||||||||||
| Reset | - | ? | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_VSLEEP | PMIC_RG_VSRAM_SLP | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSRAM_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_TRACK_SLEEP_CTRL | PMIC_VSRAM_TRACK_ON_CTRL | PMIC_VSRAM_BURST_CTRL | PMIC_VSRAM_DLC_CTRL | PMIC_VSRAM_VOSEL_CTRL | PMIC_VSRAM_EN_CTRL | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_BURST_SEL | Reserved | PMIC_VSRAM_DLC_SEL | Reserved | PMIC_VSRAM_VOSEL_SEL | Reserved | PMIC_VSRAM_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VSRAM_OC_STATUS | PMIC_QI_VSRAM_MODE | PMIC_QI_VSRAM_EN | PMIC_QI_VSRAM_STB | Reserved | PMIC_VSRAM_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VSRAM_SFCHG_REN | PMIC_VSRAM_SFCHG_RRATE | PMIC_VSRAM_SFCHG_FEN | PMIC_VSRAM_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VSRAM_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_BURST | Reserved | PMIC_VSRAM_BURST_SLEEP | Reserved | PMIC_VSRAM_BURST_ON | Reserved | PMIC_VSRAM_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_DLC | Reserved | PMIC_VSRAM_DLC_SLEEP | Reserved | PMIC_VSRAM_DLC_ON | Reserved | PMIC_VSRAM_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_DLC_N | Reserved | PMIC_VSRAM_DLC_N_SLEEP | Reserved | PMIC_VSRAM_DLC_N_ON | Reserved | PMIC_VSRAM_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_BURSTH | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VSRAM_BURSTL | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VSRAM_VSLEEP_SEL | PMIC_NI_VSRAM_R2R_PDN | Reserved | PMIC_VSRAM_VSLEEP_SEL | PMIC_VSRAM_R2R_PDN | Reserved | PMIC_VSRAM_VSLEEP_EN | PMIC_NI_VSRAM_VOSEL_TRANS | PMIC_VSRAM_VOSEL_TRANS_ONCE | PMIC_VSRAM_VOSEL_TRANS_EN | Reserved | PMIC_VSRAM_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL_OFFSET | Reserved | PMIC_VSRAM_VOSEL_DELTA | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL_ON_HB | Reserved | PMIC_VSRAM_VOSEL_ON_LB | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VSRAM_VOSEL_SLEEP_LB | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCORE_TRIMH | Reserved | PMIC_RG_VCORE_TRIML | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VCORE_ZX_OS | Reserved | PMIC_RG_VCORE_CSL | PMIC_RG_VCORE_CSR | PMIC_RG_VCORE_CC | Reserved | PMIC_RG_VCORE_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCORE_NDIS_EN | PMIC_RG_VCORE_MODESET | Reserved | PMIC_RG_VCORE_CSM | PMIC_RG_VCORE_AVP_EN | PMIC_RG_VCORE_AVP_OS | |||||||||
| Type | - | W | W | - | W | W | W | |||||||||
| Reset | - | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_VSLEEP | Reserved | PMIC_RG_VCORE_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCORE_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VCORE_BURST_CTRL | PMIC_VCORE_DLC_CTRL | PMIC_VCORE_VOSEL_CTRL | PMIC_VCORE_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VCORE_BURST_SEL | Reserved | PMIC_VCORE_DLC_SEL | Reserved | PMIC_VCORE_VOSEL_SEL | Reserved | PMIC_VCORE_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VCORE_OC_STATUS | PMIC_QI_VCORE_MODE | PMIC_QI_VCORE_EN | PMIC_QI_VCORE_STB | Reserved | PMIC_VCORE_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VCORE_SFCHG_REN | PMIC_VCORE_SFCHG_RRATE | PMIC_VCORE_SFCHG_FEN | PMIC_VCORE_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VCORE_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VCORE_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VCORE_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VCORE_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_BURST | Reserved | PMIC_VCORE_BURST_SLEEP | Reserved | PMIC_VCORE_BURST_ON | Reserved | PMIC_VCORE_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_DLC | Reserved | PMIC_VCORE_DLC_SLEEP | Reserved | PMIC_VCORE_DLC_ON | Reserved | PMIC_VCORE_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_DLC_N | Reserved | PMIC_VCORE_DLC_N_SLEEP | Reserved | PMIC_VCORE_DLC_N_ON | Reserved | PMIC_VCORE_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_BURSTH | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VCORE_BURSTL | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VCORE_VSLEEP_SEL | PMIC_NI_VCORE_R2R_PDN | Reserved | PMIC_VCORE_VSLEEP_SEL | PMIC_VCORE_R2R_PDN | Reserved | PMIC_VCORE_VSLEEP_EN | PMIC_NI_VCORE_VOSEL_TRANS | PMIC_VCORE_VOSEL_TRANS_ONCE | PMIC_VCORE_VOSEL_TRANS_EN | Reserved | PMIC_VCORE_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VM_TRIMH | Reserved | PMIC_RG_VM_TRIML | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VM_ZX_OS | Reserved | PMIC_RG_VM_CSL | PMIC_RG_VM_CSR | PMIC_RG_VM_CC | Reserved | PMIC_RG_VM_RZSEL | |||||||||
| Type | W | - | W | W | W | - | W | |||||||||
| Reset | ? | - | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VM_NDIS_EN | PMIC_RG_VM_MODESET | Reserved | PMIC_RG_VM_CSM | PMIC_RG_VM_AVP_EN | PMIC_RG_VM_AVP_OS | |||||||||
| Type | - | W | W | - | W | W | W | |||||||||
| Reset | - | ? | ? | - | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_VSLEEP | Reserved | PMIC_RG_VM_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VM_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VM_BURST_CTRL | PMIC_VM_DLC_CTRL | PMIC_VM_VOSEL_CTRL | PMIC_VM_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VM_BURST_SEL | Reserved | PMIC_VM_DLC_SEL | Reserved | PMIC_VM_VOSEL_SEL | Reserved | PMIC_VM_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VM_OC_STATUS | PMIC_QI_VM_MODE | PMIC_QI_VM_EN | PMIC_QI_VM_STB | Reserved | PMIC_VM_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VM_SFCHG_REN | PMIC_VM_SFCHG_RRATE | PMIC_VM_SFCHG_FEN | PMIC_VM_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VM_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VM_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VM_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VM_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_BURST | Reserved | PMIC_VM_BURST_SLEEP | Reserved | PMIC_VM_BURST_ON | Reserved | PMIC_VM_BURST | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_DLC | Reserved | PMIC_VM_DLC_SLEEP | Reserved | PMIC_VM_DLC_ON | Reserved | PMIC_VM_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_DLC_N | Reserved | PMIC_VM_DLC_N_SLEEP | Reserved | PMIC_VM_DLC_N_ON | Reserved | PMIC_VM_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_BURSTH | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VM_BURSTL | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VM_VSLEEP_SEL | PMIC_NI_VM_R2R_PDN | Reserved | PMIC_VM_VSLEEP_SEL | PMIC_VM_R2R_PDN | Reserved | PMIC_VM_VSLEEP_EN | PMIC_NI_VM_VOSEL_TRANS | PMIC_VM_VOSEL_TRANS_ONCE | PMIC_VM_VOSEL_TRANS_EN | Reserved | PMIC_VM_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO18_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VIO18_ZX_OS | PMIC_RG_VIO18_SLEW | PMIC_RG_VIO18_SLEW_NMOS | PMIC_RG_VIO18_CSL | PMIC_RG_VIO18_CSR | PMIC_RG_VIO18_CC | Reserved | PMIC_RG_VIO18_RZSEL | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO18_CSMIR | Reserved | PMIC_RG_VIO18_NDIS_EN | PMIC_RG_VIO18_MODESET | Reserved | ||||||||||
| Type | - | W | - | W | W | - | ||||||||||
| Reset | - | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO18_SLP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO18_RSV | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO18_BURST_CTRL | PMIC_VIO18_DLC_CTRL | PMIC_VIO18_VOSEL_CTRL | PMIC_VIO18_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO18_BURST_SEL | Reserved | PMIC_VIO18_DLC_SEL | Reserved | PMIC_VIO18_VOSEL_SEL | Reserved | PMIC_VIO18_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO18_OC_STATUS | PMIC_QI_VIO18_MODE | PMIC_QI_VIO18_EN | PMIC_QI_VIO18_STB | Reserved | PMIC_VIO18_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VIO18_SFCHG_REN | PMIC_VIO18_SFCHG_RRATE | PMIC_VIO18_SFCHG_FEN | PMIC_VIO18_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO18_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO18_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VIO18_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VIO18_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VIO18_BURST | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VIO18_DLC | Reserved | PMIC_VIO18_DLC_SLEEP | Reserved | PMIC_VIO18_DLC_ON | Reserved | PMIC_VIO18_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VIO18_DLC_N | Reserved | PMIC_VIO18_DLC_N_SLEEP | Reserved | PMIC_VIO18_DLC_N_ON | Reserved | PMIC_VIO18_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VIO18_BURSTH | Reserved | PMIC_VIO18_BURSTH_SLEEP | Reserved | PMIC_VIO18_BURSTH_ON | Reserved | PMIC_VIO18_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VIO18_BURSTL | Reserved | PMIC_VIO18_BURSTL_SLEEP | Reserved | PMIC_VIO18_BURSTL_ON | Reserved | PMIC_VIO18_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VIO18_VSLEEP_SEL | PMIC_QI_VIO18_SLEEP_PDN | Reserved | PMIC_VIO18_VSLEEP_SEL | PMIC_VIO18_SLEEP_PDN | Reserved | PMIC_VIO18_VSLEEP_EN | PMIC_NI_VIO18_VOSEL_TRANS | PMIC_VIO18_VOSEL_TRANS_ONCE | PMIC_VIO18_VOSEL_TRANS_EN | Reserved | PMIC_VIO18_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPA_TRIMH | Reserved | PMIC_RG_VPA_TRIML | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_ZX_OS | PMIC_RG_VPA_SLEW | PMIC_RG_VPA_SLEW_NMOS | PMIC_RG_VPA_CSL | PMIC_RG_VPA_CSR | PMIC_RG_VPA_CC | Reserved | PMIC_RG_VPA_RZSEL | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_VBAT_DEL | PMIC_RG_VPA_CSMIR | Reserved | PMIC_RG_VPA_NDIS_EN | PMIC_RG_VPA_MODESET | Reserved | ||||||||||
| Type | W | W | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VPA_GPU_EN | Reserved | PMIC_RG_VPA_SLP | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VPA_RSV | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_BURST_CTRL | PMIC_VPA_DLC_CTRL | PMIC_VPA_VOSEL_CTRL | PMIC_VPA_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_BURST_SEL | Reserved | PMIC_VPA_DLC_SEL | Reserved | PMIC_VPA_VOSEL_SEL | Reserved | PMIC_VPA_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VPA_OC_STATUS | PMIC_QI_VPA_MODE | PMIC_QI_VPA_EN | PMIC_QI_VPA_STB | Reserved | PMIC_VPA_EN | ||||||||||
| Type | R | R | R | R | - | W | ||||||||||
| Reset | ? | ? | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VPA_SFCHG_REN | PMIC_VPA_SFCHG_RRATE | PMIC_VPA_SFCHG_FEN | PMIC_VPA_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VPA_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_BURST | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_DLC | Reserved | PMIC_VPA_DLC_SLEEP | Reserved | PMIC_VPA_DLC_ON | Reserved | PMIC_VPA_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_DLC_N | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_BURSTH | Reserved | PMIC_VPA_BURSTH_SLEEP | Reserved | PMIC_VPA_BURSTH_ON | Reserved | PMIC_VPA_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VPA_BURSTL | Reserved | PMIC_VPA_BURSTL_SLEEP | Reserved | PMIC_VPA_BURSTL_ON | Reserved | PMIC_VPA_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VPA_VSLEEP_SEL | PMIC_NI_VPA_R2R_PDN | Reserved | PMIC_VPA_VSLEEP_SEL | PMIC_VPA_R2R_PDN | Reserved | PMIC_VPA_VSLEEP_EN | PMIC_NI_VPA_DVS_BW | PMIC_VPA_VOSEL_TRANS_ONCE | PMIC_VPA_VOSEL_TRANS_EN | Reserved | PMIC_VPA_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_DLC001 | Reserved | PMIC_VPA_DLC_MAP_EN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VPA_VOSEL_DLC111 | Reserved | PMIC_VPA_VOSEL_DLC011 | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VRF18_ZX_OS | PMIC_RG_VRF18_SLEW | PMIC_RG_VRF18_SLEW_NMOS | PMIC_RG_VRF18_CSL | PMIC_RG_VRF18_CSR | PMIC_RG_VRF18_CC | Reserved | PMIC_RG_VRF18_RZSEL | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_GMSEL | PMIC_RG_VRF18_OCFB_EN | PMIC_RG_VRF18_NDIS_EN | PMIC_RG_VRF18_MODESET | Reserved | PMIC_RG_VRF18_AVP_EN | Reserved | ||||||||
| Type | - | W | W | W | W | - | W | - | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_SLP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_RSV_7_2 | PMIC_RG_VRF18_BK_LDO | PMIC_RG_VRF18_RSV_0 | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_BURST_CTRL | PMIC_VRF18_DLC_CTRL | PMIC_VRF18_VOSEL_CTRL | PMIC_VRF18_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_BURST_SEL | Reserved | PMIC_VRF18_DLC_SEL | Reserved | PMIC_VRF18_VOSEL_SEL | Reserved | PMIC_VRF18_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRF18_OC_STATUS | PMIC_QI_VRF18_MODE | PMIC_QI_VRF18_EN | PMIC_QI_VRF18_STB | Reserved | PMIC_VRF18_STBTD | Reserved | PMIC_VRF18_EN | ||||||||
| Type | R | R | R | R | - | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VRF18_SFCHG_REN | PMIC_VRF18_SFCHG_RRATE | PMIC_VRF18_SFCHG_FEN | PMIC_VRF18_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VRF18_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_BURST | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_DLC | Reserved | PMIC_VRF18_DLC_SLEEP | Reserved | PMIC_VRF18_DLC_ON | Reserved | PMIC_VRF18_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_DLC_N | Reserved | PMIC_VRF18_DLC_N_SLEEP | Reserved | PMIC_VRF18_DLC_N_ON | Reserved | PMIC_VRF18_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_BURSTH | Reserved | PMIC_VRF18_BURSTH_SLEEP | Reserved | PMIC_VRF18_BURSTH_ON | Reserved | PMIC_VRF18_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_BURSTL | Reserved | PMIC_VRF18_BURSTL_SLEEP | Reserved | PMIC_VRF18_BURSTL_ON | Reserved | PMIC_VRF18_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VRF18_VSLEEP_SEL | PMIC_NI_VRF18_R2R_PDN | Reserved | PMIC_VRF18_VSLEEP_SEL | PMIC_VRF18_R2R_PDN | Reserved | PMIC_VRF18_VSLEEP_EN | PMIC_NI_VRF18_VOSEL_TRANS | PMIC_VRF18_VOSEL_TRANS_ONCE | PMIC_VRF18_VOSEL_TRANS_EN | Reserved | PMIC_VRF18_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_MD2_EN_SEL | PMIC_VRF18_MD2_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_MD1_EN_SEL | Reserved | |||||||||||||
| Type | - | W | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_2_TRIM | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VRF18_2_ZX_OS | PMIC_RG_VRF18_2_SLEW | PMIC_RG_VRF18_2_SLEW_NMOS | PMIC_RG_VRF18_2_CSL | PMIC_RG_VRF18_2_CSR | PMIC_RG_VRF18_2_CC | Reserved | PMIC_RG_VRF18_2_RZSEL | ||||||||
| Type | W | W | W | W | W | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_2_GMSEL | PMIC_RG_VRF18_2_OCFB_EN | PMIC_RG_VRF18_2_NDIS_EN | PMIC_RG_VRF18_2_MODESET | Reserved | PMIC_RG_VRF18_2_AVP_EN | Reserved | ||||||||
| Type | - | W | W | W | W | - | W | - | ||||||||
| Reset | - | ? | ? | ? | ? | - | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_2_SLP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF18_2_RSV_7_2 | PMIC_RG_VRF18_2_BK_LDO | PMIC_RG_VRF18_2_RSV_0 | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_BURST_CTRL | PMIC_VRF18_2_DLC_CTRL | PMIC_VRF18_2_VOSEL_CTRL | PMIC_VRF18_2_EN_CTRL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_BURST_SEL | Reserved | PMIC_VRF18_2_DLC_SEL | Reserved | PMIC_VRF18_2_VOSEL_SEL | Reserved | PMIC_VRF18_2_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRF18_2_OC_STATUS | PMIC_QI_VRF18_2_MODE | PMIC_QI_VRF18_2_EN | PMIC_QI_VRF18_2_STB | Reserved | PMIC_VRF18_2_STBTD | Reserved | PMIC_VRF18_2_EN | ||||||||
| Type | R | R | R | R | - | W | - | W | ||||||||
| Reset | ? | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VRF18_2_SFCHG_REN | PMIC_VRF18_2_SFCHG_RRATE | PMIC_VRF18_2_SFCHG_FEN | PMIC_VRF18_2_SFCHG_FRATE | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_VOSEL | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_VOSEL_ON | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VRF18_2_VOSEL_SLEEP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_NI_VRF18_2_VOSEL | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_2_BURST | Reserved | |||||||||||||
| Type | - | R | - | |||||||||||||
| Reset | - | ? | - | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_2_DLC | Reserved | PMIC_VRF18_2_DLC_SLEEP | Reserved | PMIC_VRF18_2_DLC_ON | Reserved | PMIC_VRF18_2_DLC | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_2_DLC_N | Reserved | PMIC_VRF18_2_DLC_N_SLEEP | Reserved | PMIC_VRF18_2_DLC_N_ON | Reserved | PMIC_VRF18_2_DLC_N | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_2_BURSTH | Reserved | PMIC_VRF18_2_BURSTH_SLEEP | Reserved | PMIC_VRF18_2_BURSTH_ON | Reserved | PMIC_VRF18_2_BURSTH | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_VRF18_2_BURSTL | Reserved | PMIC_VRF18_2_BURSTL_SLEEP | Reserved | PMIC_VRF18_2_BURSTL_ON | Reserved | PMIC_VRF18_2_BURSTL | ||||||||
| Type | - | R | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_NI_VRF18_2_VSLEEP_SEL | PMIC_NI_VRF18_2_R2R_PDN | Reserved | PMIC_VRF18_2_VSLEEP_SEL | PMIC_VRF18_2_R2R_PDN | Reserved | PMIC_VRF18_2_VSLEEP_EN | PMIC_NI_VRF18_2_VOSEL_TRANS | PMIC_VRF18_2_VOSEL_TRANS_ONCE | PMIC_VRF18_2_VOSEL_TRANS_EN | Reserved | PMIC_VRF18_2_TRANSTD | ||||
| Type | R | R | - | W | W | - | W | R | W | W | - | W | ||||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | ? | - | ? | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_K_CONTROL_SMPS | Reserved | PMIC_K_AUTO_EN | PMIC_K_SRC_SEL | PMIC_K_START_MANUAL | PMIC_K_ONCE | PMIC_K_ONCE_EN | PMIC_K_MAP_SEL | PMIC_K_RST_DONE | ||||||
| Type | - | W | - | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_QI_SMPS_OSC_CAL | PMIC_K_CONTROL | Reserved | PMIC_K_DONE | PMIC_K_RESULT | ||||||||||
| Type | - | R | R | - | R | R | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRF28_EN | PMIC_VRF28_ON_CTRL | Reserved | PMIC_RG_VRF28_EN | Reserved | PMIC_RG_VRF28_STBTD | Reserved | PMIC_VRF28_SRCLK_EN_SEL | Reserved | |||||||
| Type | R | W | - | W | - | W | - | W | - | |||||||
| Reset | ? | ? | - | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VTCXO_EN | PMIC_VTCXO_SRCLK_EN_SEL | PMIC_VTCXO_ON_CTRL | PMIC_RG_VTCXO_EN | PMIC_RG_VTCXO_STBTD | PMIC_QI_VTCXO_MODE | PMIC_VTCXO_SRCLK_MODE_SEL | Reserved | PMIC_VTCXO_LP_SET | PMIC_VTCXO_LP_SEL | ||||||
| Type | R | W | W | W | W | R | W | - | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VA_EN | PMIC_RG_VA_EN | PMIC_RG_VA_STBTD | Reserved | PMIC_QI_VA_MODE | Reserved | PMIC_VA_SRCLK_MODE_SEL | Reserved | PMIC_VA_LP_SET | PMIC_VA_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VA28_EN | PMIC_RG_VA28_EN | PMIC_RG_VA28_STBTD | Reserved | PMIC_QI_VA28_MODE | Reserved | PMIC_VA28_SRCLK_MODE_SEL | Reserved | PMIC_VA28_LP_SET | PMIC_VA28_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VCAMA_EN | Reserved | PMIC_RG_VCAMA_STBTD | Reserved | ||||||||||||
| Type | W | - | W | - | ||||||||||||
| Reset | ? | - | ? | - | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRF28_OC_STATUS | Reserved | PMIC_QI_VTCXO_OC_STATUS | Reserved | PMIC_QI_VA_OC_STATUS | PMIC_QI_VA28_OC_STATUS | Reserved | PMIC_QI_VCAMA_OC_STATUS | PMIC_RG_VRF28_BIST_EN | PMIC_RG_VRF28_2_BIST_EN | PMIC_RG_VTCXO_BIST_EN | PMIC_RG_VTCXO_2_BIST_EN | PMIC_RG_VA_BIST_EN | PMIC_RG_VA28_BIST_EN | Reserved | PMIC_RG_VCAMA_BIST_EN |
| Type | R | - | R | - | R | R | - | R | W | W | W | W | W | W | - | W |
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | - | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF28_CAL | Reserved | PMIC_RG_VRF28_OCFB | Reserved | PMIC_RG_VRF28_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VTCXO_CAL | Reserved | PMIC_RG_VTCXO_OCFB | Reserved | PMIC_RG_VTCXO_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VA_CAL | Reserved | PMIC_RG_VA_VOSEL | Reserved | PMIC_RG_VA_OCFB | Reserved | PMIC_RG_VA_NDIS_EN | Reserved | |||||||
| Type | - | W | - | W | - | W | - | W | - | |||||||
| Reset | - | ? | - | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VA28_CAL | Reserved | PMIC_RG_VA28_OCFB_EN | Reserved | PMIC_RG_VA28_NDIS_EN | PMIC_RG_VRF28_VOSEL | Reserved | ||||||||
| Type | - | W | - | W | - | W | W | - | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VCAMA_CAL | PMIC_RG_VCAMA_VOSEL | PMIC_RG_VCAMA_OCFB | PMIC_RG_VCAMA_NDIS_EN | Reserved | PMIC_RG_VCAMA_FBSEL | |||||||||
| Type | - | W | W | W | W | - | W | |||||||||
| Reset | - | ? | ? | ? | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VTCXO_2_CAL | Reserved | PMIC_RG_VTCXO_2_OCFB | Reserved | PMIC_RG_VTCXO_2_NDIS_EN | PMIC_RG_VTCXO_2_VOSEL | Reserved | ||||||||
| Type | - | W | - | W | - | W | W | - | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VRF28_2_CAL | Reserved | PMIC_RG_VRF28_2_OCFB | Reserved | PMIC_RG_VRF28_2_NDIS_EN | PMIC_RG_VRF28_2_VOSEL | Reserved | ||||||||
| Type | - | W | - | W | - | W | W | - | ||||||||
| Reset | - | ? | - | ? | - | ? | ? | - | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRF28_2_EN | PMIC_VRF28_ON_2_CTRL | Reserved | PMIC_RG_VRF28_2_EN | Reserved | PMIC_RG_VRF28_2_STBTD | Reserved | PMIC_VRF28_2_SRCLK_EN_SEL | Reserved | |||||||
| Type | R | W | - | W | - | W | - | W | - | |||||||
| Reset | ? | ? | - | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VTCXO_2_EN | PMIC_VTCXO_2_SRCLK_EN_SEL | PMIC_VTCXO_2_ON_CTRL | PMIC_RG_VTCXO_2_EN | PMIC_RG_VTCXO_2_STBTD | PMIC_QI_VTCXO_2_MODE | PMIC_VTCXO_2_SRCLK_MODE_SEL | Reserved | PMIC_VTCXO_2_LP_SET | PMIC_VTCXO_2_LP_SEL | ||||||
| Type | R | W | W | W | W | R | W | - | W | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ALDO_RESERVE_1 | Reserved | PMIC_RG_ALDO_RESERVE_2 | Reserved | PMIC_ANALDO_RSV0 | PMIC_ANALDO_RSV1 | ||||||||||
| Type | W | - | W | - | W | W | ||||||||||
| Reset | ? | - | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO28_EN | PMIC_VIO28_EN | PMIC_RG_VIO28_STBTD | Reserved | PMIC_QI_VIO28_MODE | Reserved | PMIC_VIO28_SRCLK_MODE_SEL | Reserved | PMIC_VIO28_LP_MODE_SET | PMIC_VIO28_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VUSB_EN | PMIC_RG_VUSB_EN | PMIC_RG_VUSB_STBTD | Reserved | PMIC_QI_VUSB_MODE | Reserved | PMIC_VUSB_SRCLK_MODE_SEL | Reserved | PMIC_VUSB_LP_MODE_SET | PMIC_VUSB_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VMC1_EN | PMIC_RG_VMC1_INT_DIS_SEL | PMIC_RG_VMC1_EN | Reserved | PMIC_RG_VMC1_STBTD | PMIC_QI_VMC1_MODE | Reserved | PMIC_VMC1_SRCLK_MODE_SEL | Reserved | PMIC_VMC1_LP_MODE_SET | PMIC_VMC1_LP_SEL | |||||
| Type | R | W | W | - | W | R | - | W | - | W | W | |||||
| Reset | ? | ? | ? | - | ? | ? | - | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VMCH1_EN | PMIC_RG_VMCH1_EN | PMIC_RG_VMCH1_STBTD | Reserved | PMIC_QI_VMCH1_MODE | Reserved | PMIC_VMCH1_SRCLK_MODE_SEL | Reserved | PMIC_VMCH1_LP_MODE_SET | PMIC_VMCH1_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VEMC_3V3_EN | PMIC_RG_VEMC_3V3_EN | PMIC_RG_VEMC_3V3_STBTD | Reserved | PMIC_QI_VEMC_3V3_MODE | Reserved | PMIC_VEMC_3V3_SRCLK_MODE_SEL | Reserved | PMIC_VEMC_3V3_LP_MODE_SET | PMIC_VEMC_3V3_LP_SEL | ||||||
| Type | R | W | W | - | R | - | W | - | W | W | ||||||
| Reset | ? | ? | ? | - | ? | - | ? | - | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP1_EN | Reserved | PMIC_RG_VGP1_STBTD | Reserved | PMIC_QI_VGP1_MODE | PMIC_VGP1_SRCLK_MODE_SEL | Reserved | PMIC_VGP1_LP_MODE_SET | PMIC_VGP1_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP2_EN | Reserved | PMIC_RG_VGP2_STBTD | Reserved | PMIC_QI_VGP2_MODE | PMIC_VGP2_SRCLK_MODE_SEL | Reserved | PMIC_VGP2_LP_MODE_SET | PMIC_VGP2_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP3_EN | Reserved | PMIC_RG_VGP3_STBTD | Reserved | PMIC_QI_VGP3_MODE | PMIC_VGP3_SRCLK_MODE_SEL | Reserved | PMIC_VGP3_LP_MODE_SET | PMIC_VGP3_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP4_EN | Reserved | PMIC_RG_VGP4_STBTD | Reserved | PMIC_QI_VGP4_MODE | PMIC_VGP4_SRCLK_MODE_SEL | Reserved | PMIC_VGP4_LP_MODE_SET | PMIC_VGP4_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP5_EN | Reserved | PMIC_RG_VGP5_STBTD | Reserved | PMIC_QI_VGP5_MODE | PMIC_VGP5_SRCLK_MODE_SEL | Reserved | PMIC_VGP5_LP_MODE_SET | PMIC_VGP5_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP6_EN | Reserved | PMIC_RG_VGP6_STBTD | Reserved | PMIC_QI_VGP6_MODE | PMIC_VGP6_SRCLK_MODE_SEL | Reserved | PMIC_VGP6_LP_MODE_SET | PMIC_VGP6_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSIM1_EN | Reserved | PMIC_RG_VSIM1_STBTD | Reserved | PMIC_QI_VSIM1_MODE | PMIC_VSIM1_SRCLK_MODE_SEL | Reserved | PMIC_VSIM1_LP_MODE_SET | PMIC_VSIM1_LP_SEL | |||||||
| Type | W | - | W | - | R | W | - | W | W | |||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VSIM2_EN | Reserved | PMIC_RG_VSIM2_STBTD | Reserved | PMIC_QI_VSIM2_MODE | PMIC_VSIM2_SRCLK_MODE_SEL | Reserved | PMIC_VSIM2_THER_SHDN_EN | PMIC_VSIM2_LP_MODE_SET | PMIC_VSIM2_LP_SEL | ||||||
| Type | W | - | W | - | R | W | - | W | W | W | ||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VRTC_EN | Reserved | PMIC_VRTC_EN | Reserved | ||||||||||||
| Type | R | - | W | - | ||||||||||||
| Reset | ? | - | ? | - | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VIO28_BIST_EN | Reserved | PMIC_RG_VUSB_BIST_EN | PMIC_RG_VMC1_BIST_EN | Reserved | PMIC_RG_VMCH1_BIST_EN | Reserved | PMIC_RG_VEMC_3V3_BIST_EN | Reserved | |||||||
| Type | W | - | W | W | - | W | - | W | - | |||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VGP1_BIST_EN | PMIC_RG_VGP2_BIST_EN | Reserved | PMIC_RG_VGP3_BIST_EN | PMIC_RG_VGP4_BIST_EN | Reserved | PMIC_RG_VGP5_BIST_EN | PMIC_RG_VGP6_BIST_EN | PMIC_RG_VIBR_BIST_EN | Reserved | PMIC_RG_VSIM1_BIST_EN | PMIC_RG_VSIM2_BIST_EN | PMIC_RG_VEMC_1V8_BIST_EN | PMIC_RG_VRTC_BIST_EN | ||
| Type | W | W | - | W | W | - | W | W | W | - | W | W | W | W | ||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | - | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VIO28_OC_STATUS | Reserved | PMIC_QI_VUSB_OC_STATUS | PMIC_QI_VMC1_OC_STATUS | Reserved | PMIC_QI_VMCH1_OC_STATUS | Reserved | PMIC_QI_VEMC_3V3_OC_STATUS | Reserved | |||||||
| Type | R | - | R | R | - | R | - | R | - | |||||||
| Reset | ? | - | ? | ? | - | ? | - | ? | - | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VGP1_OC_STATUS | PMIC_QI_VGP2_OC_STATUS | Reserved | PMIC_QI_VGP3_OC_STATUS | PMIC_QI_VGP4_OC_STATUS | Reserved | PMIC_QI_VGP5_OC_STATUS | PMIC_QI_VGP6_OC_STATUS | PMIC_QI_VIBR_OC_STATUS | Reserved | PMIC_QI_VSIM1_OC_STATUS | PMIC_QI_VSIM2_OC_STATUS | PMIC_QI_VEMC_1V8_OC_STATUS | PMIC_QI_VAST_OC_STATUS | ||
| Type | R | R | - | R | R | - | R | R | R | - | R | R | R | R | ||
| Reset | ? | ? | - | ? | ? | - | ? | ? | ? | - | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VAST_EN | PMIC_RG_VAST_VOSEL | PMIC_RG_VAST_EN | Reserved | PMIC_RG_VAST_STBTD | PMIC_QI_VAST_MODE | PMIC_VAST_SRCLK_MODE_SEL | PMIC_RG_VAST_SLEEP | PMIC_RG_VAST_DIS_SRCLKEN | PMIC_VAST_LP_MODE_SET | PMIC_VAST_LP_SEL | |||||
| Type | R | W | W | - | W | R | W | W | W | W | W | |||||
| Reset | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIO28_CAL | Reserved | PMIC_RG_VIO28_OCFB | Reserved | PMIC_RG_VIO28_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VUSB_CAL | Reserved | PMIC_RG_VUSB_OCFB | Reserved | PMIC_RG_VUSB_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VMC1_CAL | Reserved | PMIC_RG_VMC1_STB_SEL | Reserved | PMIC_RG_VMC1_VOSEL | Reserved | PMIC_RG_VMC1_OCFB | Reserved | PMIC_RG_VMC1_NDIS_EN | ||||||
| Type | - | W | - | W | - | W | - | W | - | W | ||||||
| Reset | - | ? | - | ? | - | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VMCH1_CAL | PMIC_RG_VMCH1_VOSEL | PMIC_RG_VMCH1_STB_SEL | Reserved | PMIC_RG_VMCH1_DB_EN | Reserved | PMIC_RG_VMCH1_OCFB | Reserved | PMIC_RG_VMCH1_NDIS_EN | ||||||
| Type | - | W | W | W | - | W | - | W | - | W | ||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VEMC_3V3_CAL | PMIC_RG_VEMC_3V3_VOSEL | PMIC_RG_VEMC_3V3_STB_SEL | Reserved | PMIC_RG_VEMC_3V3_DB_EN | Reserved | PMIC_RG_VEMC_3V3_OCFB | Reserved | PMIC_RG_VEMC_3V3_NDIS_EN | ||||||
| Type | - | W | W | W | - | W | - | W | - | W | ||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP1_CAL | PMIC_RG_VGP1_VOSEL | PMIC_RG_VGP1_STB_SEL | Reserved | PMIC_RG_VGP1_OCFB | Reserved | PMIC_RG_VGP1_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP2_CAL | PMIC_RG_VGP2_VOSEL | PMIC_RG_VGP2_STB_SEL | Reserved | PMIC_RG_VGP2_OCFB | Reserved | PMIC_RG_VGP2_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP3_CAL | PMIC_RG_VGP3_VOSEL | PMIC_RG_VGP3_STB_SEL | Reserved | PMIC_RG_VGP3_OCFB | Reserved | PMIC_RG_VGP3_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP4_CAL | PMIC_RG_VGP4_VOSEL | PMIC_RG_VGP4_STB_SEL | Reserved | PMIC_RG_VGP4_OCFB | Reserved | PMIC_RG_VGP4_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP5_CAL | PMIC_RG_VGP5_VOSEL | PMIC_RG_VGP5_STB_SEL | Reserved | PMIC_RG_VGP5_OCFB | Reserved | PMIC_RG_VGP5_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VGP6_CAL | PMIC_RG_VGP6_VOSEL | PMIC_RG_VGP6_STB_SEL | Reserved | PMIC_RG_VGP6_OCFB | Reserved | PMIC_RG_VGP6_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSIM1_CAL | PMIC_RG_VSIM1_VOSEL | PMIC_RG_VSIM1_STB_SEL | Reserved | PMIC_RG_VSIM1_OCFB | Reserved | PMIC_RG_VSIM1_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VSIM2_CAL | PMIC_RG_VSIM2_VOSEL | PMIC_RG_VSIM2_STB_SEL | Reserved | PMIC_RG_VSIM2_OCFB | Reserved | PMIC_RG_VSIM2_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VAST_CAL | Reserved | PMIC_RG_VAST_OCFB | Reserved | PMIC_RG_VAST_NDIS_EN | Reserved | |||||||||
| Type | - | W | - | W | - | W | - | |||||||||
| Reset | - | ? | - | ? | - | ? | - | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_VEMC_1V8_EN | PMIC_RG_VEMC_1V8_EN | PMIC_RG_VEMC_1V8_STBTD | Reserved | PMIC_QI_VEMC_1V8_MODE | PMIC_VEMC_1V8_SRCLK_MODE_SEL | Reserved | PMIC_VEMC_1V8_THER_SHDN_EN | PMIC_VEMC_1V8_LP_MODE_SET | PMIC_VEMC_1V8_LP_SEL | ||||||
| Type | R | W | W | - | R | W | - | W | W | W | ||||||
| Reset | ? | ? | ? | - | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VEMC_1V8_CAL | PMIC_RG_VEMC_1V8_VOSEL | PMIC_RG_VEMC_1V8_STB_SEL | Reserved | PMIC_RG_VEMC_1V8_OCFB | Reserved | PMIC_RG_VEMC_1V8_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_VIBR_EN | Reserved | PMIC_RG_VIBR_STBTD | Reserved | PMIC_QI_VIBR_MODE | PMIC_VIBR_SRCLK_MODE_SEL | Reserved | PMIC_VIBR_THER_SHEN_EN | PMIC_VIBR_LP_MODE_SET | PMIC_VIBR_LP_SEL | ||||||
| Type | W | - | W | - | R | W | - | W | W | W | ||||||
| Reset | ? | - | ? | - | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VIBR_CAL | PMIC_RG_VIBR_VOSEL | PMIC_RG_VIBR_STB_SEL | Reserved | PMIC_RG_VIBR_OCFB | Reserved | PMIC_RG_VIBR_NDIS_EN | ||||||||
| Type | - | W | W | W | - | W | - | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LDO_FT | Reserved | PMIC_DIGLDO_RSV0 | PMIC_DIGLDO_RSV1 | ||||||||||||
| Type | W | - | W | W | ||||||||||||
| Reset | ? | - | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VGP1_SRCLK_EN_SEL | Reserved | PMIC_VGP2_SRCLK_EN_SEL | Reserved | PMIC_VGP3_SRCLK_EN_SEL | Reserved | PMIC_VGP4_SRCLK_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VGP6_SRCLK_EN_SEL | Reserved | PMIC_VSIM1_SRCLK_EN_SEL | Reserved | PMIC_VSIM2_SRCLK_EN_SEL | Reserved | PMIC_VGP5_SRCLK_EN_SEL | ||||||||
| Type | - | W | - | W | - | W | - | W | ||||||||
| Reset | - | ? | - | ? | - | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VGP1_ON_CTRL | PMIC_VGP2_ON_CTRL | PMIC_VGP3_ON_CTRL | PMIC_VGP4_ON_CTRL | PMIC_VGP5_ON_CTRL | PMIC_VGP6_ON_CTRL | PMIC_VSIM1_ON_CTRL | PMIC_VSIM2_ON_CTRL | PMIC_VIBR_ON_CTRL | Reserved | PMIC_VIBR_SRCLK_EN_SEL | |||||
| Type | W | W | W | W | W | W | W | W | W | - | W | |||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | - | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_THRDET_SEL | PMIC_THR_HWPDN_EN | PMIC_RG_STRUP_THR_SEL | Reserved | PMIC_RG_THR_TMODE | PMIC_THR_DET_DIS | |||||||||
| Type | - | W | W | W | - | W | W | |||||||||
| Reset | - | ? | ? | ? | - | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VREF_BG | Reserved | PMIC_RG_STRUP_IREF_TRIM | PMIC_RG_RST_DRVSEL | PMIC_RG_EN_DRVSEL | PMIC_RG_USBDL_KEYDET_EN | PMIC_RG_USBDL_EN | ||||||||
| Type | - | W | - | W | W | W | W | W | ||||||||
| Reset | - | ? | - | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PMU_LEV_UNGATE | PMIC_RG_PMU_RSV | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_PMU_THR_STATUS | Reserved | PMIC_PMU_THR_DEB | Reserved | PMIC_THR_TEST | ||||||||||
| Type | - | R | - | R | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_BIAS_GEN_EN_SEL | PMIC_BIAS_GEN_EN | PMIC_STRUP_PWRON_SEL | PMIC_STRUP_PWRON | PMIC_BIAS_GEN_EN_FORCE | PMIC_STRUP_PWRON_FORCE | PMIC_STRUP_FT_CTRL | Reserved | PMIC_PWRBB_DEB_EN | PMIC_DDUVLO_DEB_EN | |||||
| Type | - | W | W | W | W | W | W | W | - | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | - | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_VTCXO_2_PG_ENB | PMIC_VIO28_PG_ENB | PMIC_VA28_PG_ENB | PMIC_VA_PG_ENB | PMIC_VTCXO_PG_ENB | PMIC_VIO18_PG_ENB | PMIC_VSRAM_PG_ENB | PMIC_VM_PG_ENB | PMIC_VCORE_PG_ENB | PMIC_VPROC_PG_ENB | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_QI_OSC_EN | PMIC_JUST_PWRKEY_RST | Reserved | PMIC_UVLO_L2H_DEB_EN | PMIC_CLR_JUST_RST | Reserved | ||||||||||
| Type | R | R | - | W | W | - | ||||||||||
| Reset | ? | ? | - | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_STRUP_CON8_RSV0 | Reserved | PMIC_STRUP_EXT_PMIC_SEL | PMIC_STRUP_EXT_PMIC_EN | Reserved | PMIC_STRUP_AUXADC_EN_SEL | ||||||||||
| Type | W | - | W | W | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STRUP_PWROFF_PREOFF_EN | PMIC_STRUP_PWROFF_SEQ_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C0 | Reserved | PMIC_RG_ADC_OUT_C0 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C1 | Reserved | PMIC_RG_ADC_OUT_C1 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C2 | Reserved | PMIC_RG_ADC_OUT_C2 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C3 | Reserved | PMIC_RG_ADC_OUT_C3 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C4 | Reserved | PMIC_RG_ADC_OUT_C4 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C5 | Reserved | PMIC_RG_ADC_OUT_C5 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C6 | Reserved | PMIC_RG_ADC_OUT_C6 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_C7 | Reserved | PMIC_RG_ADC_OUT_C7 | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_WAKEUP_PCHR | Reserved | PMIC_RG_ADC_OUT_WAKEUP_PCHR | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_WAKEUP_SWCHR | Reserved | PMIC_RG_ADC_OUT_WAKEUP_SWCHR | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_RDY_LBAT | Reserved | PMIC_RG_ADC_OUT_LBAT | |||||||||||||
| Type | R | - | R | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C0_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C1_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C2_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C3_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C4_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C5_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C6_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_C7_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_WAKEUP_PCHR_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_WAKEUP_SWCHR_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_LBAT_TRIM | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_ADC_OUT_AVG_DECI | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPL_NUM | PMIC_RG_AVG_NUM | PMIC_RG_BUF_PWD_ON | PMIC_RG_ADC_PWD_ON | PMIC_RG_BUF_PWD_B | PMIC_RG_ADC_PWD_B | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUXADC_CHSEL | PMIC_RG_AUXADC_AUTO_STR_EN | PMIC_RG_AUXADC_AUTO_STR | Reserved | PMIC_RG_ADC_TRIM_COMP | PMIC_RG_AUXADC_BIST_ENB | PMIC_RG_AUXADC_START | ||||||||
| Type | - | W | W | W | - | W | W | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_DEBT_MIN | PMIC_RG_LBAT_DEBT_MAX | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_DET_PRD_15_0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DET_PRD_19_16 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_MAX_IRQ_B | Reserved | PMIC_RG_LBAT_EN_MAX | PMIC_RG_LBAT_IRQ_EN_MAX | Reserved | PMIC_RG_LBAT_VOLT_MAX | ||||||||||
| Type | R | - | W | W | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_LBAT_MIN_IRQ_B | Reserved | PMIC_RG_LBAT_EN_MIN | PMIC_RG_LBAT_IRQ_EN_MIN | Reserved | PMIC_RG_LBAT_VOLT_MIN | ||||||||||
| Type | R | - | W | W | - | W | ||||||||||
| Reset | ? | - | ? | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DEBOUNCE_COUNT_MAX | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LBAT_DEBOUNCE_COUNT_MIN | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_NI_COMP | Reserved | PMIC_RG_DA_DAC | |||||||||||||
| Type | R | - | W | |||||||||||||
| Reset | ? | - | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUXADC_CALI | PMIC_RG_BUF_CALI | PMIC_RG_AUXADC_RSV | PMIC_RG_DA_DAC_SEL | PMIC_RG_AUX_OUT_SEL | PMIC_RG_ARB_PRIO_2 | PMIC_RG_ARB_PRIO_1 | PMIC_RG_ARB_PRIO_0 | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_EFUSE_OFFSET_CH0_TRIM | Reserved | PMIC_EFUSE_GAIN_CH0_TRIM | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VBUF_EN | Reserved | PMIC_RG_VBUF_BYP | Reserved | PMIC_RG_VBUF_CALEN | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_THERMAL_ADC_OE | Reserved | PMIC_RG_THERMAL_ADC_GE | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ADC_TRIM_CH_SEL | Reserved | PMIC_RG_SOURCE_CH0_NORM_SEL | Reserved | PMIC_RG_SOURCE_CH0_LBAT_SEL | |||||||||||
| Type | W | - | W | - | W | |||||||||||
| Reset | ? | - | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FLASH_RSV0 | PMIC_FLASH_DIM_DUTY | Reserved | PMIC_FLASH_THER_SHDN_EN | PMIC_FLASH_EN | ||||||||||
| Type | - | W | W | - | W | W | ||||||||||
| Reset | - | ? | ? | - | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FLASH_DIM_DIV | PMIC_FLASH_RSV1 | PMIC_FLASH_SEL | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FLASH_SFSTREN | Reserved | PMIC_FLASH_SFSTR | Reserved | PMIC_FLASH_MODE | ||||||||||
| Type | - | W | - | W | - | W | ||||||||||
| Reset | - | ? | - | ? | - | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_KPLED_RSV0 | PMIC_KPLED_DIM_DUTY | Reserved | PMIC_KPLED_THER_SHDN_EN | PMIC_KPLED_EN | |||||||||||
| Type | W | W | - | W | W | |||||||||||
| Reset | ? | ? | - | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_KPLED_DIM_DIV | PMIC_KPLED_RSV1 | PMIC_KPLED_SEL | |||||||||||||
| Type | W | W | W | |||||||||||||
| Reset | ? | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_KPLED_SFSTREN | Reserved | PMIC_KPLED_SFSTR | Reserved | PMIC_KPLED_MODE | Reserved | ||||||||||
| Type | W | - | W | - | W | - | ||||||||||
| Reset | ? | - | ? | - | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_RSV0 | PMIC_ISINK_DIM0_DUTY | Reserved | PMIC_ISINK_DIM0_FSEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_RSV1 | PMIC_ISINK_DIM1_DUTY | Reserved | PMIC_ISINK_DIM1_FSEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_RSV2 | PMIC_ISINK_DIM2_DUTY | Reserved | PMIC_ISINK_DIM2_FSEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK_RSV3 | Reserved | PMIC_ISINKS_CH2_EN | PMIC_ISINKS_CH1_EN | PMIC_ISINKS_CH0_EN | PMIC_ISINK_RSV4 | Reserved | PMIC_ISINKS2_CHOP_EN | PMIC_ISINKS1_CHOP_EN | PMIC_ISINKS0_CHOP_EN | ||||||
| Type | W | - | W | W | W | W | - | W | W | W | ||||||
| Reset | ? | - | ? | ? | ? | ? | - | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINKS_CH0_STEP | PMIC_ISINK0_CHOP_MODE | PMIC_ISINK0_TEST_REG | PMIC_ISINKS_CH0_MODE | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINKS_CH1_STEP | PMIC_ISINK1_CHOP_MODE | PMIC_ISINK1_TEST_REG | PMIC_ISINKS_CH1_MODE | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ISINKS_CH2_STEP | PMIC_ISINK2_CHOP_MODE | PMIC_ISINK2_TEST_REG | PMIC_ISINKS_CH2_MODE | Reserved | ||||||||||
| Type | - | W | W | W | W | - | ||||||||||
| Reset | - | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_TRIM_EN | Reserved | PMIC_RG_TRIM_SEL | PMIC_RG_LDO_BIST | PMIC_RG_ISINKS_RSV | ||||||||||
| Type | - | W | - | W | W | W | ||||||||||
| Reset | - | ? | - | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINKS_BREATH0_TRF_SEL | PMIC_ISINKS_BREATH0_TON_SEL | Reserved | PMIC_ISINKS_BREATH0_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINKS_BREATH1_TRF_SEL | PMIC_ISINKS_BREATH1_TON_SEL | Reserved | PMIC_ISINKS_BREATH1_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINKS_BREATH2_TRF_SEL | PMIC_ISINKS_BREATH2_TON_SEL | Reserved | PMIC_ISINKS_BREATH2_TOFF_SEL | ||||||||||||
| Type | W | W | - | W | ||||||||||||
| Reset | ? | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ISINK0_SFSTR_EN | Reserved | PMIC_ISINK1_SFSTR_EN | Reserved | PMIC_ISINK2_SFSTR_EN | Reserved | PMIC_ISINK0_SFSTR_TC | PMIC_ISINK1_SFSTR_TC | PMIC_ISINK2_SFSTR_TC | Reserved | ||||||
| Type | W | - | W | - | W | - | W | W | W | - | ||||||
| Reset | ? | - | ? | - | ? | - | ? | ? | ? | - | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDACCDETRSV | PMIC_ACCDET_CON0_RSV1 | Reserved | PMIC_RG_AUDACCDETVIN1PULLLOW | PMIC_RG_AUDACCDETTVDET | PMIC_RG_AUDACCDETANASWCTRL | PMIC_AUDACCDETANASWCTRL_SEL | PMIC_ACCDET_CON0_RSV0 | Reserved | PMIC_RG_AUDACCDETVTHCAL | ||||||
| Type | W | W | - | W | W | W | W | W | - | W | ||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_SEQ_INIT | PMIC_ACCDET_EN | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_MBIAS_PWM_IDLE | PMIC_ACCDET_VTH_PWM_IDLE | PMIC_ACCDET_CMP_PWM_IDLE | Reserved | PMIC_ACCDET_MBIAS_PWM_EN | PMIC_ACCDET_VTH_PWM_EN | PMIC_ACCDET_CMP_PWM_EN | ||||||||
| Type | - | W | W | W | - | W | W | W | ||||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_WIDTH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_THRESH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_FALL_DELAY | PMIC_ACCDET_RISE_DELAY | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE2 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_DEBOUNCE3 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_IVAL_SEL | Reserved | PMIC_ACCDET_IVAL_MEM_IN | Reserved | PMIC_ACCDET_IVAL_SAM_IN | Reserved | PMIC_ACCDET_IVAL_CUR_IN | |||||||||
| Type | W | - | W | - | W | - | W | |||||||||
| Reset | ? | - | ? | - | ? | - | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_IRQ_CLR | Reserved | PMIC_ACCDET_IRQ | ||||||||||||
| Type | - | W | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_PWM_EN_SW | PMIC_ACCDET_MBIAS_EN_SW | PMIC_ACCDET_VTH_EN_SW | PMIC_ACCDET_CMP_EN_SW | Reserved | PMIC_ACCDET_IN_SW | PMIC_ACCDET_PWM_SEL | PMIC_ACCDET_TEST_MODE5 | PMIC_ACCDET_TEST_MODE4 | PMIC_ACCDET_TEST_MODE3 | PMIC_ACCDET_TEST_MODE2 | PMIC_ACCDET_TEST_MODE1 | PMIC_ACCDET_TEST_MODE0 | |||
| Type | W | W | W | W | - | W | W | W | W | W | W | W | W | |||
| Reset | ? | ? | ? | ? | - | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_ACCDET_CMP_CLK | PMIC_ACCDET_VTH_CLK | PMIC_ACCDET_MBIAS_CLK | Reserved | PMIC_ACCDET_STATE | PMIC_ACCDET_MEM_IN | PMIC_ACCDET_SAM_IN | PMIC_ACCDET_CUR_IN | PMIC_ACCDET_IN | ||||||
| Type | - | R | R | R | - | R | R | R | R | R | ||||||
| Reset | - | ? | ? | ? | - | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_CUR_DEB | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_RSV_CON0 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_ACCDET_RSV_CON1 | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_GAINL | Reserved | PMIC_SPK_THER_SHDN_L_EN | PMIC_SPK_OC_SHDN_DL | Reserved | PMIC_SPK_TRIM_EN_L | PMIC_SPKMODE_L | Reserved | PMIC_SPK_EN_L | ||||||
| Type | - | W | - | W | W | - | W | W | - | W | ||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TRIM_DONE_L | PMIC_SPK_OFFSET_L_MODE | PMIC_SPK_LEAD_L_SW | PMIC_SPK_OFFSET_L_SW | PMIC_SPK_OFFSET_L_OV | PMIC_SPK_LEAD_L_FLAG | PMIC_SPK_LEAD_L_FLAG_DEG | PMIC_SPK_OFFSET_L | ||||||||
| Type | R | W | W | W | R | R | R | R | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_OC_EN_L | PMIC_RG_SPKAB_OC_EN_L | PMIC_RG_SPK_TEST_EN_L | PMIC_RG_SPK_DRC_EN_L | PMIC_RG_SPKRCV_EN_L | PMIC_RG_SPKAB_OBIAS_L | PMIC_RG_SPK_SLEW_L | PMIC_RG_SPK_FORCE_EN_L | PMIC_RG_SPK_INTG_RST_L | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_GAINR | Reserved | PMIC_SPK_THER_SHDN_R_EN | PMIC_SPK_OC_SHDN_DR | Reserved | PMIC_SPK_TRIM_EN_R | PMIC_SPKMODE_R | Reserved | PMIC_SPK_EN_R | ||||||
| Type | - | W | - | W | W | - | W | W | - | W | ||||||
| Reset | - | ? | - | ? | ? | - | ? | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TRIM_DONE_R | PMIC_SPK_OFFSET_R_MODE | PMIC_SPK_LEAD_R_SW | PMIC_SPK_OFFSET_R_SW | PMIC_SPK_OFFSET_R_OV | PMIC_SPK_LEAD_R_FLAG | PMIC_SPK_LEAD_R_FLAG_DEG | PMIC_SPK_OFFSET_R | ||||||||
| Type | R | W | W | W | R | R | R | R | ||||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_OC_EN_R | PMIC_RG_SPKAB_OC_EN_R | PMIC_RG_SPK_TEST_EN_R | PMIC_RG_SPK_DRC_EN_R | PMIC_RG_SPKRCV_EN_R | PMIC_RG_SPKAB_OBIAS_R | PMIC_RG_SPK_SLEW_R | PMIC_RG_SPK_FORCE_EN_R | PMIC_RG_SPK_INTG_RST_R | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_AB_OC_L_DEG | PMIC_SPK_D_OC_L_DEG | PMIC_SPK_AB_OC_R_DEG | PMIC_SPK_D_OC_R_DEG | PMIC_SPK_OC_THD | PMIC_SPK_OC_WND | Reserved | PMIC_SPK_TRIM_THD | Reserved | PMIC_SPK_TRIM_WND | ||||||
| Type | R | R | R | R | W | W | - | W | - | W | ||||||
| Reset | ? | ? | ? | ? | ? | ? | - | ? | - | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_SPK_TRIM_DIV | PMIC_SPK_TD3 | PMIC_SPK_TD2 | PMIC_SPK_TD1 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_SPK_OCTH_D | PMIC_RG_SPKAB_OVDRV | PMIC_RG_SPK_FBRC_EN | PMIC_RG_SPK_VCM_IBSEL | PMIC_RG_SPK_VCM_SEL | PMIC_RG_SPK_EN_VIEW_CLK | PMIC_RG_SPK_EN_VIEW_VCM | PMIC_RG_SPK_CCODE | PMIC_RG_SPK_IBIAS_SEL | PMIC_RG_BTL_SET | |||||
| Type | - | W | W | W | W | W | W | W | W | W | W | |||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TEST_MODE1 | PMIC_SPK_TEST_MODE0 | PMIC_SPK_VCM_FAST_EN | PMIC_SPK_RSV0 | PMIC_RG_SPKPGA_GAIN | PMIC_RG_SPK_RSV | ||||||||||
| Type | W | W | W | W | W | W | ||||||||||
| Reset | ? | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_SPK_TD_DONE | Reserved | PMIC_SPK_TD_WAIT | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_SPK_TRIM_STOP_L_SW | PMIC_SPK_TRIM_STOP_R_SW | PMIC_SPK_TRIM_EN_L_SW | PMIC_SPK_TRIM_EN_R_SW | PMIC_SPK_OUTSTG_EN_L_SW | PMIC_SPK_OUTSTG_EN_R_SW | PMIC_SPK_EN_L_SW | PMIC_SPK_EN_R_SW | PMIC_SPK_DEPOP_EN_L_SW | PMIC_SPK_DEPOP_EN_R_SW | PMIC_SPKMODE_L_SW | PMIC_SPKMODE_R_SW | PMIC_SPK_RST_L_SW | PMIC_SPK_RST_R_SW | PMIC_SPK_VCM_FAST_SW | PMIC_SPK_EN_MODE |
| Type | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W | W |
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_SW_RSTCLR | PMIC_FG_CHARGE_RST | PMIC_FG_TIME_RST | PMIC_FG_OFFSET_RST | PMIC_FG_SW_CLEAR | PMIC_FG_LATCHDATA_ST | PMIC_FG_SW_READ_PRE | PMIC_FG_SW_CR | PMIC_RG_FGCLKSRC | PMIC_FG_AUTOCALRATE | PMIC_FG_CAL | PMIC_FG_VMODE | PMIC_FG_ON | |||
| Type | W | W | W | W | W | R | W | W | W | W | W | W | W | |||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FG_CAR_35_32 | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_CAR_31_16 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_CAR_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FG_NTER_29_16 | ||||||||||||||
| Type | - | R | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_NTER_15_00 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_BLTR | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_BFTR | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_CURRENT_OUT | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_ADJUST_OFFSET_VALUE | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_OFFSET | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_INPUTCLKSEL | PMIC_RG_FGANALOGTEST | PMIC_RG_SPARE | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FG_ADC_AUTORST | PMIC_FG_ADJ_OFFSET_EN | PMIC_VOL_OSR_H | PMIC_VOL_OSR | PMIC_FG_OSR_H | PMIC_FG_OSR | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_FGVMODE | PMIC_FG_RST | PMIC_FGCAL_EN | PMIC_FGADC_EN | Reserved | PMIC_FG_SLP_EN | PMIC_FG_ADC_RSTDETECT | Reserved | PMIC_FG_H_INT_STS | PMIC_FG_L_INT_STS | Reserved | PMIC_VOL_FIR1BYPASS | PMIC_FG_FIR2BYPASS | PMIC_FG_FIR1BYPASS | ||
| Type | R | R | R | R | - | W | R | - | R | R | - | W | W | W | ||
| Reset | ? | ? | ? | ? | - | ? | ? | - | ? | ? | - | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_VOL_CURRENT_OUT | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_CIC2 | |||||||||||||||
| Type | R | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_SLP_CUR_TH | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_FG_SLP_TIME | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_DET_TIME | PMIC_FG_SRCVOLTEN_FTIME | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_FG_TEST_MODE1 | PMIC_FG_TEST_MODE0 | Reserved | PMIC_FG_RSV1 | PMIC_FG_VMODE_SW | PMIC_FG_FGADC_EN_SW | PMIC_FG_FGCAL_EN_SW | PMIC_FG_RST_SW | PMIC_FG_MODE | |||||||
| Type | W | W | - | W | W | W | W | W | W | |||||||
| Reset | ? | ? | - | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_STMP_MODE | PMIC_MIX_XOSC32_STP_CALI | PMIC_MIX_XOSC32_STP_LPDRST | PMIC_MIX_XOSC32_STP_LPDEN | PMIC_MIX_XOSC32_STP_LPDTB | PMIC_MIX_XOSC32_STP_PWDB | PMIC_MIX_XOSC32_STP_CPDTB | PMIC_MIX_EOSC32_OPT | |||||||
| Type | - | W | W | W | W | R | W | R | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_MIX_EOSC32_VCT_EN | PMIC_MIX_EOSC32_STP_RSV | PMIC_MIX_DCXO_STP_TEST_DEGLITCH_MODE | PMIC_MIX_RTC_STP_XOSC32_ENB | PMIC_MIX_PMU_STP_DDLO_VRTC_EN | PMIC_MIX_PMU_STP_DDLO_VRTC | PMIC_MIX_DCXO_STP_LVSH_EN | PMIC_MIX_EOSC32_STP_CHOP_EN | |||||||
| Type | - | W | W | W | W | W | W | W | W | |||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_DC2AC_EN_VAUDP12 | PMIC_RG_AUD_DAC_PWL_UP_VA28 | PMIC_RG_AUD_DAC_PWR_UP_VA28 | PMIC_RG_AUDDACRPWRUP_VAUDP12 | PMIC_RG_AUDDACLPWRUP_VAUDP12 | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDHPRSCDISABLE_VAUDP12 | PMIC_RG_AUDHPLSCDISABLE_VAUDP12 | PMIC_RG_AUDHSSCDISABLE_VAUDP12 | PMIC_RG_AUDHPRMUXINPUTSEL_VAUDP12 | PMIC_RG_AUDHPLMUXINPUTSEL_VAUDP12 | PMIC_RG_AUDHSMUXINPUTSEL_VAUDP12 | PMIC_RG_AUDHPRPWRUP_VAUDP12 | PMIC_RG_AUDHPLPWRUP_VAUDP12 | PMIC_RG_AUDHSPWRUP_VAUDP12 | |||||||
| Type | W | W | W | W | W | W | W | W | W | |||||||
| Reset | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LINENOISEENH_VAUDP12 | PMIC_RG_HPOUT_SHORTVCM_VAUDP12 | PMIC_RG_HPOUTPUTRESET0_VAUDP12 | PMIC_RG_HPINPUTRESET0_VAUDP12 | PMIC_RG_HPOUTPUTSTBENH_VAUDP12 | PMIC_RG_HPINPUTSTBENH_VAUDP12 | PMIC_RG_PRECHARGEBUF_EN_VAUDP12 | PMIC_RG_AUDBGBON_VAUDP12 | PMIC_RG_AUDHSSTARTUP_VAUDP12 | PMIC_RG_AUDHPSTARTUP_VAUDP12 | PMIC_RG_AUDHSBSCCURRENT_VAUDP12 | PMIC_RG_AUDHPRBSCCURRENT_VAUDP12 | PMIC_RG_AUDHPLBSCCURRENT_VAUDP12 | ||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | W | ||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_HSOUT_SHORTVCM_VAUDP12 | PMIC_RG_HPOUTSTB_RSEL_VAUDP12 | PMIC_RG_HSOUTPUTRESET0_VAUDP12 | PMIC_RG_HSINPUTRESET0_VAUDP12 | PMIC_RG_HSOUTPUTSTBENH_VAUDP12 | PMIC_RG_HSINPUTSTBENH_VAUDP12 | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_LINE_PULL0V_VAUDP12 | PMIC_RG_AUDHPRFINETRIM_VAUDP12 | PMIC_RG_AUDHPLFINETRIM_VAUDP12 | PMIC_RG_AUDHPTRIM_EN_VAUDP12 | PMIC_RG_AUDHPRTRIM_VAUDP12 | PMIC_RG_AUDHPLTRIM_VAUDP12 | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_ABIDEC_RESERVED_VAUDP12 | PMIC_RG_ABIDEC_RESERVED_VA28 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDIBIASPWRDN_VAUDP12 | PMIC_RG_AUDBIASADJ_1_VAUDP12 | PMIC_RG_AUDBIASADJ_0_VAUDP12 | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CHARGEOPTION_DEPOP_VA28 | PMIC_RG_DEPOP_ISEL_VA28 | PMIC_RG_DEPOP_VCMGEN_EN_VA28 | PMIC_RG_DEPOP_RSEL_VA28 | PMIC_RG_DEPOP_REN_VA28 | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDIVLMUXSEL_VAUDP12 | PMIC_RG_AUDIVLSTARTUP_VAUDP12 | PMIC_RG_AUDIVLPWRUP_VAUDP12 | ||||||||||||
| Type | - | W | W | W | ||||||||||||
| Reset | - | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDIVLMUTE_VAUDP12 | PMIC_RG_SEL_DELAY_VCORE | PMIC_RG_SEL_ENCODER_96K_VA28 | PMIC_RG_SEL_DECODER_96K_VA28 | PMIC_RG_RSTB_ENCODER_VA28 | PMIC_RG_RSTB_DECODER_VA28 | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_VA28REFGEN_EN_VA28 | PMIC_RG_VA33REFGEN_EN_VA33 | PMIC_RG_VBATREFGEN_EN_VBAT | PMIC_RG_VBATPREREG_PDDIS_EN_VBAT | PMIC_RG_LCLDO_ENC_REMOTE_SENSE_VA28 | PMIC_RG_LCLDO_ENC_PDDIS_EN_VA28 | PMIC_RG_LCLDO_VOSEL_VA33 | PMIC_RG_LCLDO_REMOTE_SENSE_VA33 | PMIC_RG_LCLDO_PDDIS_EN_VA33 | PMIC_RG_HCLDO_VOSEL_VA33 | PMIC_RG_HCLDO_REMOTE_SENSE_VA33 | PMIC_RG_HCLDO_PDDIS_EN_VA33 | |||
| Type | - | W | W | W | W | W | W | W | W | W | W | W | W | |||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | ? | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDPMU_RESERVED_VAUDP12 | PMIC_RG_AUDPMU_RESERVED_VA28 | PMIC_RG_AUDPMU_RESERVED_VA33 | PMIC_RG_AUDPMU_RESERVED_VBAT | ||||||||||||
| Type | W | W | W | W | ||||||||||||
| Reset | ? | ? | ? | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_DA_NVREG_EN_VAUDP12 | PMIC_RG_ACC_DCC_SEL_AUDGLB_VA28 | PMIC_RG_AUDGLB_PWRDN_VA28 | PMIC_RG_NVREG_PULL0V_VAUDP12 | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_NCP_REMOTE_SENSE_VA18 | PMIC_DA_HCLDO_EN_VA33 | PMIC_DA_LCLDO_EN_VA33 | PMIC_DA_LCLDO_ENC_EN_VA28 | PMIC_DA_VBATPREREG_EN_VBAT | Reserved | ||||||||||
| Type | W | W | W | W | W | - | ||||||||||
| Reset | ? | ? | ? | ? | ? | - | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDPREAMPIDDTEST | PMIC_RG_AUDPREAMPRPGATEST | PMIC_RG_AUDPREAMPLPGATEST | PMIC_RG_AUDPREAMPRINPUTSEL | PMIC_RG_AUDPREAMPLINPUTSEL | PMIC_RG_AUDPREAMPRON | PMIC_RG_AUDPREAMPLON | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDADC3RDSTAGERESET | PMIC_RG_AUDADC2NDSTAGERESET | PMIC_RG_AUDADC2NDSTAGEIDDTEST | PMIC_RG_AUDADC1STSTAGEIDDTEST | PMIC_RG_AUDADCCLKSEL | PMIC_RG_AUDADCRINPUTSEL | PMIC_RG_AUDADCLINPUTSEL | PMIC_RG_AUDADCRPWRUP | PMIC_RG_AUDADCLPWRUP | ||||||
| Type | - | W | W | W | W | W | W | W | W | W | ||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ? | ? | ||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDRCTUNELSEL | PMIC_RG_AUDRCTUNEL | PMIC_RG_AUDADCFFBYPASS | PMIC_RG_AUDADCBYPASS | PMIC_RG_AUDADCFLASHIDDTEST | PMIC_RG_AUDADCREFBUFIDDTEST | PMIC_RG_AUDADCDACIDDTEST | ||||||||
| Type | - | W | W | W | W | W | W | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDADCDACFBCURRENT | PMIC_RG_AUDADCNODEM | PMIC_RG_AUDRCTUNERSEL | PMIC_RG_AUDRCTUNER | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDADCTESTDATA | |||||||||||||||
| Type | W | |||||||||||||||
| Reset | ? | |||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDADCDACNRZ | PMIC_RG_AUDADCFSRESET | PMIC_RG_AUDADCDACTEST | PMIC_RG_AUDADCNOPATEST | PMIC_RG_AUDADCWIDECM | ||||||||||
| Type | - | W | W | W | W | W | ||||||||||
| Reset | - | ? | ? | ? | ? | ? | ||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDSPAREVA18 | PMIC_RG_AUDSPAREVA28 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDSPAREVAUDP | PMIC_RG_AUDSPAREVMIC | |||||||||||||
| Type | - | W | W | |||||||||||||
| Reset | - | ? | ? | |||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDMICBIASVREF | PMIC_RG_AUDPWDBMICBIAS | PMIC_RG_AUDDIGMICBIAS | PMIC_RG_AUDDIGMICNDUTY | PMIC_RG_AUDDIGMICPDUTY | Reserved | PMIC_RG_AUDDIGMICEN | ||||||||
| Type | - | W | W | W | W | W | - | W | ||||||||
| Reset | - | ? | ? | ? | ? | ? | - | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDLSBUFRMUTE | Reserved | PMIC_RG_AUDLSBUFRGAIN | PMIC_RG_AUDLSBUFLMUTE | Reserved | PMIC_RG_AUDLSBUFLGAIN | PMIC_RG_AUDLSBUFRPWRUP | PMIC_RG_AUDLSBUFLPWRUP | ||||||||
| Type | W | - | W | W | - | W | W | W | ||||||||
| Reset | ? | - | ? | ? | - | ? | ? | ? | ||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDLSBUF2IDDTEST | PMIC_RG_AUDLSBUFIDDTEST | PMIC_RG_AUDLSBUFRINPUTSEL | PMIC_RG_AUDLSBUFLINPUTSEL | |||||||||||
| Type | - | W | W | W | W | |||||||||||
| Reset | - | ? | ? | ? | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | PMIC_RG_AUDENCSPAREVA18 | PMIC_RG_AUDENCSPAREVA28 | ||||||||||||||
| Type | W | W | ||||||||||||||
| Reset | ? | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_CLKSQ_MONEN_VA28 | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDPREAMPRGAIN | Reserved | PMIC_RG_AUDPREAMPLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDZCDMUXSEL_VAUDP12 | PMIC_RG_AUDZCDCLKSEL_VAUDP12 | PMIC_RG_AUDZCDTIMEOUTMODESEL | PMIC_RG_AUDZCDGAINSTEPSIZE | PMIC_RG_AUDZCDGAINSTEPTIME | PMIC_RG_AUDZCDENABLE | |||||||||
| Type | - | W | W | W | W | W | W | |||||||||
| Reset | - | ? | ? | ? | ? | ? | ? | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDLINEGAIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDHPRGAIN | Reserved | PMIC_RG_AUDHPLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDHSGAIN | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDIVRGAIN | Reserved | PMIC_RG_AUDIVLGAIN | ||||||||||||
| Type | - | W | - | W | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_AUDINTGAIN2 | Reserved | PMIC_RG_AUDINTGAIN1 | ||||||||||||
| Type | - | R | - | R | ||||||||||||
| Reset | - | ? | - | ? | ||||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_DIVCKS_CHG | PMIC_RG_DIVCKS_ON | Reserved | PMIC_RG_DIVCKS_PRG | |||||||||||
| Type | - | W | W | - | W | |||||||||||
| Reset | - | ? | ? | - | ? | |||||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Name | Reserved | PMIC_RG_PWD_NCP | ||||||||||||||
| Type | - | W | ||||||||||||||
| Reset | - | ? | ||||||||||||||